The present invention relates generally to the field of testing and, in particular embodiments, to a method of testing a device using an emulated apparatus.
Electronic devices are tested to obtain information about the operation of these devices. Certain industries, such as the automotive industry and the aerospace industry, require extensive testing before a product can enter the market to ensure safety. Automated testing is becoming more prevalent. The use of automated testing allows for testing a high volume of devices in a small amount of time with minimal human interaction. Using automated testing can be more efficient than other forms of testing by maximizing throughput and reducing human errors involved in testing. Test conditions, such as temperature, pressure, and time, can be automatically varied using automated testing. Both hardware and software are often utilized in automated testing, where the hardware interacts with the software. Software then controls the hardware, collects the data, analyzes the results, and prepares a report for an operator. An operator may be needed to connect the device under testing to the automated test setup, although this step may be automated.
Automated testing can involve the use of actual electronic devices that the device under testing will be connected to when the device is deployed in the real world. Using actual electronic devices allows for a realistic test environment. However, a single device may not display the range of acceptable electronic devices.
An embodiment of the present invention provides a method of testing a device. A circuit includes a device-under-test and an emulated apparatus. The emulated apparatus includes digital circuitry that models a real device. The circuit is powered and a response of the circuit is calculated. The calculated response is determined at least based on the emulated apparatus. An analog response signal is generated based on the digitally calculated response. The analog response signal is applied to the device under test.
Another embodiment provides a method for emulating an apparatus. A circuit is caused to be closed so that a load unit is coupled is to a power source unit. The load unit or the power source unit comprises an emulation model. A response is digitally determined when the circuit is closed based on the emulation model. The digitally determined response includes an emulation delay relative to a response that would have occurred if neither the load nor the power source were an emulation model. The emulation model is updated based upon a time-shifted version of the response. The time-shifted version of the response is adjusted in time by an amount of delay less than the emulation delay. The circuit is then closed again so that the load unit is coupled is to the power source unit and a further response is digitally determined based on the updated emulation model when the circuit is closed again.
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawing, in which:
a-c illustrate current as a function of time graphs and sources of delay for embodiment systems for testing a device;
a-b illustrate current as a function of time graphs for an embodiment power amplifier;
a-b illustrate LabVIEW block diagrams used in the development of embodiment load models;
a-b illustrate sequences of steps for an embodiment method for emulating an apparatus;
a-f illustrate LabVIEW code for an implementation of an embodiment method for emulating an apparatus;
a-b a digital trigger input voltage, load current, and error as a function of time graph for a method for emulating an apparatus; and
a-e illustrate voltage as a function of time graphs, current as a function of time graphs, and a percent deviation as a function of time graph for an emulated lightbulb and a real lightbulb.
Corresponding numerals and symbols in different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale. To more clearly illustrate certain embodiments, a letter indicating variations of the same structure, material, or process step may follow a figure number.
The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
The present invention will be described with respect to preferred embodiments in a specific context, namely the testing of a device using an emulated apparatus. The invention may also be applied, however, to other types of systems and methods.
Load 102 provides a load to the system. For example, this element will produce a specific current when a given voltage is applied across it. Load 102 may exhibit a resistance, a capacitance, and/or an inductance. In one example, load 102 is an incandescent lightbulb. In other examples, load 102 may be a motor, such as a motor for windshield wipers, an LED, or another load, such as a microcontroller, a squib, or a xenon lighting module. In one aspect of the invention, the load 102 will be emulated in order to evaluate the device 104 or the power source 106.
Device 104 may be used to couple and/or uncouple load 102 to power source 106. In one example, device 104 is a switch, which closes to connect load 102 with power source 106 and opens to disconnect power source 106 from load 102. In one particular embodiment that will be described further below, device 104 may be a smart high side power switch, which may operate at a high current, such as 30 A, and may have protective features to shut down the switch if the current, voltage, or temperature exceeds a predetermined limit. In other examples, device under test 104 may be a complex battery management device which can handle several battery cells in parallel using complex active and passive balancing algorithms. Alternately, device 104 may be a linear voltage regulator or a DC/DC converter.
The element 106 is a power source. Power source 106 supplies power to load 102 when coupled to load 102 by device 104. In one example, power source 106 is a battery, for example, a lithium ion battery. In other examples, power source 106 could be a lead acid battery or an alternator. Power source 106 may be a real power source, or it may be an emulated power source. Power source 106 may be coupled to ground 108, as shown in
If, for example, system 100 is used to test device 104, only one load 102, or a limited number of different loads, and only one power source 106, or a limited number of power sources, can be used in testing. However, in actual operation, there an acceptable range of parameters for load 102 and power source 106 that could be coupled to device 104. Load 102 or power source 106 can be simulated to test the reaction of device 104 to a range of parameters, but simulations might not be realistic.
Another example is provided in
It is understood that the embodiments of
a-c illustrate current as a function of time graphs and sources of delay for embodiment systems for testing a device. These figures compare responses of an emulated load, a real load, and a simulated load. When testing a device, such as device 104 in
Such a test provides a realistic snapshot of the interaction of smart power switch 154 with one particular incandescent lightbulb and one particular lithium ion battery. However, there is a range of acceptable parameters for incandescent lightbulbs and lithium ion batteries in the ordinary operation of the smart power switch that the switch should acceptably interact with.
One alternative to using a real apparatus is to use a simulated apparatus, which can simulate apparatus characteristics that span a range of acceptable values. However, a simulated apparatus might not provide a realistic view of behavior of real apparatus. An emulated apparatus can provide a realistic representation of the range of parameters a device under test would face in an actual environment.
a illustrates the current response, versus time, for a real incandescent lightbulb, a simulated incandescent lightbulb, and an emulated incandescent lightbulb. Response 402 shows the response of a real incandescent lightbulb, response 406 shows the response of a simulated incandescent lightbulb, and response 404 shows the response of an emulated incandescent lightbulb. As illustrated, response 406 of a simulated lightbulb is smoother than and not very similar to response 402 for a real incandescent lightbulb. However, while response 404 of an emulated lightbulb has a shape similar to that of response 402 for a real incandescent lightbulb, response 404 has an emulation time delay relative to response 402.
b illustrates some example sources of the emulation delay for an embodiment emulator in table 420. These times are merely provided as an example embodiment and it is understood that other systems could include other or different sources of delay. In an embodiment, an analog-to-digital converter has a known delay of 2 μs, and a digital-to-analog converter has a known delay of 10 μs. Additionally, logic has a minimum delay of 0.5 μs and a maximum delay of 1 μs, while a power stage has a minimum delay of 3 μs and a maximum delay of 8 μs. Thus, for this embodiment, the total minimum time delay is 15.5 μs while the total maximum time delay is 21 μs.
The emulation delay might cause oscillations in a PID controller in the emulator, as illustrated by
In an example, emulated load 202 has a signal processing unit and a current source. For example, a signal processing unit 250 may be on an FPGA, a digital signal processor (DSP), or a microprocessor target. The signal processing unit 250 contains logic 212, which contains a load model and calculates the current value for device under test 104 when a voltage is applied. Additionally, the signal processing unit 250 may contain subtractor unit 216, which calculates the voltage difference across shunt resistor 510, voltage 220 minus voltage 218. Also, the signal processing unit may contain PID controller 214, which, together with power amplifier 508, is the current source. Power amplifier 508 may be a two quadrant power amplifier. In an example, power amplifier 508 may be capable of sinking current for ohmic loads such as incandescent lightbulbs and inductive and/or capacitive loads such as motors or batteries. In an embodiment, device 104 is connected to a PXIe System, and automation is controlled using GPIB and PXI busses.
a-b illustrate graphs demonstrating the current response versus time of power amplifier 508.
a-b illustrate a procedure for developing a load model for real-time load emulation in for FPGA 250 using LabVIEW.
b illustrates LabVIEW code for an emulation model for an incandescent lightbulb. Starting with the physical equations, Kirchoff's law for electrical meshes, which considers the influence of wire resistance, wire inductance, and the thermo-electrical model of the lightbulb on the load current, is given by:
In this equation, μHS is the time-variant output voltage of the high-side switch, Rwire and Lwire are the resistance and inductance of the wire, i(t) is the load current as a function of time, and R(T) is the thermal-dependent resistance of the filament. Additionally, a load-specific equation, depending on electro-thermal or electro-mechanic loads is used. The load specific equation may be thermal heating when modeling incandescent lightbulbs or back electro-motive force when modeling motors.
In a load model of an incandescent lightbulb, energy conservation is illustrated by:
P
el
=P
rad
+P
cond
+C
th,fil
·{dot over (T)}
Fil,
where Pel is the total electrical power, Prad is the radiated power, Pcond is the conductive power, and Cth·{dot over (T)}Fil is thermal heating power. {dot over (T)}Fil is found in:
where Cth,fil is the heat capacity of the filament, Rth,Fil is the thermal resistance of the filament, TFil is the filament temperature, and TAmb is the ambient temperature. The thermal-variant resistance is given by:
where TFil,nom is the filament temperature at nominal power and RFil,nom is the resistance at nominal power.
To implement these equations in an FPGA, the equations may be transformed from differential equations to a set of first order difference equations. The sampling time is equal to the processing time of one loop cycle, which may be about 7 μs. Time invariant factors may be calculated in a pre-processing step to optimize the digital design. A similar procedure may be used to determine an emulation model for other apparatus, such as motors and batteries, or even full applications like motor and throttle.
Next, digital-to-analog converter 506, which may be on FPGA 250, converts the digital calculated response to an analog response and power amplifier 508 amplifies the analog response. In an example, power amplifier 508 is a class AB power amplifier, which may be capable of operating at a current level of 90 A. The output of power amplifier 508 is fed back to analog-to-digital converter 502. Next, the analog response passes through resistor 510, the output of which is also fed back to analog-to-digital converter 502. The analog response is also applied to device 104, which reacts to the analog response.
Finally, signal processing unit 504 determines if another of a plurality of iterations of will be performed. For example, signal processing unit 504 may determine that another iteration will be performed if the new error is less than the old error. If signal processing unit 504 determines that another iteration will be performed, emulated load 202 is powered, followed by analog-to-digital converter 502 converting the electric power to a digital representation. Next, signal processing unit 504 calculates a digital response based on the digital representation of the electric power and on a time-shifted version of the previous reaction, where the time shift is Δt. Then, the digital response is converted to an analog response by digital-to-analog converter 506. The analog response passes through power amplifier 508 and resistor 510, and is applied to device under test 104. These steps repeat for a plurality of n iterations until the total time shift ΔT is approximately equal to the emulation delay.
The emulation delay may be determined based on known sources of delay, such as analog-to-digital converter 502, signal processing unit 504, digital-to-analog converter 506, and power amplifier 508. The emulation delays in analog-to-digital converter 502 and digital-to-analog converter 506 are constant time delays for a given device. On the other hand, the emulation delay for calculations in signal processing unit 504 is a variable delay that depends on the logic implemented, which can be extracted from the logic design, and is constant for a particular implementation. Also, the delay of power amplifier 508 is a variable delay. In an example, the total time shift ΔT may be equal to the approximate emulation delay, which may be from about 15 μs to about 21 μs.
In an example, time shift Δt may be a function of ΔT, (the emulation delay,) n, (the total number of iterations,) and i, (the iteration number,) where Δt(0)=0. In an example, the time shift is less than the emulation delay. The time shift for each iteration may be the same each time the time shift is performed, such that Δt(i)=Δt(i−1)+ΔT/n. However, the incremental time shift may vary, for example the time shift may gradually approaches ΔT. For example, Δt(i)=Δt(i−1)+ΔT/2i. Alternately, Δt(i) may be a logarithmic function of i.
Next, step 704 involves determining a digital representation of the applied electric power, which may be performed by using a digital-to-analog converter, which may be on an FPGA. Alternately, step 704 may be performed on a DSP or a microprocessor target. Then, in step 706, a response is calculated using an emulation model, which may be performed, for example, on an FPGA. Alternately, step 706 may be performed on a DSP or a microprocessor target. The emulation model may be based on the digital representation of the applied electric power and/or from a time-shifted version of the digitally calculated response of a previous iteration. Step 708 saves a waveform of the calculated response. In an example, the waveform may be saved in RAM, which may be FPGA RAM. Alternately, the waveform may be saved in an external memory.
After step 708, in step 710, an analog response is generated from the digitally calculated response. Step 710 may be performed by an analog-to-digital converter, which may be on an FPGA. Alternately, step 710 may be performed on a DSP or a μP target. The analog response is amplified by a power amplifier, which may be a class AB power amplifier. Next, the analog response pass through a resistor and it is applied to the device under test. A voltage drop may be measured across the resistor. In an example, the device under test may be a smart power switch, or it may be a linear voltage regulator, a DC/DC converter or a squib driver. The device responds to the applied analog response. Finally, step 712 evaluates the response. If the emulation is complete, for example if the new error is greater than the old error, the emulation goes to step 714 and the emulation stops.
If the emulation is not complete, the emulator performs another iteration of emulation, beginning with powering the emulation model in step 702. Following that, a digital representation of the electrical power is determined in step 704, and a response is calculated based on the digital representation of the electrical power and based on a time shifted version of a previous response. The saved waveform may be shifted by an incremental time shift, which may be uniform for each of a plurality of iterations, or may gradually approach the total time shift. Then, a waveform of the digital response is saved to be used by a subsequent iteration. After that, an analog representation of the digital response is produced in step 710, and it is applied to the device under test. Finally, the response is evaluated in step 712. If the emulation is complete, the emulation proceeds to step 714, and the emulation finishing. In an example, the emulation model used is the emulation model of the previous step. If the emulation is not complete, the emulator repeats steps 702, 704, 706, 708, 710, and 712 until the emulation is complete, for example until the new error is greater than the old error.
a-b illustrate steps for an embodiment method of emulating an apparatus.
Following that, a voltage is applied at time t2 with the current from time t1. In this case, a gain 872 is applied. Steps 864, 866, and 868 are repeated after the gain is applied. From these calculations, a new load current and voltage can be derived. These steps may be repeated until the desired result is obtained.
b illustrates method 880 for emulating an apparatus. Initially, in step 882, the input voltage is read in. In step 884, a mean value of the input voltage is built. Step 882 and step 884 are repeated N times, where N is an integer corresponding to the number of times the mean value will be calculated. Next, in step 886, a load current is calculated from the mean voltage.
Then, an iterative approximation is performed in step 888. The new current is calculated to be:
where inew(t) is the new current value, iold is the previous current value, n is the maximum number of time steps, j is an integer between 1 and n that indicates the iteration number, and Δi is the change in current. In an example, n is 10, although n may be another integer. Then, in step 890, a measurement is performed.
Finally, in step 892, the error is evaluated. The error is:
∫iold(t)dt−∫inew(t)dt
If the new error is less than the old error, another iteration is performed by repeating step 888, step 890, and step 892. If the new error is greater than the old error, the iteration is complete, and the current used is the current from the previous iteration with the smallest error.
a-f illustrate LabVIEW code that may be utilized in an embodiment system for testing a device. This code is merely provided as an example and it is understood that different code may be used in other situations. The LabVIEW code may be run on an FPGA.
a illustrates LabVIEW block diagram 900 for implementing step 882 for reading in an input voltage, while
a-b illustrate results of an embodiment system for emulating a device.
In the embodiment being discussed now, a number of iterations of measurements will be performed. In the first iteration 942 (labeled as 0/10, since up to ten iterations will be performed in this embodiment), an input voltage and consequent load current are determined upon a rising edge of the trigger signal 932. Based on comparison with the original measurement 940, an error pulse 962 is generated within error signal 938.
A second iteration 944 (labeled 1/10) is then performed to generate a second error pulse 964. Since the magnitude of the second error pulse 964 was less than the magnitude of the first error pulse 962, another iteration 946 is performed. Based on this next iteration (labeled 2/10), a third error pulse 966 is generated. Once again, this error pulse 966 is compared with the previous error pulse 964 and, since it has once again become smaller, another iteration 948 is performed.
In the illustrated example, the iteration 948 is the last iteration because the fourth error pulse (which has been cut off from this view) was greater than the third error pulse 966. Because the error went up, it can be assumed that the iteration 946 utilized the optimal delay and, therefore, this emulation is utilized. If the error had once again gone down, the iterations would continue either until the error goes up or the maximum number of iterations (ten in this example) is reached. The maximum number is set to cap the time that can be spent performing the emulation.
b illustrates the load current versus time for an original measurement, for no shift, a shift of one, a shift of two, and a shift of three. The current versus time curve for a no shift 954 is to the right of original measurement curve 952, while the current versus time curve for a shift of one 956 is closer to original measurement 952. Similarly, current versus time curve for a shift of two 958 is closer to original measurement 952 than curve for a shift of one 956. However, current versus time curve for a shift of three (once again not pictured) is to the left of original measurement curve 952, indicating an inaccurate emulation, where the emulated model responds before the voltage is applied.
a-e illustrate current versus time, voltage versus time, and percent deviation versus time responses of an emulated incandescent lightbulb and responses of a real incandescent lightbulb. These figures compare results using an emulated load to results using a real load.
If device under test 104 is a smart power switch, it may have protective features, such as over-current detection, over-voltage detection, and over-temperature shut-down, to protect its circuitry from damage. Incandescent lightbulbs have a high inrush current, often up to ten times their steady state current, due to a low resistance at low temperatures. When current begins to flow, resistance in the filament increases nonlinearly, causing current to decrease nonlinearly. When a smart power switch is coupled to a real incandescent lightbulb, and the lightbulb is turned on, the initial current will often be above the current limit of the switch. The switch may shut down for a certain period of time, when it is automatically switched on again. This toggling is repeated until the current remains below the current limit.
Advantages of embodiments include the ability to test device robustness within the variation of active and passive components. In some embodiments, emulators may accurately emulate an apparatus in real time. Additionally, embodiments may be capable of operating at a high power and high currents, for example at a current of 90 A. Also, in some embodiments, emulators may be configurable to emulate multiple devices. Additionally, embodiments may allow the testing of smart power switches undergoing toggling.
While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.