BRIEF DESCRIPTION OF THE DRAWINGS
Referring now to the attached drawings which form a part of this original disclosure:
FIG. 1 is a partial vertical cross-sectional view of a semiconductor substrate in one step of a selective anisotropic plasma etching method in accordance with a first embodiment of the present invention;
FIG. 2 is a partial vertical cross-sectional view of the semiconductor substrate in one step of the selective anisotropic plasma etching method in accordance with the first embodiment of the present invention;
FIG. 3 is a partial vertical cross-sectional view of the semiconductor substrate in one step of the selective anisotropic plasma etching method in accordance with the first embodiment of the present invention;
FIG. 4 is a partial vertical cross-sectional view of the semiconductor substrate in one step of the selective anisotropic plasma etching method in accordance with the first embodiment of the present invention;
FIG. 5 is a partial vertical cross-sectional view of the semiconductor substrate in one step of the selective anisotropic plasma etching method in accordance with the first embodiment of the present invention;
FIG. 6 is a flow chart explaining steps of the selective anisotropic plasma etching method in accordance with the first embodiment of the present invention;
FIG. 7 is an electrophotograph showing a bottom portion of a trench formed by etching a silicon substrate under conditions in which an etching gas comprised of a SF6 gas and an O2 gas is used and the etching rate is set to be 3.2 μm min;
FIG. 8 is an electrophotograph showing a bottom portion of a trench formed by etching a silicon substrate under conditions in which an etching gas comprised of a SF6 gas and a CF4 gas is used and the etching rate is set to be 0.375 μm/min;
FIG. 9 is a partial vertical cross sectional view showing the vertical cross sectional shape of a trench formed as a result of a finishing etching step under conditions in which the ratio of the gas flow rate of CF4 to that of SF4 is set to be low;
FIG. 10 is a partial vertical cross-sectional view explaining the relaxation of stress applied to a silicon substrate when a thermal oxide film is formed on a sidewall of the trench and a bottom portion shown in FIG. 9;
FIG. 11 is a partial vertical cross sectional view showing the vertical cross sectional shape of a trench formed as a result of an finishing etching step under conditions in which the ratio of the gas flow rate of CF4 to that of SF6 is set to be low; and
FIG. 12 is a partial vertical cross-sectional view explaining an increase in stress applied to the silicon substrate when a thermal oxide film is formed on a bottom portion of a trench shown in FIG. 11 and a laminated structure comprised of a thermal oxide film and polysilicon is formed on a sidewall.