Claims
- 1. A method for using selective etching to form optical components on a circuit device, comprising:
receiving a substrate composed of a first material including a buffer layer composed of a second material; forming a sacrificial layer composed of a third material on the buffer layer; forming an epitaxial blocking layer on the substrate, wherein the epitaxial blocking layer has windows exposing the sacrificial layer; forming optical components composed of a fourth material on exposed portions of the sacrificial layer; and performing an etching operation using a selective etchant to remove the sacrificial layer.
- 2. The method of claim 1,
wherein optical components include an optical fiber core; and wherein a cladding layer is applied to the optical fiber core.
- 3. The method of claim 2, wherein receiving the substrate includes receiving the substrate without the buffer layer.
- 4. The method of claim 2, further comprising adding a filler to fill at least a portion of a cavity left by removing the sacrificial layer.
- 5. The method of claim 4,
wherein the first material comprises Si; wherein the second material is SiGe or SiGeC, whereby SiGeC allows growing a thicker buffer layer than using SiGe; wherein the third material comprises Si; wherein the fourth material comprises SiO2:GeO2; wherein the selective etchant is KOH or TMAH; and wherein the cladding layer comprises SiO2.
- 6. The method of claim 5, wherein the second material comprises SiGeC, wherein carbon is greater than or equal to one atomic percent.
- 7. The method of claim 5, wherein the second material comprises SiGeC, wherein carbon is less than or equal to one atomic percent.
- 8. The method of claim 4, wherein the filler comprises SiO2.
- 9. The method of claim 4, wherein the filler is a gas, a liquid, or a solid.
- 10. The method of claim 2, wherein the buffer layer is an epitaxial layer.
- 11. The method of claim 2, wherein the sacrificial layer is an epitaxial layer.
- 12. The method of claim 2, wherein the optical fiber core is an epitaxial layer.
- 13. The method of claim 2, further comprising splitting the optical fiber core into multiple optical fiber cores, wherein splitting the optical fiber core forms an optical multiplexer.
- 14. The method of claim 2, further comprising combining multiple optical fiber cores into a single optical fiber core, wherein combining multiple optical fiber cores forms an optical demultiplexer.
- 15. The method of claim 2, wherein forming the optical fiber core includes:
forming a graded index optical fiber core; and shaping the optical fiber core prior to applying the cladding layer, wherein shaping the optical fiber core includes rounding the optical fiber core.
- 16. A method to facilitate integrating active components on a circuit device, wherein the circuit device includes an optical fiber core that was epitaxially grown, comprising;
receiving the circuit device; etching a cavity into the circuit device, wherein the cavity passes through the optical fiber core; and creating a device within the cavity, wherein the device is aligned with the optical fiber core and wherein the device is an active device or a passive device.
- 17. The method of claim 16, wherein etching the cavity includes etching into a buffer layer below the optical fiber core.
- 18. The method of claim 16, wherein etching the cavity includes etching into a substrate layer below the optical fiber core.
- 19. The method of claim 18, wherein the substrate layer includes a doped semiconductor region, whereby the doped semiconductor region can form part of the active device.
- 20. The method of claim 16, further comprising applying a metallization layer to the active device, whereby the metallization layer forms conduction paths for the active device.
- 21. The method of claim 20, wherein the metallization layer forms a mirror metallization.
- 22. A method to facilitate self aligned connections, wherein creating a device includes creating a self-aligned device that is self-aligned to an external fiber.
- 23. An integrated circuit device with an optical fiber core created using a selective etching process, the selective etching process comprising:
receiving a substrate composed of a first material including a buffer layer composed of a second material; forming a sacrificial layer composed of a third material on the buffer layer; forming an epitaxial blocking layer on the substrate, wherein the epitaxial blocking layer has windows exposing the sacrificial layer; forming optical components composed of a fourth material on exposed portions of the sacrificial layer; and performing an etching operation using a selective etchant to remove the sacrificial layer.
- 24. The integrated circuit device of claim 23, further comprising applying a cladding layer to the optical fiber core.
- 25. The integrated circuit device of claim 24, wherein receiving the substrate includes receiving the substrate without the buffer layer.
- 26. The integrated circuit device of claim 24,
wherein the first material comprises Si; wherein the second material is SiGe or SiGeC, whereby SiGeC allows growing a thicker buffer layer than using SiGe; wherein the third material comprises Si; wherein the fourth material comprises SiO2:GeO2; wherein the selective etchant is KOH or TMAH; and wherein the cladding layer comprises SiO2.
- 27. The integrated circuit device of claim 26, wherein the second material comprises SiGeC, wherein carbon is greater than or equal to one atomic percent.
- 28. The integrated circuit device of claim 26, wherein the second material comprises SiGeC, wherein carbon is less than or equal to one atomic percent.
- 29. The integrated circuit device of claim 23, wherein the buffer layer is an epitaxial layer.
- 30. The integrated circuit device of claim 23, wherein the sacrificial layer is an epitaxial layer.
- 31. The integrated circuit device of claim 23, wherein the optical fiber core is an epitaxial layer.
- 32. The integrated circuit device of claim 23, wherein the optical fiber core is split into multiple optical fiber cores to form an optical multiplexer.
- 33. The integrated circuit device of claim 23, wherein multiple optical fiber cores are combined into a single optical fiber core to form an optical demultiplexer.
- 34. The integrated circuit device of claim 23, wherein forming the optical fiber core includes:
forming a graded index optical fiber core; and shaping the optical fiber core prior to applying a cladding layer, wherein the optical fiber core may be rounded.
- 35. An integrated circuit device including an optical fiber core created using a selective etching process, wherein the integrated circuit device includes integrated active components created by a process comprising:
receiving a circuit device including the optical fiber core; etching a cavity into the circuit device, wherein the cavity passes through the optical fiber core; and creating a device within the cavity, wherein the device is aligned with the optical fiber core and wherein the device is an active device or a passive device.
- 36. The integrated circuit device of claim 35, wherein etching the cavity includes etching into a buffer layer below the optical fiber core.
- 37. The integrated circuit device of claim 35, wherein etching the cavity includes etching into a substrate layer below the optical fiber core.
- 38. The integrated circuit device of claim 37, wherein the substrate layer includes a doped semiconductor region, whereby the doped semiconductor region can form part of the active device.
- 39. The integrated circuit device of claim 35, the process comprising applying a metallization layer to the active device, whereby the metallization layer forms conduction paths for the active device.
- 40. The integrated circuit device of claim 39, wherein the metallization layer forms a mirror metallization.
- 41. The integrated circuit device of claim 36, further comprising creating a self-aligned device that is self-aligned to an external fiber.
- 42. The integrated circuit device of claim 35, further comprising creating a self-aligned device, wherein the self-aligned device is coupled across a gap.
- 43. The integrated circuit device of claim 42,
wherein the gap is filled with a medium; and wherein the medium is a gas, a liquid, or a solid.
RELATED APPLICATION
[0001] The subject matter of this application is related to the subject matter in co-pending non-provisional applications by the same inventors as the instant application entitled, “Method and Apparatus for Fabricating Structures Using Chemically-Selective Endpoint Detection,” having Ser. No. 09/900,300, and filing date Jul. 5, 2001, “Fabricating Structures Using Chemo-Mechanical Polishing and Chemically-Selective Endpoint Detection,” having Ser. No. 09/900,299, and filing date Jul. 5, 2001, and “Method of Fabricating Three-Dimensional Components Using Endpoint Detection,” having Ser. No. 10/061,501, and filing date Jan. 31, 2002.
GOVERNMENT LICENSE RIGHTS
[0002] This invention was made with United States Government support under Grant Numbers N00014-93-C-0114 and N00014-96-C-0219, awarded by the Office of Naval Research. The United States Government has certain rights in the invention.