Face-down bonding pin diode

Abstract

A face down bonding PIN diode having a semiconductor main body; a first region of a conductivity type, a surface of the first region being exposed at a first surface of a semiconductor main body; a third region of a conductivity type opposite that of the first region, the third region being positioned under the first region; a fifth region of substantially intrinsic semiconductor, the fifth region being positioned between the first region and the third region; a fourth region of the same conductivity type, the fourth region being extended vertically from the first surface to the third surface; a first electrode provided on a predetermined surface of the semiconductor main body connected to the first region; and a second electrode provided on the predetermined surface of the semiconductor main body, the second electrode being connected to the fourth region and connected to the third region through the fourth region.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a diode device, having both electrodes provided on a same surface thereof, capable of being directly connected to a conductive pattern on a circuit board without using lead wires.

2. Description of the Related Arts

Face-down bonding is a method for directly attaching integrated circuits to circuit boards such as printed boards and the like without using lead wires, conventionally used in the construction of various types of electronic circuits.

According to this method, electrodes are provided on the same surface of the integrated circuit, which is then turned face down and bonded directly to the circuit board. Since the integrated circuit consequently requires no packaging, the size of the integrated circuit can be scaled-down, lowering costs. For these reasons, face-down bonding is widely used.

However, although this method can be used for integrated circuits, chiefly provided with transistors, in which electrodes can be disposed on the same surface, it has not been possible to use face-down bonding in the case of diode devices having only two electrodes, such as, for instance, variable-capacity diodes.

FIG. 4 is a cross-sectional view illustrating a conventional variable-capacity diode device, in which region 3 and region 4 , having different conductive types, are provided within an epitaxial layer 2 on a silicon semiconductor substrate 1 , thereby forming a PN junction such as super abrupt junction.

In FIG. 4 , 5 is an insulating film comprising silicon oxide, 6 is an electrode connecting to region 4 , 15 is a lead wire, 16 and 17 are board-shaped terminals formed from lead frames.

Region 4 is exposed on the surface of the semiconductor main body which comprises the substrate 1 and the epitaxial layer 2 , enabling an electrode to be provided on the surface of region 4 . But, since region 3 lies beneath region 4 , an electrode 18 , which connects to region 3 , is provided on the underside of the substrate 1 .

The underside electrode 18 is securely joined to the terminal 16 , by inserting a gold ribbon into the joint interface between the substrate 1 and the terminal 16 and applying heat thereto, a eutectic bond being formed of the terminal 16 , the gold ribbon and the substrate.

The surface electrode 6 is connected to the terminal 17 by a gold lead wire 15 .

The terminals 16 and 17 only are exposed to the outside, and packaging, such as a resin sealant, is provided. The terminals 16 and 17 are then connected to a circuit board.

Thus it has not been possible to connect the conventional diode device to a circuit board by means of face-down bonding since the two electrodes cannot be provided on the same surface.

SUMMARY OF THE INVENTION

The present invention aims to provide a diode device, having both electrodes provided on the same surface thereof, which can be face-down bonded to a circuit board.

In order to achieve the above objective, the face down bonding PIN diode of the present invention comprises: a semiconductor main body; a first region of a conductivity type, said first region being provided within a semiconductor main body, a surface of said first region being exposed at the first surface of said semiconductor substrate; a third region of a conductivity type opposite that of said first region, said third region being provided within said semiconductor so as to be positioned under said first region; a fifth region of substantially intrinsic semiconductor, said fifth region being positioned between said first region and said third region so as to form junctions on said first region and said third region, respectively; a fourth region of the same conductivity type, said fourth region being provided within said semiconductor main body, a surface of said fourth region being exposed at the first surface of said semiconductor main body and extended vertically from said first surface to said third surface; a first electrode provided on a predetermined surface of said semiconductor main body so as to be connected to said first region; and a second electrode provided on the predetermined surface of said semiconductor, said second electrode being connected to said fourth region and connected to said third region through said fourth region.

Since a region at one end of the diode to form the diode junction is provided within the semiconductor main body, it is not possible to connect an electrode to this region at the surface of this region. Therefore, another region, which has the same conductivity type as the region provided within the semiconductor main body, is exposed at the surface, so as to enable the electrode to be connected at the surface via this other region.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings:

FIG. 1 is a cross-sectional view of a diode device according to an embodiment of the present invention;

FIG. 2 is a front view of FIG. 1 ;

FIG. 3 is a cross-sectional view of a diode device according to another embodiment of the present invention; and

FIG. 4 is a cross-sectional view illustrating a conventional variable-capacity diode device.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

There will be detailed below the preferred embodiments of the present invention, based on an example of a variable-capacity diode device, with reference to FIG. 1 and FIG. 2 . FIG. 1 shows a cross-sectional view, and FIG. 2 , a front view. Like members for those in FIG. 4 are designated by like reference characters.

In FIG. 1 , a high resistivity epitaxial layer 2 is provided on a low resistivity silicon semiconductor substrate 1 . The epitaxial layer 2 and the substrate 1 each have N-type conductivity.

A low resistivity first region 4 , having P-type conductivity, is provided in the epitaxial layer 2 so as to be exposed at the surface thereof. A low resistivity second region 3 , having N-type conductivity, is provided below the first region 4 in the epitaxial layer 2 . Region 4 and region 3 form a PN junction.

Furthermore, a low resistivity fourth region 8 , having N-type conductivity, is provided in the epitaxial layer 2 at a position separated from the regions 3 and 4 , extending from the surface of the epitaxial layer 2 to the substrate 1 .

A first electrode 6 and a second electrode 7 are respectively connected to the region 4 and the region 8 on the surface of the epitaxial layer 2 .

Furthermore, A bump 9 and a bump 10 , which are required for performing face-down bonding, are provided respectively on the electrode 6 and the electrode 7 .

In the above variable-capacity diode device, the electrode 6 , being the anode, connects directly to the region 4 ; and the electrode 7 , being the cathode, connects to region 3 through the region 8 , the substrate 1 (which here functions as a third region) and the thin section of the N-type epitaxial layer 2 .

In this case, face-down bonding can be performed since both the electrodes 6 and 7 are provided on the same surface of the epitaxial layer 2 of the semiconductor main body.

This type of variable-capacity diode device can be manufactured by a method in which the region 8 is first formed in the epitaxial layer 2 , according to a conventional manufacturing method of a variable-capacity diode device.

FIG. 3 shows a cross-sectional view of another embodiment of the diode device of the present invention, comprising a PIN diode device.

As FIG. 3 shows, an approximately intrinsic semiconductor (indicated by symbol 1 ) epitaxial layer 11 , having extremely high resistivity, is provided on a semiconductor substrate 1 . A P-type region 4 is provided in the epitaxial layer 11 , exposed at the surface thereof.

In other words, the intrinsic semiconductor epitaxial layer 11 is inserted between the N-type substrate 1 and the P-type region 4 , so that NI and PI junctions are formed between the substrate 1 and the epitaxial layer 11 and between the region 4 and the epitaxial layer 11 respectively, thereby forming a PIN diode device.

A region 8 , which is provided in the epitaxial layer 11 , extends from the surface of the epitaxial layer 11 to the substrate 1 . Furthermore, an electrode 7 is connected to the region 8 .

The electrode 7 connects to the substrate 1 through the region 8 which functions as a third region.

In the present embodiment, the substrate 1 , functioning as a third region, forms a NI junction which comprises one end region of the diode. This end region connects to the electrode 7 through the region 8 , which has the same type of conductivity.

In the first embodiment, the substrate 1 was not an end region of the diode providing a PN junction, but merely functioned in collaboration with region 8 in order to connect region 3 , comprising one end of the diode and providing a PN junction, to the electrode 7 .

The third region may form a junction and thereby create a diode, or alternatively, the third region may simply function as a conductor and not create a diode.

Furthermore, in the above example, the substrate 1 functioned as the third region, but it is also possible to provide a buried layer, separate from the substrate 1 , and to use this buried layer as the third region.

In the present embodiment, the region 8 was provided in one position near to the region 4 , which formed a diode junction and was exposed on the surface, but the region 8 may alternatively be provided in a circular shape around the region 4 .

Moreover, the above embodiments illustrated the examples of a variable-capacity diode device and a PIN diode device, but the present invention can be used in a wide variety of diode devices.

As explained above, the diode device of the present invention comprises a region, which is not exposed on the surface, connected to another region, which is exposed on the surface, the unexposed region being connected to an electrode on the surface via the exposed region.

Therefore, the electrodes can be provided on the same surface, so as to enable the device to be connected to a circuit board without the use of a lead wire.

Thus, the diode device of the present invention can be connected to a circuit board in the same way as an integrated circuit being provided transistors. Consequently the present invention offers the extremely practical advantages of being small-scale and cost-efficient.

While there have been described what are at present considered to be preferred embodiments of the invention, it will be understood that various modifications may be made thereto, and it is intended that the appended claims cover all such modifications as fall within the true spirit and scope of the invention.

Claims

1. A face down bonding PIN diode comprising:a semiconductor main body; a first region of a conductivity type, said first region being provided within a semiconductor main body, a surface of said first region being exposed at a first surface of said semiconductor main body; a third region of a conductivity type opposite that of said first region, said third region being provided within said semiconductor and positioned under said first region; a fifth region of substantially intrinsic semiconductor, said fifth region being positioned between said first region and said third region so as to form junctions on said first region and said third region, respectively; a fourth region of the same conductivity type as said third region, said fourth region being provided within said semiconductor main body, a surface of said fourth region being exposed at the first surface of said semiconductor main body and extending vertically from said first surface to said third region; a first electrode provided on the first surface of said semiconductor main body so as to be connected to said first region; and a second electrode provided on said first surface of said semiconductor main body, said second electrode being connected to said fourth region and connected to said third region through said fourth region.

2. A diode device according to claim 1, wherein said fifth region comprises an epitaxial layer, said first region and said fourth region are provided within an epitaxial layer and said third region comprises a semiconductor substrate.