Fast recovery diode and method for its manufacture

Information

  • Patent Grant
  • 6261874
  • Patent Number
    6,261,874
  • Date Filed
    Wednesday, June 14, 2000
    24 years ago
  • Date Issued
    Tuesday, July 17, 2001
    23 years ago
Abstract
A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recovery characteristics without requiring heavy metal doping.
Description




FIELD OF THE INVENTION




This invention relates to semiconductor diodes and more specifically relates to a novel fast recovery diode (FRD) with ultra-soft turn off characteristics.




BACKGROUND OF THE INVENTION




Fast recovery diodes are frequently used in motor control and power supply circuits having an inductive load. It is desirable that such FRDs have a “soft”recovery characteristic; that is, that its di/dt during turn off is limited to reduce the production of high voltage spikes in the inductive load circuit.




FRDs with soft recovery characteristics are described in U.S. Pat. No. 5,747,872 dated May 5, 1998. Those devices employ typical heavy metal doping, for example, gold or platinum, in selective areas of the semiconductor die to reduce lifetime in that area.




Heavy metal doping introduces complex processing steps and is not well controlled. Devices employing heavy metal doping also have a high negative temperature coefficient and are not easily connected in parallel. Further, the use of heavy metal in wafer fabrication facilities can adversely affect the processing operation in other portions of the facility.




It would be desirable to produce an ultra-soft recovery FRD diode in which lifetime in selected regions of the die is limited without the need for heavy metal doping.




BRIEF DESCRIPTION OF THE INVENTION




In accordance with the invention, a novel ultra-soft FRD device and process of its manufacture is provided which excludes heavy metal from the process and employs only a helium implant and E-beam irradiation in the process, creating a desired gradient of lifetime of minority carriers in the silicon.




In particular, after the formation of the top surface of the die (or wafer containing plural die), helium is implanted into the front surface of the die to a given depth, preferably about 20 microns. This implant may be followed by an anneal at about 350° C. This is followed by E-beam radiation over the full surface (to control the “tail” characteristic), followed by an anneal at about 300° C.




The helium implant dose is in the range of about 5E9 to 2E11/cm


2


and is preferably about 9E10 ions/cm


2


and creates localized vacancies at a depth within the silicon, preferably slightly removed from the P/N junction of the device. A subsequent E-beam radiation is carried out at about 32 kGray.




The final device is rated typically at 5 to 100 amperes at 1200 volts blocking. The device has a very soft recovery characteristic, making it ideal for use with motor control circuits.











BRIEF DESCRIPTION OF THE DRAWINGS





FIG. 1

is a cross-section through a small portion of the active area of a FRD structure.





FIG. 2

is a diagram of the doping concentration and defect location in the device of

FIG. 1

, in accordance with the invention.





FIG. 3

illustrates the soft recovery characteristics produced by the invention.











DETAILED DESCRIPTION OF THE DRAWINGS




Referring first to

FIG. 1

, there is shown a cross-section of a small portion of a cellular FRD device in which a silicon die


10


has an N





epitaxial layer


11


formed atop an N


+


body


12


. N


+


layer


12


could also be a diffused layer if desired. A plurality of spaced P diffusions


13


,


14


,


15


and


16


, are provided which are polygonal in topology. However, these diffusions may be spaced parallel elongated stripes.




A top aluminum anode contact


20


is sputtered or otherwise formed on the upper surface of layer


11


so that its contact to P regions


13


to


16


forms a respective P/N diode while its contact to the N





silicon surface between the P diffusions forms a Schottky diode.




By using a sufficiently large area and cooling, and by appropriately adjusting the N





concentration and thickness, the device can typically be made to carry up to 100 amperes in a forward direction with a forward voltage drop of less of about 2 volts at full forward current. The device can typically withstand about 1200 volts in the reverse blocking direction. These characteristics are useful for motor control circuits in which the device is typically connected in parallel with a power MOSFET or IGBT used to control the output to the motor. However, because such devices may have a high dIreverse/dt during turn off, a high voltage spike can be induced in an inductive circuit during diode turn off.




In accordance with the present invention, the lifetime of the silicon beneath and near the P/N junction is reduced, thus producing an ultra-soft turn off characteristic as shown in FIG.


3


.

FIG. 3

shows, in solid line, the current in the diode of

FIG. 1

during turn off. Thus, the current I reverses through zero at time T


1


and has a sharp slope (or snap back) through zero current with a high dIrec/dt, which will induce a high voltage spike in an inductive circuit.




In accordance with the invention, the recovery characteristic of the diode is made ultra-soft, as indicated by dotted lines in FIG.


3


. This characteristic has a much reduced dIrec/dt so that a smaller voltage will be induced in an inductive circuit. Further, this is accomplished without the use of heavy metal lifetime killing processes.




More specifically, as shown in

FIG. 2

, the P


+


region


13


and N


+


region


12


are illustrated, plotting the number of donor/receptor atoms versus depth from the top of the chip.




A first helium implant takes place to implant helium, as shown in dotted lines. The implant is distributed over a depth of about 10 to 30 microns and has a peak located at a depth of from about 15 to 25 microns, and preferably 20 microns from the top surface of die


10


and below diffusions


13


to


16


(which are about 6 microns deep). The helium implant is at a dose of about 5E9 to 2E11 atoms/cm


2


and is preferably about 9E10 to a depth of 10μ to 30μ, preferably 20μ below the silicon surface. The implant is then annealed at 350° C. for 30 to 60 minutes.




This implant creates defects in the silicon lattice which will reduce lifetime in that critical area.




An E-beam radiation step is next carried out at about 32 kGray to 64 kGray, to create further but uniformly distributed defects over the full volume of the silicon.




The E-beam radiation step is then annealed at 300° C. for 30-80 minutes.




The final diode has a very soft reverse recovery characteristic, as shown in FIG.


3


. Further, by avoiding heavy metal, the process is more controllable and the device will not have a negative temperature coefficient so that identical devices are easily connected in parallel.




Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein, but only by the appended claims.



Claims
  • 1. A process for the manufacture of a soft recovery diode comprising the steps of:(a) forming a P/N junction adjacent the top surface of a thin silicon wafer; (b) implanting helium into said wafer to a peak depth which is below but close to the bottom of said P/N junction to cause intentional defects at that depth; and (c) irradiating the full wafer with an electron beam to cause defects over the full depth of said wafer; (d) and wherein said wafer is free of heavy metal lifetime killing.
  • 2. The process of claim 1, wherein said helium implant step and said irradiation step are followed by respective anneals.
  • 3. The process of claim 1, wherein said P/N junction is interrupted laterally over the top surface of said wafer, and an anode contact overlies the full upper surface of said wafer.
  • 4. The process of claim 1, wherein said helium is implanted at a dose in the range of 5E9 to 2E11/cm2 and to a depth of from 10 to 30 microns from the anode surface of said device.
  • 5. The process of claim 2, wherein said helium is implanted at a dose in the range of 5E9 to 2E11/cm2 and to a depth of from 10 to 30 microns from the anode surface of said device.
  • 6. The process of claim 3, wherein said helium is implanted at a dose in the range of 5E9 to 2E11/cm2 and to a depth of from 10 to 30 microns from the anode surface of said device.
US Referenced Citations (1)
Number Name Date Kind
5747872 Lutz et al. May 1998
Foreign Referenced Citations (1)
Number Date Country
07106605 Apr 1995 JP