Claims
- 1. A FIR chip for use in a wireless subscriber unit wherein the subscriber unit includes a processor for transcoding an input signal to provide digital input symbols for demodulating a received output signal, for synthesizing digital output symbols from the demodulated output signal processor and for providing filtered digital input symbols, the FIR chip comprising:an internal address decoder for internal address decoding to allow the processor to access internal functions of the FIR chip; a control and status register which allows the processor to read the status of and control the internal functions of the FIR chip; a FIR filter for FIR filtering the digital input symbols; a transmit timer for control timing which allows the processor to control the FIR filter; and a receive timer for generating timing signals for timing transcoding operations and synthesizing operations connected to the processor.
- 2. The FIR of claim 1 further including a ringer control operatively associated with the control and status register, said ringer control permitting the processor to control a ringer circuit of the subscriber unit.
- 3. The FIR chip of claim 2 further including a watchdog timer circuit operatively associated with the control and status register for resetting said processor.
- 4. The FIR chip of claim 1 further including a sample buffer having operative association with the processor and for buffering receive data samples before the data samples are output to the processor.
- 5. The FIR chip of claim 1 further including a fanout buffer for receiving a master clock signal from the subscriber unit for buffering the master clock signal before being input to a receiver timer.
- 6. The FIR chip of claim 1 further including an external address decoder for operative association with the processor to permit the processor to access the remaining components of the subscriber unit.
- 7. A wireless subscriber unit includes a processor for transcoding an input signal to provide digital input symbols for demodulating a received output signal and from synthesizing digital output symbols for the demodulated output signal, the subscriber unit comprising a FIR chip including;an external address decoder means for internal address decoding connected to the processor, to allow the processor to access the internal functions of the FIR chip; a FIR filter for FIR filtering, connected to the processor to control the FIR filter; a transmit timer for control timing which allows the processor to control the FIR filter; a receive timer for generating timing signals for timing transcoding operations and synthesizing operations in the processor; a control and status register, connected to the processor, which allows the processor to read the status of and control the internal functions of an integrated circuit; a ringer control connected to the control and status register, said ringer control allows the processor to control a ringer circuit of the subscriber unit; a watchdog timer circuit, connected to the control and status register, for resetting said processor; a sample buffer for buffering received data samples before the data samples are output to the processor; a fanout buffer for receiving a master clock signal from the subscriber unit for buffering the master clock signal before being input to a CODEC timer; and an external address decoder, connected to the processor which allows the processor to access the remaining components of the subscriber unit.
Parent Case Info
This application is a continuation of application Ser. No. 10/223,750, filed Aug. 20, 2002, now U.S. Pat. No. 6,587,516, which is a continuation of application Ser. No. 09/593,307, filed Jun. 13, 2000, now U.S. Pat. No. 6,449,317; which is a continuation of application Ser. No. 09/228,140, filed Jan. 11, 1999, now U.S. Pat. No. 6,078,629, issued on Jun. 20, 2000; which is a continuation of application Ser. No. 08/881,339, filed Jun. 24, 1997, now U.S. Pat. No. 5,859,883, issued on Jan. 12, 1999; which is a continuation of application Ser. No. 08/587,008, filed Jan. 11, 1996, now U.S. Pat. No. 5,694,430, issued Dec. 2, 1997; which is a continuation of application Ser. No. 08/445,082, filed May 22, 1995, now U.S. Pat. No. 5,644,602, issued Jul. 1, 1997; which is a divisional of application Ser. No. 08/222,670, filed Apr. 4, 1994, abandoned; which is a continuation of application Ser. No. 07/940,662, filed Sep. 4, 1992, now U.S. Pat. No. 5,325,396, issued Jun. 28, 1994; which is a continuation of application Ser. No. 07/658,065, filed Feb. 20, 1991, now U.S. Pat. No. 5,146,473, issued Sep. 8, 1992; which is a continuation of application Ser. No. 07/394,497, filed Aug. 14, 1989, now U.S. Pat. No. 5,008,900, issued Apr. 16, 1991.
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Continuations (9)
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Number |
Date |
Country |
Parent |
10/223750 |
Aug 2002 |
US |
Child |
10/412456 |
|
US |
Parent |
09/593307 |
Jun 2000 |
US |
Child |
10/223750 |
|
US |
Parent |
09/228140 |
Jan 1999 |
US |
Child |
09/593307 |
|
US |
Parent |
08/881339 |
Jun 1997 |
US |
Child |
09/228140 |
|
US |
Parent |
08/587008 |
Jan 1996 |
US |
Child |
08/881339 |
|
US |
Parent |
08/445082 |
May 1995 |
US |
Child |
08/587008 |
|
US |
Parent |
07/940662 |
Sep 1992 |
US |
Child |
08/222670 |
|
US |
Parent |
07/658065 |
Feb 1991 |
US |
Child |
07/940662 |
|
US |
Parent |
07/394497 |
Aug 1989 |
US |
Child |
07/658065 |
|
US |