This application claims the benefit of Korean Patent Application No. P2005-0100927 filed in Korea on Oct. 25, 2005 which is hereby incorporated by reference.
1. Technical Field
The present invention relates to a display device, and more particularly to a flat panel display device that is adaptive for improving picture quality by compensating a panel defect by use of a circuit, and a picture quality controlling method on the panel defect.
2. Description of the Related Art
Flat panel display devices may have reduced weight and size, which has been a disadvantage of a cathode ray tube. A flat panel display device includes liquid crystal display, field emission display, plasma display panel, organic light emitting diode, and other emerging technologies.
The flat panel display devices may include a display panel for displaying a picture, and a panel defect that has been found in a test process in such a display panel. Herein, a mura or a panel defect means a display spot accompanying brightness difference on a display screen. Panel defects are mostly generated in a fabricating process, and might have a fixed form such as dot, line, belt, circle, polygon, or an undetermined form in accordance with the cause of their generation. Examples of a panel defect having such various forms are shown in FIGS. 1 to 3.
The panel defect might be connected to the defect of products in accordance with the degree, the defect of such products drops yield, and this leads to the increase of cost. Further, even though the product where the panel defect is found is shipped as a good product, the picture quality deteriorated due to the panel defect drops the reliability of the product.
Accordingly, various methods have been proposed in order to improve the panel defect. However, improvement methods of the related art are mainly for solving problems in the fabricating process, and there is a disadvantage in that it is difficult to properly deal with the panel defect generated in the improved process. Therefore, a need exists for an improvement in image display by compensating for the panel defect.
A picture quality controlling method on the panel defect includes measuring a brightness and a color difference in a panel defect location. In the panel defect location, a brightness or a color difference is different from that of at least one of a brightness or a color difference of a different part in a display panel. A compensation value related to the panel defect location is determined and a compensated video signal is generated using an input video signal and the compensation value. A display panel is then driven using the compensated video signal.
The invention can be better understood with reference to the following drawings and description. The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the figures, like referenced numerals designate corresponding parts throughout the different views.
Referring to
By analyzing the measured result, the picture quality control method on the panel defect judges the presence or absence of generation of the panel defect, at Act 404 and then if there is the panel defect in the sample flat panel display device, the picture quality control method of the flat panel display device sets a compensation value for compensating the brightness or color difference of the panel defect (Act 408). An input video data is modulated with the compensation value to compensate the brightness or color difference of the panel defect location. In Act 408, the picture quality control method of the flat panel display device determines the location and degree of the panel defect for each gray level from the result measured in the Act 404 (Act 406), and then determines the compensation value (Act 408).
The compensation value should be optimized for each location (Act 410) because the degree of unevenness of the brightness may be different in accordance with the location of the panel defect, and also should be optimized for each gray level in consideration of a gamma characteristic as illustrated in
The picture quality control method on the panel defect selectively adds to or subtracts from an input digital video data which is to be displayed at the panel defect location by use of the compensation value set in the Act 408, thereby modulating the corresponding digital video data (Act 412). Act 412 converts the input R/G/B digital video data into Y/U/V digital video data and expands the number of bits of Y data among the Y/U/V digital video data. The location where the Y/V/V digital video data are to be displayed and the gray level thereof are judged, so if the Y/U/V input digital video data are judged as the data to be displayed in the panel defect location, a pre-set compensation value is added to or subtracted from the ‘Y’ data. Y/U/V digital video data where the Y data are increased or decreased by the compensation value are converted into R/G/B digital video data to display in the screen of the display device, thereby compensating the panel defect.
For the input signal compensation at Act 412, the flat panel display device, as shown in
The liquid crystal display panel 103 has liquid crystal molecules injected between two substrates, i.e., a TFT substrate and color filter substrate. The data lines 106 and the gate lines 108 formed on the TFT substrate cross each other, and are in communication with each other. The TFT formed at the crossing part of the data lines 106 and the gate lines 108 supplies an analog gamma compensation voltage supplied through the data line 106 to a pixel electrode of the liquid crystal cell Clc in response to a scan signal from the gate line 108. The black matrix, the color filter and the common electrode (not shown) are formed on the color filter substrate. One pixel on the liquid crystal display panel 103 includes R sub-pixel, G sub-pixel and B sub-pixel. A common electrode formed in the color filter substrate may be formed in the TFT substrate based on an electric field application method. A polarizer having a vertical polarizing axis is adhered to each of the TFT substrate and the color filter substrate.
The compensation circuit 105 receives the input digital video data Ri/Gi/Bi from a system interface (not shown) to modulate the input digital video data Ri/Gi/Bi to be supplied to the panel defect location by use of the pre-set compensation value, thereby generating the compensated digital video data Rc/Gc/Bc.
The timing controller 104 generates agate control signal GDC that controls the gate drive circuit 102 and a data control signal DDC that controls the data drive circuit 101 by use of a vertical/horizontal synchronization signal Vsync, Hsync, a data enable signal DE and a dot clock DCLK supplied through the compensation circuit 105, and supplies the compensated digital video data Rc/Gc/Bc to the data drive circuit 101 in accordance with dot clocks DCLK.
The data drive circuit 101 receives the compensated digital video data Rc/Gc/Bc, converts the digital video data Rc/Gc/Bc into the analog gamma compensation voltage, and supplies them to the data lines 106 of the liquid crystal display panel 103 under control of the timing controller 104.
The gate drive circuit 102 supplies a scan signal to the gate lines 108, thereby turning on the TFT's connected to the gate lines 108 to select the liquid crystal cells Clc of one horizontal line to which the analog gamma compensation voltage is to be supplied. The analog gamma compensation voltage generated from the data drive circuit 101 is synchronized with the scan pulse to be supplied to the liquid crystal cells Clc of the selected one horizontal line.
In reference to
Referring to
The gray level of the input Y/U/V digital video data Yi/Ui/Vi, i.e., the data for the compensation value corresponding to the Y data, may be processed for each location of the panel defect along with the location of the panel defect. The compensation value corresponding to the Y data means a compensation value set in correspondence to each gray level which the Y data represents, or a compensation value set in correspondence to a gray level section which includes two or more gray levels. In case of setting the compensation value in correspondence to the gray level section, information for the gray level section, i.e., information of the gray level included in the gray level section, is also stored at the memory 116. The memory 116 might include a non-volatile memory such as EEPROM (electrically erasable programmable read only memory) with which the data for the compensation value and panel defect location can be renewed by the electrical signal from the external system.
It may be possible to transmit the panel defect compensation related data to EDI ROM (extended display identification data ROM) instead of EEFROM, and the EDI ROM can store the panel defect compensation related data at a separate storage space. The EDI ROM stores seller/buyer identification information and the variables and characteristics of a basic display device other than the panel defect compensation related data. When storing the panel defect compensation data at the EDI ROM instead of the EEPROM, a ROM recorder (not shown) transfers the panel defect compensation data through a DDC (data display channel). Hereinafter, the memory at which the panel defect compensation data are stored will be explained assuming that it is an EEPROM.
The interface circuit 117 provides a communication between the compensation circuit 105 and the external system, and the interface circuit 117 is designed according to the communication standard protocol such as I2C or other bus system communication standards. Examples of the signals UCD and UPD include data signals, clock signals, or other input signals. The external system can read the data stored at the memory 116 through the interface circuit 117 or may modify the data. The data for the compensation value CD and the pixel location PD stored at the memory 116 are required to be renewed because of a change in process, or a difference between application model. A user supplies the data for the compensation value UCD and the pixel location UPD, which are desired to be renewed., from the external system so that the data stored at the memory 116 can be modified.
To renew the pixel location PD and the compensation value CD stored at the memory 116, the register 118 temporarily stores the pixel location UPD and compensation value UCD data transmitted through the interface circuit 117.
The first converter 120 converts the input R/G/B digital video data Ri/Gi/Bi having the R/G/B data of 8/8/8 bits into the input Y/U/V digital video data Yi/Ui/Vi having the Y/U/V data of 10/10/10 bits through a coding process by use of the following mathematical formulas 1 to 3 below. Herein, the Y data among the Y/U/V data are data inclusive of the brightness information, and the U/V data are data inclusive of the color difference information.
Y=0.299Ri+0.587Gi+0.114Bi [Mathematical Formula 1]
U=−0.147Ri−0.289Gi+0.436Bi=0.492(Bi−Y) [Mathematical Formula 2]
V=0.615Ri−0.515Gi−0.100Bi=0.877(Ri−Y) [Mathematical Formula 3]
The compensating part 115 receives the input Y/U/V digital video data Yi/Ui/Vi from the first converter 120 and if the input Y/U/V digital video data Yi/Ui/Vi is the data to be displayed in the panel defect location, the Y data among the input Y/U/V digital video data Yi/Ui/Vi are increased or decreased by the pre-set compensation value to generate the compensated Y/U/V digital video data Yc/Ui/Vi.
The compensating part 115, as shown in
The location judging part 125 judges a location where the input Y/U/V digital video data Yi/Ui/Vi are to be displayed on the liquid crystal display panel 103, using any one or more of vertical/horizontal synchronization signal Vsync, Hsync, dot clock DCLK and data enable signal DE. It may be possible to judge the location where the input Y/U/V digital video data Yi/Ui/Vi are to be displayed on the liquid crystal display panel 103, by counting the horizontal synchronization signal Hsync and the dot clock DCLK.
The gray level analyzer 126 analyzes the gray level area of the input digital video data Ri/Gi/Bi. The gray level of the input digital video data Ri/Gi/Bi or the gray level section inclusive of the gray level is analyzed.
The address generating part 127 receives the location information of the input digital video data Ri/Gi/Bi from the location judging part 125 and the gray level information of the input digital video data Ri/Gi/Bi from the gray level analyzer 126, and generates a read address for accessing the address of the memory 116 at which the compensation value corresponding to the location and gray level of the input digital video data Ri/Gi/Bi.
The operating part 128 generates the compensated Y/U/V digital video data Yc/Ui/Vi by adjusting, such as increasing or decreasing, the Y data Yi of the input Y/U/V digital video data Yi/Ui/Vi by the compensation value loaded from the address of the memory 116 corresponding to the read address which is generated by the address generating part 127.
The second converter 121 converts the compensated Y/U/V digital video data Yc/UiVi having the Y/U/V data of 10/10/10 bits into the compensated R/G/B digital video data Rc/Gc/Bc having the R/G/B data of 8/8/8 bits through the coding process by use of the following mathematical formulas 4 to 5.
R=Yc+1.140Vi [Mathematical Formula 4]
G=Yc−0.395Ui−0.581Vi [Mathematical Formula 5]
B=Yc+2.032Ui [Mathematical Formula 6]
The liquid crystal display device converts the R/G/B data to be displayed in the panel defect location into the Y/U/V video data where the brightness component and the color component are separated, by compensating for the fact that the human eye is more sensitive to a brightness difference than to a color difference. The number of bits of the Y data inclusive of the brightness information among them is expanded to control the brightness of the panel defect location. There may be an advantage in that it is possible to make a minute adjustment for the panel defect location.
The compensation circuit like the above can be integrated into one chip along with the timing controller 104, and the case of applying the compensation circuit 105 to the liquid crystal display device is given as an example, but the compensation circuit 105 can be applied to the other flat panel display devices other than the liquid crystal display device.
As described above, the flat panel display device and the picture quality control method compensates the panel defect by use of the circuit. There may be an advantage in that it may be possible to more properly deal with various shapes of panel defect following panel production than the panel defect compensation in the process. Further, the flat panel display device and the picture quality control method converts the R/G/B data to be displayed in the panel defect location into the Y/U/V video data where the brightness component and the color component are separated, and controls the brightness of the panel defect location by adjusting, such as by expanding the number of bits of the Y data inclusive of the brightness information. It maybe possible to realize natural and high-grade picture quality because the minute adjustment of the brightness for the panel defect location is possible.
Although the disclosure has been explained by the examples shown in the drawings described above, it should be understood to the ordinary skilled person in the art that the disclosure is not limited to the embodiments, but rather that various changes or modifications thereof are possible. Accordingly, the scope of the disclosure shall be determined only by the appended claims and their equivalents.
Number | Date | Country | Kind |
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P2005-0100927 | Oct 2005 | KR | national |