This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2005-104429, filed Mar. 31, 2005, the entire contents of which are incorporated herein by reference.
1. Field
One embodiment of the invention relates to flat-panel video display apparatus using a field emission type element and plasma light-emitting element, and to its drive method. Moreover, the present invention relates to a flat-panel video display apparatus, which can improve brightness without reducing vertical resolution.
2. Description of the Related Art
There has been known a flat-panel image display apparatus having many electron emission elements arranged facing a fluorescent surface as a next-generation image display apparatus. The electron emission element has various kinds, and in general, is called a field emission display (hereinafter, referred to as FED). Of the FEDs, a display apparatus using a surface conductance emitter is called a surface conductance electron emission display (hereinafter, referred to as SED).
The image display apparatus has front and backside substrates, which are arranged facing each other with a predetermined distance. These substrates form a vacuum vessel in a manner of mutually welding their peripheral edges via rectangular sidewalls. In order to support an atmospheric load applied to the backside and front substrates, several support members are interposed between these substrates.
The inner surface of a pixel area of the front substrate is formed with a fluorescent surface including red (R), Blue (B) and green (G) fluorescent material layers. On the other hand, the inner surface of the backside substrate is provided with a large number of electron emission elements, which emit electrons for exciting the fluorescent materials to emit light.
Moreover, many scanning lines and signal lines are formed like a matrix, and connected to each electron emission element. A voltage corresponding to a video signal is applied to the electron emission element.
An acceleration voltage is applied to the fluorescent surface. An electron beam emitted from the electron emission element is accelerated via the acceleration voltage, and then, collates with the fluorescent surface. By doing so, the fluorescent material emits light; therefore, a video image is displayed.
In the image display apparatus, the distance between the front and backside substrates is set to several millimeters (mm) or less. Therefore, the image display apparatus is lightened and thinned as compared with a cathode ray tube (CRT) used as a display for current televisions and computers.
Meanwhile, in the foregoing image display apparatus, the technique of preventing flicker from occurring due to interlace scanning and the technique of improving the brightness of a screen have been studied. The foregoing related techniques are disclosed in Japanese Patent Application Publications (KOKAI) No. 2004-219884, and No. 2004-264790.
According to the foregoing techniques of preventing flicker from occurring due to interlace scanning and improving the brightness of a screen, a 2-line simultaneous drive system is employed. Specifically, horizontally arranged electron emission elements are successively driven by two lines, and not by one line. The driving is performed in the manner described above, and thereby, flicker is reduced as compared with the conventional case of successively driving these elements by one line according to interlace scanning. Moreover, the brightness is improved.
However, the same image signal is supplied to two lines; for this reason, vertical resolution is reduced. In order to solve the reduction of the vertical resolution, a technique of using a vertical filter has been studied.
However, according to the foregoing technique, a circuit such as vertical filter must be newly added to an image processing circuit. In addition, power consumption is increased because the circuit is added and two lines are driven.
An object of the embodiments is to provide a flat-panel video display apparatus, which improves a brightness of a screen at low price and low power consumption, and reduces flicker, and further, prevents vertical resolution from being reduced, and to provide its drive method.
In order to achieve the foregoing object, according to one embodiment, if the scanning line is driven every several lines, a driven main scanning line is supplied with a first voltage. On the other hand, the other simultaneously driven sub-scanning line is supplied with a second voltage lower than the first voltage. Or, there is provided means for supplying a third voltage having a drive period shorter than the main scanning line. Moreover, the voltage for driving the sub-scanning line is controlled in accordance with the picture pattern of an image signal.
The foregoing means is provided if only voltage selection of the vertical drive circuit and drive sequence are changed. Therefore, it is possible to realize a flat-panel video display apparatus, which reduces power consumption at low price.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
A general architecture that implements the various feature of the invention will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the invention and not to limit the scope of the invention.
Various embodiments according to the invention will be described hereinafter with reference to the accompanying drawings.
A video signal is inputted to an input terminal 11, and then, supplied to a video signal processing unit (or section) 13 via an input circuit 12. The input circuit 12 extracts a synchronizing signal from the inputted video signal to generate clock synchronous with the video signal. Simultaneously, the input circuit 12 generates various timing signals, and thereafter, supplies them to a controller 14.
The video signal processing unit 13 makes signal processing such as correction with respect to the video signal inputted from the input circuit 12, and thereafter, outputs it to a signal line drive unit 15.
A one-scanning line signal from the signal line drive unit 15 is simultaneously supplied to the corresponding electron emission source group of a display unit 17. Scanning line drive units 16a and 16b select the electron emission source group. The scanning line drive units 16a and 16b are provided to drive allocated left and right sides of the scanning line of the display unit 17, respectively. In this case, only one of the scanning line drive units may be provided.
The foregoing signal line drive unit 15, scanning line drive units 16a and 16b need to apply a proper voltage to signal lines and scanning lines. The power system will be described below.
A timing signal from the controller 14 is supplied to a power controller 20. The power controller 20 controls first and second power units 21 and 22. The second power unit 22 determines a reference (basic) voltage of the signal supplied from the signal line drive unit 15 to the signal line. The first power unit 21 outputs two voltages, that is, voltage |Vy1| and voltage |Vy2|. Significance and effect given by obtaining the foregoing two voltages |Vy1| and |Vy2| will be described later. In
In
The foregoing picture pattern information is used to set the luminance of a sub-scanning line with respect to a main scanning line as described later. The picture pattern information controls the amplitude or pulse width of the output voltage Vy2 of the first power unit 21 via the power controller 20.
For example, the average picture level (APL) calculation unit 23a calculates a one-screen average luminance on, and determines a voltage value or pulse width of a power supply voltage applied to the sub-scanning line. Moreover, the APL calculation unit 23a determines the foregoing voltage value or pulse width from the one-screen average luminance. The line average luminance calculation unit 23b calculates an average luminance of the main scanning line to obtain a luminance of the sub-scanning line from the calculated average luminance value. The histogram calculation unit 23c properly divides the screen into some areas, and thereafter, obtains a histogram from the divided area.
The foregoing signal line is connected to the signal line drive unit 15; on the other hand, the scanning line is connected to the scanning line drive unit 16a, 16b. A voltage applied to each of signal and scanning lines will be described below.
Vf=absolute value Vy+absolute value Vx
As seen from
According to the embodiment, a horizontal line (scanning line) is driven by several lines. In this case, a driven main scanning line is supplied with the first voltage Vy. On the other hand, the simultaneously driven other sub-scanning line is supplied with a second voltage lower than the first voltage |Vy|. Or, there is provided a means for supplying a third voltage having a drive period shorter than the drive period of the main scanning line.
The picture pattern information is given as a factor of setting the second or third voltage. Specifically, the picture pattern determination unit 23 acquires picture pattern information using average picture level calculation unit 23a or line average luminance calculation unit 23b or histogram calculation unit 23c. The foregoing picture pattern information is used for controlling the amplitude or pulse width of the output voltage |Vy2| of the first power unit 21 via the power controller 20. For example, if peripheral images are bright, control is carried out as they are bright; on the other hand, if the images are dark, control is carried out as they are dark. Moreover, the picture pattern information acquired using average picture level calculation unit 23a or line average luminance calculation unit 23b or histogram calculation unit 23c may be used independently. The voltage |Vy2| may be manually controlled from the outside.
The foregoing voltages |vy1| and |Vy2| are obtained from the first power unit 21 shown in
The Vy2 amplitude or pulse width from the first power unit 21 is set according to the result obtained in a manner that the power controller 20 controls the first power unit 21 based on the preceding picture pattern information. Therefore, in the apparatus, the brightness of the sub-scanning line is automatically controlled in accordance with the picture pattern to have a luminance suitable to peripheral brightness. As a result, flicker is reduced. Moreover, the vertical resolution is effectively prevented from being reduced.
According to the foregoing embodiment, the APL calculation unit 23a is newly provided. However, a display apparatus having the APL calculation unit 23a is able to use an output from the existing APL calculation unit. Thus, manufacture cost is prevented from increasing. Likewise, the output from existing line average luminance calculation unit and histogram calculation may be progressively used so long as the apparatus includes them.
While certain embodiments of the inventions have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Number | Date | Country | Kind |
---|---|---|---|
2005-104429 | Mar 2005 | JP | national |