Claims
- 1. An integrated circuit chip comprising:a substrate; an opening in said substrate, said opening having at least one step; a first conductor in said opening below said step; a first diffusion region in said substrate adjacent said first conductor and below said step; a gate conductor over said step and in said opening; a second conductor over said substrate adjacent said gate conductor; and a second diffusion region in said substrate adjacent said second conductor.
- 2. The integrated circuit chip in claim 1, wherein said opening includes:a lithographically formed gate opening; a strap opening aligned with said gate opening using first spacers; and an isolation opening aligned with said strap opening using second spacers.
- 3. The integrated circuit chip in claim 2, further comprising an isolation material filling said isolation opening, wherein said isolation material comprises a first portion of an active area isolation region, said integrated circuit chip further comprising active area stripes forming a second portion of said active area isolation region.
- 4. The integrated circuit chip in claim 2, wherein said first spacers and a portion of said second spacers are removed to form said step in said opening, wherein said second spacers comprise said first conductor.
- 5. The integrated circuit chip in claim 2, wherein said gate opening is wider than said strap opening and said strap opening is wider than said isolation opening.
- 6. The integrated circuit chip in claim 1, wherein a voltage in said gate conductor forms a conductive region in said substrate adjacent said step, said conductive region electrically connecting said first conductor and said second conductor.
- 7. The integrated circuit chip in claim 1, wherein said opening is formed over a deep trench capacitor, said first conductor bisecting a plane of said deep trench capacitor.
- 8. The integrated circuit chip in claim 1, wherein said first conductor comprises a source region, said second conductor comprises a drain region and said integrated circuit chip comprises a partially vertical transistor.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a division of U.S. application Ser. No. 09/311,471, now U.S. Pat. No. 6,190,971, filed May 13, 1999.
US Referenced Citations (25)