Claims
- 1. A structure which comprises:
- a memory;
- an input circuit coupled to receive a memory address, a read/write control signal and write data to be written into the memory, said input circuit including one or more storage registers for storing the write data to be written into the memory prior to writing the write data into the memory, the storage registers being capable of receiving and storing the write data on a rising edge of a clock signal; and
- a logic circuit for causing the stored write data to be written from the input circuit into the memory during a pth write operation following the write operation during which said write data was placed in said storage registers, while causing the write data to be held in the storage registers during any intervening read and write operations, where p is a selected integer.
- 2. A structure as in claim 1 including:
- means for holding the write data in said storage registers during one or more read operations immediately following the write operation during which said write data was placed in said storage registers.
- 3. A structure as in claim 1 including:
- means for reading out read data from said memory or from one of said storage registers during one or more read operations following said write operation, said read data being read from one of said storage registers when the memory address to be read from the structure corresponds to the memory address of the write data previously stored in one of said storage registers, and said read data being read from the memory when the memory address of said read data does not correspond to the memory address of the write data previously stored in one of said storage registers.
Parent Case Info
This application is a division of application Ser. No. 08/635,128, filed Apr. 19, 1996.
US Referenced Citations (13)
Non-Patent Literature Citations (1)
Entry |
Prince, Semiconductor Memories: A Handbook of Design, Manufacture and Application, 2d ed., 1991, pp. 467-472. |
Divisions (1)
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Number |
Date |
Country |
Parent |
635128 |
Apr 1996 |
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