Fuse box reducing damage caused by laser blowing and cross talk, and method of manufacturing the same

Abstract

Provided are a fuse box that simultaneously prevents damage caused by laser blowing and cross talk between the fuses and a method of manufacturing the same. In a fuse box having an open region in which fuses are opened by laser blowing and a bundle region in which fuse opens do not occur, a capping layer, adjacent to the open region, having a metal layer and an insulation layer covers the outermost fuses in the bundle region, thereby reducing the influence of laser blowing of fuses in the bundle region, and preventing capacitive coupling caused by the formation of a parasitic capacitor between fuse lines and an insulation layer therebetween. Accordingly, cross talk due to the capacitive coupling can be prevented, thereby enhancing the reliability of a fuse circuit. Lower fuses can be disposed in a lower layer in the bundle region, thereby forming a two-layered fuse box.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

Various aspects of the invention will become more apparent in view of the attached drawing figures, which are provided by way of example, not by way of limitation, in which:

FIG. 1 is an image illustrating a defect in which adjacent fuse lines are bridged when a fuse is opened by performing laser blowing, according to conventional art;

FIG. 2 is an image illustrating a cross-sectional view of fuse lines on which a capping layer is formed, according to conventional art;

FIG. 3 is a graph of capacitance of a capacitor formed between a fuse pattern versus a distance between fuses in the fuse pattern;

FIG. 4 is a plan view of an embodiment of fuses in a fuse box according to an aspect of the present invention;

FIG. 5 is a cross-sectional view of the fuse box of FIG. 4 taken along a line I-I′;

FIGS. 6A through 6G illustrate an embodiment of a method of manufacturing a fuse box, according to another aspect of the present invention; and

FIG. 7 is a cross-sectional view of an embodiment of fuses in a fuse box according to yet another aspect of the present invention.

Claims

1. A fuse box comprising: a first fuse region including a first plurality of fuses;a second fuse region adjacent to the first fuse region, the second fuse region including a second plurality of fuses, wherein a second fuse interval in the second fuse region is narrower than a first fuse interval in the first fuse region; anda capping layer, adjacent to the first fuse region, covering a top side and an lateral sides of at least one outermost fuse from the second plurality of fuses in the second fuse region.

2. The fuse box of claim 1, wherein the first plurality of fuses and the second plurality of fuses are formed of one of Al, Cu, and W.

3. The fuse box of claim 1, wherein the capping layer comprises: at least one insulation layer covering the top side and the lateral sides of the at least one outermost fuse; andat least one metal layer disposed on top of the at least one insulation layer.

4. The fuse box of claim 3, wherein the at least one insulation layer has a low dielectric constant in the range of about 1.5 to 4.5.

5. The fuse box of claim 4, wherein the at least one insulation layer is formed of plasma enhanced tetraethyl orthosilicate (PE-TEOS).

6. The fuse box of claim 1, wherein the first fuse interval is in the range of about 1.5 to 2.5 μm.

7. The fuse box of claim 1, wherein the second fuse interval is in the range of about 0.2 to 0.7 μm.

8. The fuse box of claim 1, wherein heights of fuses not covered by the capping layer in the second fuse region is in the range of about 1500 to 3000 Å, and height of the at least one outermost fuse in the second fuse region that is covered by the capping layer is in the range of about 4000 to 5000 Å.

9. The fuse box of claim 1, further comprising: a lower fuse pattern disposed in a layer having formed thereupon the first fuse region and the second fuse region.

10. The fuse box of claim 9, wherein the lower fuse pattern is disposed under the second fuse region.

11. A method of forming a fuse box, comprising: on a semiconductor substrate, forming a fuse pattern comprising a first plurality of fuses in a first use region and a second plurality of fuses in a second fuse region adjacent to the first fuse region, wherein a second fuse interval in the second fuse region is narrower than a first fuse interval in the first fuse region;forming a first insulation layer on the fuse pattern;forming a first material layer pattern by forming a first material layer on the first insulation layer and patterning the first material layer adjacent to the first fuse region, covering at least one outermost fuse among the fuses in the second fuse region;forming a second insulation layer on the first material layer pattern;selectively etching the second insulation layer and the first insulation layer to expose the first plurality of fuses in the first fuse region and the second plurality of fuses in the second fuse region that are not covered by the first material layer pattern, thereby forming a capping layer comprising the first material layer pattern and the first insulation layer pattern covering a top side and lateral sides of the at least one outermost fuse.

12. The method of claim 11, wherein the fuse pattern is formed of a metal layer.

13. The method of claim 11, wherein the first insulation layer is formed of PE-TEOS.

14. The method of claim 11, wherein the first material layer is a metal layer.

15. The method of claim 11, wherein, in the etching of the first insulation layer and the second insulation layer, fuses from the first plurality of fuses and the second plurality of fuses not covered by the capping layer are etched to be a predetermined height.

16. The method of claim 11, wherein the fuse pattern is simultaneously formed with a first metal wire pattern.

17. The method of claim 16, wherein the first material layer pattern is formed of a metal layer, and is simultaneously formed with a second metal wire pattern.

18. The method of claim 11, before the forming of the fuse pattern having the first fuse region and the second fuse region, further comprising: forming a lower fuse pattern on the semiconductor substrate; andforming an insulation layer on the lower fuse pattern.

19. The method of claim 18, wherein the lower fuse pattern is disposed under the second fuse region.

20. The method of claim 18, wherein the lower fuse pattern is simultaneously formed with a first metal wire pattern.

21. The method of claim 20, wherein the fuse pattern having the first fuse region and the second fuse region is simultaneously formed with a second metal wire pattern.

22. The method of claim 21, wherein the first material layer pattern is formed of a metal layer, and is simultaneously formed with a third metal wire pattern.

23. A method of forming a fuse box comprising: forming a first metal layer on a semiconductor substrate;patterning the first metal layer to form a fuse pattern which comprises a first plurality of fuses in a first fuse region and a second plurality of fuses in a second fuse region adjacent to the first fuse region, the second plurality of fuses having a second fuse interval that is narrower than a first fuse interval in the first fuse region;forming a first insulation layer on the fuse pattern;forming a second metal layer on the first insulation layer;patterning the second metal layer to form a capping pattern, adjacent to the first fuse region, on the outermost fuses from among fuses in the second fuse region;forming a second insulation layer on the capping pattern;etching the second insulation layer and the first insulation layer to expose the first plurality of fuses in the first fuse region and the second plurality of fuses in the second fuse region that are not covered by the capping pattern, to form a protection fuse pattern, adjacent to the first fuse region, wherein the outermost fuses, among the fuses in the second fuse region are covered by the capping pattern and the first insulation layer disposed under the capping pattern.

24. The method of claim 23, wherein the fuse pattern is simultaneously formed with a first metal wire pattern.

25. The method of claim 24, wherein the capping pattern is simultaneously formed with a second metal wire pattern.