Claims
- 1. A fuse element for use within an integrated memory which is formed on an insulation layer mounted on a semiconductor substrate having said integrated memory formed thereon and prepared from a prescribed material to be thermally broken off in case of need, comprising:
- a melting away portion;
- connecting portions which are integrally formed at both ends of said melting away portions with a greater width than that of said melting away portion for connecting said melting away portion to said integrated memory;
- each of said connecting portions being provided with a plurality of paired step sections for increasing the heat capacity of said connecting portions, said plurality of paired stepped sections tightly contacting the surface of corresponding paired step sections formed on said insulating layer, each said paired step section of said connecting portion including a first step which steps down from a first level to a second level and a second step which steps up from said second level to a third level coplanar with the said first level.
- 2. The fuse element according to claim 1, wherein said prescribed material of said fuse element is polycrystalline silicon.
- 3. The fuse element according to claim 1, wherein said prescribed material of said fuse element is aluminum.
Priority Claims (1)
Number |
Date |
Country |
Kind |
57-35800 |
Mar 1982 |
JPX |
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Parent Case Info
This application is a continuation of application Ser. No. 467,296 filed Feb. 17, 1983, abandoned.
US Referenced Citations (7)
Foreign Referenced Citations (2)
Number |
Date |
Country |
53-66380 |
Jun 1978 |
JPX |
57-24565 |
Feb 1982 |
JPX |
Non-Patent Literature Citations (1)
Entry |
Rand, "Reliability of LSI Memory Circuits Exposed to Laser Cutting"; Electro Scientific Industries, Inc., Technical Article TA-34; Apr. 1979. |
Continuations (1)
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Number |
Date |
Country |
Parent |
467296 |
Feb 1983 |
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