1. Field of the Invention
The present invention relates to a fuse repair circuit, and more particularly to a repair fuse circuit and its operating method that adopt a metal oxide semiconductor transistor.
2. Description of Prior Art
At present, fuse bit is used extensively in many areas, such as an application that requires a permanent programmed numeric value having one or more bits. In the application of a temperature sensor, the change of a temperature parameter of a metal oxide semiconductor (MOS) varies according to different manufacturing processes. If a chip is produced and the ungraded temperature sensor chip is not corrected, the measured value will have no significance. Therefore, it is necessary to use an additional parameter to program the chip for its normal operation.
Referring to
If the voltage source VDD supplies a current and the fuse F1 is not blown, there will be a small voltage drop at both ends of the fuse F1, such that the voltage at the node 10 will nearly equal to the voltage source VDD, and the output of the inverter U3 will be logical low. If the transistor MNO is electrically connected, the fuse F 1 will be blown, and the current I1 will make the voltage at the node 10 close to the ground voltage, and the output of the inverter U3 will become logical high. Therefore, the output status of the inverter U3 is programmable. If the fuse F1 is not blown, then a tiny current will pass through the fuse F1 and the transistor MN1. The fuse repair cells of this sort usually consume a considerable amount of electric power.
In summation of the description above, the prior art fuse repair circuit inputs a control signal TRIM to a gate of the transistor MNO. Due to a possible manufacturing error of the transistor, the voltage supplied to the transistor may be deviated, and thus affecting the current passing through the fuse F1. As a result, the fuse F1 may be blown or other components may be damaged.
The present invention is to overcome the shortcomings of the prior art and avoid the existing deficiencies by providing a fuse repair circuit that comprises a voltage source, a switch, and a fuse, and a first end of the fuse is connected to a voltage source through the switch, and a second end of the fuse is connected to a ground voltage, wherein a control signal controls the switch whether or not to blow the fuse, and the signals outputted from the first and second ends of the fuse are detected to confirm whether or not the fuse is blown.
Another, the present invention is to provide a method for controlling the blowing of a fuse, wherein a voltage source is provided and connected to a first end of the fuse through a switch, and a second end of the fuse is connected to a ground voltage. If the switch is electrically connected, the voltage source will provide a current passing through the fuse from the switch to blow the fuse.
Further, the present invention is to provide a method of detecting whether or not a fuse is blown, wherein a voltage source is provided and connected to a first end of the fuse through a switch, and a second end of the fuse is connected to a ground voltage, and a potential difference detected from the first and second ends of the fuse is used for determining whether or not the fuse is blown.
The features of the invention believed to be novel are set forth with particularity in the appended claims. The invention itself however may be best understood by reference to the following detailed description of the invention, which describes certain exemplary embodiments of the invention, taken in conjunction with the accompanying drawings in which:
The technical characteristics, features and advantages of the present invention will become apparent in the following detailed description of the preferred embodiments with reference to the accompanying drawings.
Referring to
Referring to
Further, a first check circuit C1 and a second check circuit C2 are used for checking the status (such as blown or electrically connected) of the fuse F1. The two voltages at nodes N2, N7 are the inputs of a comparator U0. After the comparator U0 compares the voltage, a numeric value of “High” or “Low” is outputted. The outputs of the comparator U0 can tell us whether or not the fuse is blown.
At the beginning, an enable signal EN, a first measured signal MEA1, a second measured signal MEA2, and a control signal, TRIM are logical low, and thus the output of the comparator U0 is also logical low. The control signal TRIM is a signal for controlling the blowing of the fuse F1, and if the control signal TRIM is set to logical high, then a large current will flow from the voltage source VDDF towards the ground voltage GND and then will pass through the fuse F1. The input signals EN, MEA1 and MEA2 are enable signals of the circuits C1, C2, so that the circuits C1, C2 can check the fuse repair status. If the fuse is blown, then the output of the comparator U0 will be changed from logical low to logical high. In
In
In other words, if the fuse repair circuit C3 is not selected for writing data, then the control signal TRIM will be set to logical low, and the switch MN0 will stop the current flowing between VDDF and GND, and the fuse F1 is not blown. If the input signals EN, MEA1 are set to logical high and the input signal MEA2 to logical low, the circuits C1, C2 will measure the voltage between the nodes N0, N1. Since the fuse F1 is not blown, therefore the voltages at nodes N5, N6 are pulled close to logical low, and then the node N3, N4 are logical low. Since the two inputs of the comparator U0 are both logical low, the output OUT of the comparator U0 will output a logical low, indicating that the fuse cell stores a numeric value of “low”.
To end the fuse programming procedure, the input signals EN, MEA1, MEA2 and the control signal TRIM are set to logical low, and thus the VDDF is floating. Such setup can prevent possible power loss between the circuit C1 and the ground GND or between the circuit C2 and the ground GND.
If the control signal TRIM received by the fuse repair circuit C3 is set to 5 volts (so that the switch MN0 is electrically connected), the power supplied by the voltage source VDDF for the fuse repair will pass through the switch MN0 (which is an NMOS transistor). On the other hand, if the control signal TRIM is set to 0 volt (so that the switch MN0 is turned off), the voltage source VDDF for the fuse repair will be disconnected. Since the switch MN0 is an NMOS transistor, therefore the voltage source VDDF for the fuse repair supplied to the switch MN0 will not have a voltage limitation.
If the switch MN0 is a PMOS transistor, the voltage supplied by the voltage source VDDF for the fuse repair will be less than 5.8 volts (assumed that the absolute critical voltage of the PMOS transistor is 0.8 volt). If the voltage supplied by the voltage source VDDF for the fuse repair is greater than or equal to 5.8 volts, the switch MN0 will be connected electrically and damaged, regardless of the voltage of the control signal TRIM being 0 volt or 5 volts.
Since the voltage VDDF is used during the repair only, therefore the voltage VDDF will be in a floating state after the repair, and the control signal TRIM will be set to logical low permanently. When data is read, the input signals EN, MEA2 are set to logical high and the input signal MEA1 is set to logical low. If the fuse repair cell is programmed (in other words, the fuse F1 is blown), then the node N1 will form an open circuit. If the voltage at the node N0 is not logical low, then the voltage at the node N1 will be logical low. Thus, the voltage at the node N2 will be logical low and the voltage at the node N7 will be logical high. The voltages at the nodes N2, N7 will be the inputs of the comparator U0. Therefore, an open circuit is formed by the nodes N0, N1, and the output of the comparator U0 is logical high. Then, the input signals EN, MEA1, MEA2 will be set to logical low to end the reading procedure and avoid power loss.
If the input signals EN, MEA2 are set to logical high, and the input signal MEA1 is set to logical low, and the fuse cell is not programmed such that the fuse F1 is not blown, the nodes N0, N1 will be electrically connected to ground, and the nodes N2, N7 will be logical low, and the output of the comparator U0 will remain logical low. Then, the input signals EN, MEA1, MEA2 are set to logical low to end the reading procedure and avoid power loss.
In summation of the description above, the fuse repair circuit of the preferred embodiment of the present invention has the following advantages:
1. After the chip is produced, different voltages VDDF are supplied to adjust the fuse repair to an optimal result, and if the switch is an NMOS transistor, the voltage VDDF will not be restricted.
2. Since it is not necessary to adjust the parameter for the fuse and the voltage VDD, therefore we can greatly save cost and time.
3. Since it only needs to adjust the voltage VDDF without the need of adjusting the fuse, any change resulted from the manufacturing process can be eliminated
The present invention are illustrated with reference to the preferred embodiment and not intended to limit the patent scope of the present invention. Various substitutions and modifications have suggested in the foregoing description, and other will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.