Claims
- 1. A gate turn-off thyristor comprising:
- a semiconductor substrate of disc shape having a pair of main surfaces on opposite sides thereof, said semiconductor substrate comprising, between said pair of main surfaces, a first emitter layer of a first conductivity type adjacent to one of said main surfaces, a first base layer of a second conductivity type adjacent to said one main surface and said first emitter layer, a second base layer of the first conductivity type adjacent to said first base layer and the other of said main surfaces and a second emitter layer of the second conductivity type adjacent to said second base layer and said other main surface, said first emitter layer including a plurality of strip-like regions disposed in a multi-ring configuration wherein each said strip-like region has a length disposed in a direction aligned with the radial direction of said disc-shaped semiconductor substrate and said regions being respectively separated by said first base layer, said second emitter layer including a plurality of spaced-apart strip-like regions which extend to said other main surface so as to expose an associated area for contact and wherein said strip-like regions within each pair of strip-like regions of said second emitter layer are separated from one another by a respective portion of said second base layer, and said strip-like regions of said first and second emitter layers are disposed such that when both said first and second emitter layers are orthogonally projected on said other main surface respective strip-like regions of both said first and second emitter layers become lengthwise aligned along said radial direction and overlap each other;
- a first main electrode ohmic-contacted to said first emitter layer on said one main surface of said semiconductor substrate;
- a second main electrode ohmic-contacted to said second emitter layer and said second base layer on said other main surface of said semiconductor substrate;
- a gate electrode ohmic-contacted to said first base layer on said one main surface of said semiconductor substrate and surrounding each of said strip-like regions of said first emitter layer and separated therefrom with a constant space;
- a gate terminal disposed on a predetermined area of said disc-shaped semiconductor substrate and at a desired location on said gate electrode electrically connected to said gate electrode;
- wherein said strip-like regions are disposed on said disc-shaped substrate such that, when both said first and second emitter layers are orthogonally projected on said other main surface, a single strip-like region of said first emitter layer overlaps a respective pair of strip-like regions of said second emitter layer; and
- wherein the strip-like regions of said second emitter layer associated with each pair of strip-like regions have a distance therebetween which is greater for those strip-like region pairs located further away from said gate terminal than for those closer to said gate terminal.
- 2. A gate turn-off thyristor according to claim 1, wherein the distance corresponding to the separation of each pair of strip-like regions of said second emitter layer corresponds to the width of a respective second base layer portion therebetween.
- 3. A gate turn-off thyristor according to claim 2, wherein an arrangement of a single strip-like region of said first emitter layer, said first base layer, said second base layer and a pair of strip-like regions of said second emitter layer which are separated by a respective second base layer portion comprises a unit GTO.
- 4. A gate turn-off thyristor according to claim 3, wherein said disc-shaped semiconductor substrate comprises a coaxial arrangement of a plurality of rings, each ring corresponding to a plurality of unit GTOs.
- 5. A gate turn-off thyristor according to claim 4, wherein said first and second emitter layers comprise a cathode and an anode, respectively.
- 6. A gate turn-off thyristor according to claim 5, wherein said first and second conductivity type layers comprise N and P-type conductivity layers, respectively.
Priority Claims (1)
Number |
Date |
Country |
Kind |
61-158815 |
Jul 1986 |
JPX |
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Parent Case Info
This is a continuation of application Ser. No. 071,153, filed July 8, 1987, now U.S. Pat. No. 4,868,625.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
4868625 |
Ujihara et al. |
Sep 1989 |
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Continuations (1)
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Number |
Date |
Country |
Parent |
71153 |
Jul 1987 |
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