The present invention relates generally to semiconductor memory devices, and more particularly to charge pumps used in programming circuit of magnetoresistive random access memory (MRAM) devices and methods of manufacture thereof.
Semiconductors are used in integrated circuits for electronic applications, including radios, televisions, cell phones, and personal computing devices, as examples. One type of semiconductor device is a semiconductor storage device, such as a dynamic random access memory (DRAM) or a flash memory, both of which use charge to store information.
A more recent development in semiconductor memory devices involves spin electronics, which combines semiconductor technology and magnetic materials and devices. The spins of electrons, through their magnetic moments, rather than the charge of the electrons, is used to indicate the presence of a “1” or “0”. One such spin electronic device is a magnetoresistive random access memory (MRAM) device 100, sometimes referred to as a magnetic RAM, as shown in
In a cross-point magnetic memory device 100, each memory cell or magnetic tunnel junction (MTJ) 102 is disposed over and abuts one wordline WL, as shown. The MTJ 102 of a magnetoresistive memory comprises three layers: ML1, TL and ML2. The MTJ 102 includes a first magnetic layer ML1 disposed over and abutting the wordline WL. The first magnetic layer ML1 is often referred to as a fixed layer because its magnetic orientation is fixed. A tunnel layer or tunnel barrier layer TL comprising a thin dielectric layer is formed over the fixed layer ML1. A second magnetic layer ML2 is formed over the tunnel barrier layer TL. The second magnetic layer ML2 is often referred to as a free layer because its magnetic orientation can be switched along one of two directions. The first and second magnetic layers ML1 and ML2 may comprise one or more material layers, for example.
Each MTJ 102 has a second conductive line or bitline BL disposed over and abutting the second magnetic layer ML2, as shown in
Either one of the first or second magnetic layers ML1 and ML2 may comprise a hard magnetic material (and is the fixed layer), and the other comprises a soft magnetic material (and is the free layer), although in the discussion herein, the first magnetic layer ML1 comprises the hard magnetic material, and the second magnetic layer ML2 comprises the soft magnetic material. The value of the resistance of the cell or MTJ 102 depends on the way in which the magnetic moment of the soft magnetic layer ML2 is oriented in relation to the magnetic moment of the hard magnetic layer ML1. The resistance of the magnetic memory cell 102 depends on the moment's relative alignment. The resistance RC is usually lower if the magnetic layers have parallel magnetic orientations. For example, if the first and second magnetic layers ML1 and ML2 are oriented in the same direction, as shown in
The hard magnetic layer ML1 is usually oriented once during manufacturing. The information of the cell 102 is stored in the soft magnetic layer ML2. As shown in
An advantage of MRAM devices compared to traditional semiconductor memory devices such as dynamic random access memory (DRAM) devices is that MRAM devices are non-volatile. For example, a personal computer (PC) utilizing MRAM devices would not have a long “boot-up” time as with conventional PCs that utilize DRAM devices. Also, an MRAM device does not need to be powered up and has the capability of “remembering” the stored data (also referred to as a non-volatile memory). MRAM devices have the capability to provide the density of DRAM devices and the speed of static random access memory (SRAM) devices, in addition to non-volatility. Therefore, MRAM devices have the potential to replace flash memory, DRAM and SRAM devices in electronic applications where memory devices are needed in the future.
A general problem for MRAM devices is the fact that the MRAM cells are programmed by programming currents in the wordlines and bitlines, which are usually in the milliamps (mA) range. Thus the programming currents create a significant voltage drop over the wordlines and bitlines during the programming operation. This creates problems. As for future process technologies, the supply voltage is steadily decreasing. However, there is a strong tendency that the voltage over the programmed wordlines and bitlines will increase due to increasing resistance in future technologies. The reason for the increase in resistance is that the widths of wordlines and bitlines decrease as semiconductor devices are scaled down to smaller dimensions. Additionally, there is typically a tendency for wordlines and bitlines to become longer in order to increase area efficiency of a memory. For future MRAM chips, it will be difficult to supply sufficiently high voltages in order to create necessary programming currents.
In accordance with one aspect of the present invention, an apparatus comprises a memory circuit that includes a magnetoresistive random access memory (MRAM) cell, and a charge pump circuit electrically coupled to the memory circuit. The memory circuit and at least a first portion of the charge pump circuit are fabricated on a single semiconductor chip. A second portion of the charge pump circuit is external to the semiconductor chip and includes at least one capacitor. Both the second portion of the charge pump circuit and the semiconductor chip are packaged in a chip package.
In accordance with another aspect of the present invention, the semiconductor chip is packaged in a chip package, and the second portion of the charge pump circuit, which is external to the chip package, is electrically coupled to the memory circuit.
In accordance with another aspect of the present invention, a method of forming an apparatus includes forming a memory circuit comprising a MRAM cell. A charge pump circuit is electrically coupled to the memory circuit. In the preferred embodiments, the method further includes fabricating the memory circuit and at least a first portion of the charge pump circuit on a single semiconductor chip. The charge pump also includes a second portion with at least one capacitor. The semiconductor chip is packaged in a chip package. The second portion of the charge pump circuit is external to the chip package and electrically coupled to the first portion of the charge pump circuit.
In accordance with yet another aspect of the present invention, the second portion of the charge pump circuit is packaged in the chip package.
Advantages of embodiments of the present invention include reducing chip area cost and resolving the conflict of increasing programming current requirement and decreasing operation voltage supply.
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
One way to resolve the conflict of the increasing difference between the MRAM programming voltage and circuit operation voltage is to use charge pumps to raise voltages. Through a charge pump, a circuit operation voltage can be pumped up to a desired programming voltage. An example of a simple charge pump 110 is illustrated in
(Vout−VDD)*C=VDD*C [Eq. 1]
or
Vout=2*VDD [Eq. 2]
Thus, an output voltage Vout that is twice the circuit supply voltage VDD is generated. Output voltage Vout may then be used as a high voltage supply. The charge pump 110 illustrated in
Charge pumps have been used in electrically erasable programmable read only memories (EEPROM) memories. Internal charge pump circuits have been built in the periphery of the cell arrays of the memory chips, creating programming voltages from the supply voltages of the chips. For internal charge pump circuits, switches are typically implemented using metal-oxide-semiconductor (MOS) devices, and capacitors are typically formed of MOS devices with their respective source and drain shorted. Capacitances of the internal capacitors are generally proportional to the area of the MOS device and thus are small. Therefore, the programming current that can be provided by an internal charge pump is small. However, an internal charge pump can provide sufficient programming current to EEPROM memories, mainly because the programming current of an EEPROM cell is in the order of about 1 nA. Charge pump circuits that can provide currents in μA range can be cost efficiently designed on chip.
For MRAM memories, however, the charge pump approach using on-chip capacitors is not readily usable. MRAM memories require programming currents in the milliamps (mA) range and thus significantly larger capacitors have to be built, which in turn consumes a large amount of chip area, making the charge pump solution unrealistic. An alternative solution is using multiple supply voltages, wherein a higher supply voltage may be used to supply the programming operation of the MRAM components, and a lower supply voltage may be used by remaining components that can be operated at lower voltage levels. However, this solution involves higher cost and more complicated circuit designs.
A schematic view of the preferred embodiment of the present invention solving the above-discussed problem is illustrated in
One skilled in the art will realize that a practical charge pump may involve multiple capacitors 202, as illustrated in
The preferred embodiments of the present invention have some advantageous features. Due to increasingly high numbers of MRAM cells built on one memory chip, higher programming currents may be required and thus built-in capacitors may require increasingly larger areas. By using external capacitors, the capacitances are not limited by the chip area available, and thus capacitors with very big capacitance can be built. This is particularly useful for concurrent programming wherein multiple MRAM cells are programmed at the same time, thereby requiring greater current. Additionally, the voltage supply for programming the MRAM is obtained by the use of a charging pump for the circuit operation voltage of the chip, therefore, no secondary voltage supply is required.
Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, and composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.