Claims
- 1. A method of fabricating a read-only memory device comprising the steps of:
- forming a plurality; of semiconductor strips upon a conductive ground plane, said strips having a first polarity of conductivity;
- ion implanting, with a fixed beam, a dopant material to create at least one substantially columnar semiconductor channel extending through at least one of said semiconductor strips, each of said implanted channels having a polarity of conductivity opposite that of said first polarity of conductivity, and each of said implanted channels having one end contacting said conductive ground plane, and an opposite end evident upon an exposed surface of said semiconductor strips;
- forming a plurality of conductive strips, said conductive strips being situated upon said plurality of semiconductor strips so that all of said exposed ends of said implanted columns contact at least one of said conductive strips.
- 2. The method of claim 1 wherein said conductive strips are formed so that they are positioned substantially orthogonal to said plurality of semiconductor strips.
- 3. A method of fabricating a read-only memory device comprising the steps of:
- forming a semiconductor layer upon a conductive ground plane, said semiconductor layer having a first polarity of conductivity;
- ion implanting a plurality of parallel linear regions extending through said semiconductor layer, each of said implanted linear regions having a polarity of conductivity opposite that of said first polarity of conductivity, and each of said implanted linear regions extending from the surface of said semiconductor layer through to said conductive ground plane so as to divide said semiconductor layer into a plurality distinct semiconductor strips;
- ion implanting, with a fixed beam, a dopant material to create at least one substantially columnar semiconductor channel extending through at least one of area of said semiconductor strips, each of said implanted channels having a polarity of conductivity opposite that of said first polarity of conductivity, and each of said implanted channels having one end contacting said conductive ground plane, and an opposite end evident upon an exposed surface of one of said semiconductor strips;
- forming a plurality of conductive strips, said conductive strips being situated upon said plurality of semiconductor strips so that all of said exposed ends of said implanted columns contact at least one of said conductive strips.
- 4. The method of claim 3 wherein said conductive strips are formed so that they are positioned substantially orthogonal to said plurality of semiconductor strips.
- 5. A method of fabricating a field-effect transistor comprising the steps of:
- forming a semiconductor gate area having a first polarity of conductivity;
- ion implanting, with a fixed beam, a dopant material within said semiconductor gate area to create, a substantially columnar semiconductor channel, having a polarity of conductivity opposite that of said semiconductor gate area, extending through said semiconductor gate area so that opposite ends of said channel are exposed upon opposite faces of said semiconductor gate area;
- establishing a source contact to one exposed end of said implanted column;
- establishing a drain contact to the other exposed end of said implanted column.
CROSS-REFERENCE TO RELATED APPLICATION
This application is a division of U.S. application Ser. No. 08/164,278, which was filed on Dec. 9, 1994.
US Referenced Citations (4)
Divisions (1)
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Number |
Date |
Country |
Parent |
164278 |
Dec 1994 |
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