High temperature embedded charge devices and methods thereof

Information

  • Patent Grant
  • 8581308
  • Patent Number
    8,581,308
  • Date Filed
    Thursday, February 17, 2005
    19 years ago
  • Date Issued
    Tuesday, November 12, 2013
    11 years ago
Abstract
A device for storing embedded charge includes a first insulator and at least one second insulator. The first insulator has at least two outer surfaces and has a band gap of less than about 5.5 eV. The second insulator is deposited on at least each of the at least two outer surfaces of the first insulator to form at least one interface for storing charge between the first and second insulators. The second insulator has a band gap of more than about 6.0 eV.
Description
FIELD OF THE INVENTION

The present invention generally relates to devices for storing charge and, more particularly, to high temperature, embedded charge devices and methods thereof


BACKGROUND

Embedded charge technology is being exploited in numerous ways. The underlying science provides a platform for devices that range from micro sensors to macroscopic energy transducers. Embedded charge technology has excellent long-term reliability in environments where the temperature does not exceed a few hundred degrees Celsius.


Embedded charge technology utilizes electronic charge that is trapped at the interface of dissimilar insulators. Typically, systems employ insulators, such as silicon dioxide (SiO2)—silicon nitride (Si3N4), as continuous thin films. For applications in harsh environments with elevated temperatures above a few hundred degrees Celsius there is a need for significant improvement in overall temperature robustness.


An example of prior device 10 for storing embedded charge with charge stored at the interface of dissimilar insulators is illustrated in FIG. 1. The device 10 has a layer of silicon dioxide 14 between a substrate 13 and a layer of silicon nitride 12 and a conductor 15 on the layer of silicon nitride 12. Electronic charge is stored at an interface 16 between the layers 12 and 14. The band gap of the layer of silicon nitride 12 is approximately 5 eV, whereas the band gap of the layer of silicon dioxide 14 is about 9 eV. In this device 10, when electronic charge 18 is stored at the interface 16 of the dissimilar insulators 12 and 14 and the surrounding temperature does not exceed a few hundred degrees Celsius and is not placed in a high electric field, the charge loss mechanism is dominated by Frenkle-Poole conduction through the layer of silicon nitride 12. However, when the surrounding temperature exceeds a few hundred degrees Celsius and/or the device 10 is placed in a high electric field, the retention of the embedded charge 18 in this device 10 deteriorates and the charge 18 can escape to the conductor 15.


SUMMARY

A device for storing embedded charge in accordance with embodiments of the present invention includes a first insulator and at least one second insulator. The first insulator has at least two outer surfaces and has a band gap of less than about 5.5 eV. The second insulator is deposited on at least each of the at least two outer surfaces of the first insulator to form at least one interface for storing charge between the first and second insulators. The second insulator has a band gap of more than about 6.0 eV.


A method for making a device for storing embedded charge in accordance with embodiments of the present invention includes providing a first insulator having at least two outer surfaces and depositing at least one second insulator on at least each of the at least two outer surfaces of the first insulator to form at least one interface for storing charge between the first and second insulators. The first insulator has a band gap of less than about 5.5 eV and the second insulator has a band gap of more than about 6.0 eV.


A device for storing embedded charge in accordance with embodiments of the present invention includes a first insulator and at least one second insulator which substantially encases the first insulator to form at least one interface for storing charge. The first insulator has a band gap of less than about 5.5 eV and the second insulator has a band gap of more than about 6.0 eV.


A method for making a device for storing embedded charge in accordance with embodiments of the present invention includes providing a first insulator and substantially encasing the first insulator with at least one second insulator to form at least one interface for storing charge between the first and second insulators. The first insulator having a band gap of less than about 5.5 eV and the second insulator having a band gap of more than about 6.0 eV


The present invention provides a system method for making local regions of embedded electronic charge with high temperature reliability. The present invention utilizes very wide band gap insulating materials in conjunction with medium to low band gap insulating materials to significantly improve embedded charge high temperature trapped charge retention time. The present invention also is easily integratable with standard integrated circuits and silicon carbide devices.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a cross-sectional view of a device with charge stored at an interface between two dissimilar insulators;



FIG. 2 is a cross-sectional view of a device in accordance with embodiments of the present invention with charge stored at two interfaces between dissimilar insulators;



FIG. 3 is a cross-sectional view of a device in accordance with embodiments of the present invention with charge stored at interfaces between an insulator of silicon nitride encased by an insulator of silicon dioxide; and



FIG. 4 is a cross-sectional view of a device in accordance with embodiments of the present invention with charge stored at interfaces between of silicon nitride encased by an insulator of calcium fluoride.





DETAILED DESCRIPTION

A device 20 for storing embedded charge in accordance with embodiments of the present invention is illustrated in FIG. 2. The device 20 for storing embedded charge includes layers of silicon dioxide (SiO2) 22 and 24 disposed on opposing surfaces of a layer of silicon nitride (Si3N4) 26, although the device 20 can comprise other numbers and types of layers in other configurations, such as having layers 22 and 24 made of different materials. The present invention utilizes very wide band gap insulating materials in conjunction with medium to low band gap insulating materials to significantly improve embedded charge high temperature trapped charge retention time.


Referring more specifically to FIG. 2, the device 20 has a conductor 27 on the layer of silicon dioxide 22 which is on the layer of silicon nitride 26 which is on the layer of silicon dioxide 24 which is on a substrate 23, although the device 20 for storing embedded charge could have other numbers and types of non-conducting and conducting layers. The layer of silicon nitride 26 comprises a low to medium band gap insulating layer which is adjacent on opposing sides to the layers of silicon dioxide 22 and 24 which are the wide band gap insulating layers. The layer of silicon nitride 26 has a band gap of approximately 5 eV and the layers of silicon dioxide 22 and 24 each have a band gap of approximately 9 eV. Although the layer of silicon nitride 26 is shown as the low to medium band gap layer, other types of low to medium band gap layers can be used, such as a layer of titanium dioxide (TiO2), strontium titanium oxide SrTiO3, zirconium oxide (ZrO2), or barium titanium oxide (BaTiO3). Additionally, although the layers of silicon dioxide 22 and 24 are shown as the wide band gap layers, other types of wide band gap layers can be used, such as layers of calcium fluoride (CaF2), magnesium fluoride (MgF2), lithium fluoride (LiF), or aluminum oxide (Al2O3).


An interface 28 is formed between the layer of silicon dioxide 22 and the layer of silicon nitride 26 and an interface 30 is formed between the layer of silicon nitride 26 and the layer of silicon dioxide 24. A fixed, static electronic charge 32 on the order of at least 1×1010 charges/cm2 is stored at each of the interfaces 28 and 30.


With this device 20 for storing embedded fixed, static charge 32, charge loss at elevated temperature environmental conditions for charge trapped at the interfaces 28 and 30 must be either by Fowler—Nordheim conduction through the layers silicon dioxide 22 and 24 or by Frenkle-Poole conduction laterally through the layer of silicon nitride 26. However, because it is difficult for the charge to travel through the layers of silicon dioxide 28 and 30 or laterally through the layer of silicon nitride 26, the embedded fixed, static charge 32 remains at the interfaces 28 and 30 and thus temperature robustness is thereby improved.


Referring to FIG. 3, another device 40(1) for storing embedded, fixed, static charge 41 with improved temperature robustness in accordance with embodiments of the present invention is illustrated. The device 40(1) comprises a layer of silicon nitride 42 which is completely encased in a layer of silicon dioxide 44 with a conductor 45 on one surface 48(1) of the layer of silicon dioxide 44 which is on the suitable substrate 43, such as silicon, although the device 40(1) could comprise other types and numbers of layers in other configurations, such as with or without the conductor 45 and/or the substrate 43 and with other configurations for the conductor 45 and/or substrate 43. The layer of silicon dioxide 44 has outer surfaces 48(1)-48(4), although the layer of silicon dioxide 44 could have other numbers of outer surfaces. The layer of silicon nitride 42 has a band gap of approximately 5 eV and the layer of silicon dioxide 44 has a band gap of approximately 9 eV. Although a layer of silicon dioxide 44 and a layer of silicon nitride 42 are used in this embodiment, again as described with reference to FIG. 2, other types of dissimilar insulating materials with the band gap differences discussed herein can be used.


Interfaces 46(1)-46(4) are formed between the layer of silicon nitride 42 and the layer of silicon dioxide 44. A fixed, static electronic charge 50 on the order of at least 1×1010 charges/cm2 is stored at each of the interfaces 46(1) and 46(3), although the charge could be stored at other interfaces, such as interfaces 46(2) and 46(4), in other configurations. Again, the charge retention and temperature robustness of the device 40(1) is further enhanced because the layer of silicon dioxide 44 surrounds all of the outer surfaces of the layer of silicon nitride 42.


Referring to FIG. 4, another device 40(2) for storing embedded fixed, static charge 52 with improved temperature robustness in accordance with embodiments of the present invention is illustrated. Elements in FIG. 4 which are like those shown and described in FIG. 3 will have like reference numerals. The device 40(2) comprises a layer of silicon nitride 42 is completely encased in a layer of calcium fluoride (CaF2) 54 with a conductor 55 on one surface 58(1) of the layer of calcium fluoride 54 and a suitable substrate 53 on another surface 58(3) of the layer of calcium fluoride 54, such as silicon, although the device 40(2) could comprise other types and numbers of layers in other configurations, such as with or without the conductor 55 and/or the substrate 53 and with other configurations for the conductor 55 and/or substrate 53. The layer of calcium fluoride 54 has outer surfaces 58(1)-58(4), although the layer of calcium fluoride 54 could have other numbers of outer surfaces. The layer of calcium fluoride 54 has a band gap of approximately 12.1 eV and the layer of silicon nitride 42 has a band gap of approximately 5 eV. Therefore, the encasing layer of calcium fluoride 54 provides a very high barrier around the entire outer surface of the layer of silicon nitride 42 that must be overcome before any trapped charge 52 at the interfaces 56(1) and 56(3) between the layer of calcium fluoride 54 and the layer of silicon nitride 42 is lost. Although a layer of calcium fluoride 54 and a layer of silicon nitride 42 are used in this embodiment, again as described with reference to FIG. 2, other types of dissimilar insulating materials with the band gap differences discussed herein can be used.


Interfaces 56(1)-56(4) are formed between the layer of silicon nitride 42 and the encasing layer of calcium fluoride 54. A fixed, static electronic charge 52 on the order of at least 1×1010 charges/cm2 is stored at each of the interfaces 56(1) and 56(3), although the charge could be stored at other interfaces, such as interfaces 56(2) and 56(4) in other configurations. Again, the charge retention and temperature robustness of the device 40(2) is further enhanced because the layer of calcium fluoride 54 surrounds all of the outer surfaces of the layer of silicon nitride 42.


Accordingly, a device for storing embedded charge in accordance with the present invention is a composite structure of dissimilar insulating materials or insulators that has a wide band gap insulating material encasing at least a portion of a lower band gap material. In these embodiments, the wide band gap insulating material should have a band gap of over about 6.0 eV and the low to medium band gap material should have a band gap of about 5.5 eV or less. Additionally, the selection of the dissimilar insulating materials for each of the layers may be based at least partially on the relative permittivity of each of the dissimilar insulating materials. In these embodiments, the permittivity of the wide band gap material could be lower than the permittivity of the low to medium band gap material to assist with charge retention.


Referring to FIG. 2, a method for making the device 20 for storing embedded charge 32 in accordance with embodiments of the present invention will now be described. On a suitable substrate a layer of wide band gap insulating material comprising silicon dioxide 24, a layer of low to medium band gap material comprising silicon nitride 26 is deposited by Chemical Vapor Deposition (CVD), although other techniques for depositing layer 26 can be used, such as sputtering, evaporation, atomic layer epitaxy, and molecular beam epitaxy. Next, another layer of wide band gap insulating material comprising silicon dioxide 22 is deposited on the layer silicon nitride 26 by Chemical Vapor Deposition (CVD), although other techniques for depositing layer 22 can be used, such as sputtering, evaporation, atomic layer epitaxy, and molecular beam epitaxy. Next, a fixed, static electronic charge 32 on the order of at least 1×1010 charges/cm2 is injected by high field injection into the device 20 and is trapped at the interfaces 28 and 30, although other techniques for embedding the charge 32, such as ballistic injection, can be used.


Referring to FIG. 3, a method for making the device 40(1) for storing embedded charge 41 in accordance with embodiments of the present invention will now be described. A layer of silicon dioxide 44 is deposited by Chemical Vapor Deposition (CVD) on a suitable substrate 43, such as silicon although other materials could be used for the substrate 43 and the layer 44 could be formed in other manners. A layer of low to medium band gap material comprising silicon nitride 42 is deposited on the layer of silicon dioxide 44 by CVD and is patterned to the shape shown, although other techniques for forming layer 42 can be used, such as sputtering, evaporation, atomic layer epitaxy, and molecular beam epitaxy or depositing the silicon nitride 42 in a trench in the layer of silicon dioxide 44. Next, more of the wide band gap insulating material comprising silicon dioxide 44 is deposited to encase the layer of silicon nitride 42. Once the layer of silicon nitride 42 is encased, a fixed, static electronic charge 41 on the order of at least 1×1010 charges/cm2 is injected by high field injection into the device 40(1) and is trapped at the interfaces 46(1) and 46(3), although other techniques for embedding the charge 41, such as ballistic injection, can be used.


Referring to FIG. 4, a method for making the device 40(2) for storing embedded charge 52 in accordance with embodiments of the present invention will now be described. A layer of calcium fluoride 54 is deposited by sputtering on a suitable substrate 53, such as silicon although other materials could be used for the substrate 53 and the layer 54 could be formed in other manners. A layer of low to medium band gap material comprising silicon nitride 42 is deposited on the layer of calcium fluoride 54 and by CVD and is patterned to the shape shown, although other techniques for forming layer 42 can be used, such as sputtering, evaporation, atomic layer epitaxy, and molecular beam epitaxy or depositing the silicon nitride 42 in a trench in the layer of calcium fluoride 54. Next, more of the wide band gap insulating material comprising calcium fluoride is deposited to encase the layer of silicon nitride 42. Next, a fixed, static electronic charge 52 on the order of at least 1×1010 charges/cm2 is injected by high field injection into the device 40(2) and is trapped at the interfaces 56(1) and 56(3), although other techniques for embedding the charge 52, such as ballistic injection, can be used.


Accordingly, the present invention provides a system and method for making local regions of embedded electronic charge with high temperature reliability. The present invention utilizes very wide band gap insulating materials in conjunction with medium to low band gap insulating materials to significantly improve embedded charge high temperature trapped charge retention time. The present invention is also easily integratable with standard integrated circuits and silicon carbide devices.


Having thus described the basic concept of the invention, it will be rather apparent to those skilled in the art that the foregoing detailed disclosure is intended to be presented by way of example only, and is not limiting. Various alterations, improvements, and modifications will occur and are intended to those skilled in the art, though not expressly stated herein. These alterations, improvements, and modifications are intended to be suggested hereby, and are within the spirit and scope of the invention. Additionally, the recited order of processing elements or sequences, or the use of numbers, letters, or other designations therefore, is not intended to limit the claimed processes to any order except as may be specified in the claims. Accordingly, the invention is limited only by the following claims and equivalents thereto.

Claims
  • 1. A device for storing embedded charge comprising: a first insulator having at least two outer surfaces, the first insulator having a band gap of less than about 5.5 eV; andat least one second insulator on at least each of the at least two outer surfaces of the first insulator to form at least one interface between the first and second insulators and has a band gap of more than about 6.0 eV; andinjected, fixed, static electronic charge in addition to inherent formation charge stored at the at least one interface, wherein the injected, fixed, static electronic charge at the at least one interface between the first and second insulators is negative, fixed static electronic charge and further consisting of no more than one continuous conductor structure on the second; insulator.
  • 2. The device as set forth in claim 1 wherein the first insulator is selected from a group consisting of Si3N4, TiO2, SrTiO3, ZrO2, and BaTiO3 and the second insulator is selected from a group consisting of SiO2, CaF2, MgF2, LiF, and Al2O3.
  • 3. The device as set forth in claim 1 wherein the second insulator comprises at least two layers, each of the layers of the second insulator are on a different one of the outer surfaces of the first insulator.
  • 4. The device as set forth in claim 1 wherein the second insulator against one of one or more surfaces of the first insulator is the same as the second insulator against all other surfaces of the first insulator and substantially encases the first insulator.
  • 5. The device as set forth in claim 1 wherein the band gap of the second insulator is at least double the band gap of the first insulator.
  • 6. The device as set forth in claim 1 wherein a permittivity of the second insulator is lower than a permittivity of the first insulator.
  • 7. The device as set forth in claim 5 wherein the second insulator comprises a non-oxide insulating layer.
  • 8. The device as set forth in claim 7 wherein the non-oxide insulating layer is selected from a group consisting of CaF2 MgF2, and LiF.
  • 9. The device as set forth in claim 1 wherein the injected, fixed, static, electronic charge further comprises at least one of high field injected and ballistic injected, fixed, static, electronic charge on the order of at least 1×1010 charges/cm2 stored at the at least one interface.
Parent Case Info

This application claims the benefit of U.S. Provisional Patent Application Ser. No. 60/546,045, filed Feb. 19, 2004, which is hereby incorporated by reference in its entirety.

US Referenced Citations (242)
Number Name Date Kind
2567373 Giacoletto et al. Sep 1951 A
2588513 Giacoletta Mar 1952 A
2978066 Nodolf Apr 1961 A
3118022 Sessler et al. Jan 1964 A
3397278 Pomerantz Aug 1968 A
3405334 Jewett et al. Oct 1968 A
3487610 Brown et al. Jan 1970 A
3715500 Sessler et al. Feb 1973 A
3731163 Shuskus May 1973 A
3742767 Bernard et al. Jul 1973 A
3786495 Spence Jan 1974 A
3858307 Yoshimura et al. Jan 1975 A
3924324 Kodera Dec 1975 A
4047214 Francombe et al. Sep 1977 A
4102202 Ferriss Jul 1978 A
4115914 Harari Sep 1978 A
4126822 Wahlstrom Nov 1978 A
4160882 Driver Jul 1979 A
4166729 Thompson et al. Sep 1979 A
4285714 Kirkpatrick Aug 1981 A
4288735 Crites Sep 1981 A
4340953 Iwamura et al. Jul 1982 A
4375718 Wadsworth et al. Mar 1983 A
4490772 Blickstein Dec 1984 A
4504550 Pook Mar 1985 A
4513049 Yamasaki et al. Apr 1985 A
4581624 O'Connor Apr 1986 A
4585209 Aine et al. Apr 1986 A
4626263 Inoue et al. Dec 1986 A
4626729 Lewiner et al. Dec 1986 A
4701640 Flygstad et al. Oct 1987 A
4716331 Higgins, Jr. Dec 1987 A
4736629 Cole Apr 1988 A
4789504 Ohmori et al. Dec 1988 A
4789803 Jacobsen et al. Dec 1988 A
4794370 Simpson et al. Dec 1988 A
4874659 Ando et al. Oct 1989 A
4905701 Cornelius Mar 1990 A
4922756 Henrion May 1990 A
4944854 Felton et al. Jul 1990 A
4945068 Sugaya Jul 1990 A
4945393 Beltram et al. Jul 1990 A
4958317 Terada et al. Sep 1990 A
4965244 Weaver et al. Oct 1990 A
4996627 Zias et al. Feb 1991 A
4997521 Howe et al. Mar 1991 A
5020030 Huber May 1991 A
5050435 Pinson Sep 1991 A
5051643 Dworsky et al. Sep 1991 A
5054081 West Oct 1991 A
5057710 Nishiura et al. Oct 1991 A
5081513 Jackson et al. Jan 1992 A
5082242 Bonne et al. Jan 1992 A
5088326 Wada et al. Feb 1992 A
5092174 Reidemeister et al. Mar 1992 A
5095752 Suzuki et al. Mar 1992 A
5096388 Weinberg Mar 1992 A
5108470 Pick Apr 1992 A
5112677 Tani et al. May 1992 A
5118942 Hamade Jun 1992 A
5129794 Beatty Jul 1992 A
5132934 Quate et al. Jul 1992 A
5143854 Pirrung et al. Sep 1992 A
5156810 Ribi Oct 1992 A
5164319 Hafeman et al. Nov 1992 A
5180623 Ohnstein Jan 1993 A
5189641 Arakawa Feb 1993 A
5207103 Wise et al. May 1993 A
5228373 Welsch Jul 1993 A
5231045 Miura et al. Jul 1993 A
5238223 Mettner et al. Aug 1993 A
5256176 Matsuura et al. Oct 1993 A
5262000 Welbourn et al. Nov 1993 A
5284179 Shikida et al. Feb 1994 A
5284692 Bell Feb 1994 A
5323999 Bonne et al. Jun 1994 A
5334238 Goodson et al. Aug 1994 A
5336062 Richter Aug 1994 A
5336904 Kusunoki Aug 1994 A
5348571 Weber Sep 1994 A
5349492 Kimura et al. Sep 1994 A
5355577 Cohn Oct 1994 A
5365790 Chen et al. Nov 1994 A
5367429 Tsuchitani et al. Nov 1994 A
5380396 Shikida et al. Jan 1995 A
5392650 O'Brien et al. Feb 1995 A
5417235 Wise et al. May 1995 A
5417312 Tsuchitani et al. May 1995 A
5419953 Chapman May 1995 A
5434109 Geissler et al. Jul 1995 A
5441597 Bonne et al. Aug 1995 A
5445008 Wachter et al. Aug 1995 A
5474599 Cheney et al. Dec 1995 A
5488864 Stephan Feb 1996 A
5491604 Nguyen et al. Feb 1996 A
5496507 Angadjivand et al. Mar 1996 A
5512882 Stetter et al. Apr 1996 A
5519240 Suzuki May 1996 A
5520522 Rathore et al. May 1996 A
5526172 Kanack Jun 1996 A
5567336 Tatah Oct 1996 A
5578976 Yao Nov 1996 A
5591679 Jakobsen et al. Jan 1997 A
5593476 Coppom Jan 1997 A
5593479 Frey et al. Jan 1997 A
5596194 Kubena et al. Jan 1997 A
5616844 Suzuki et al. Apr 1997 A
5635739 Grieff et al. Jun 1997 A
5640133 MacDonald et al. Jun 1997 A
5668303 Giesler et al. Sep 1997 A
5671905 Hopkins, Jr. Sep 1997 A
5677617 Tokai et al. Oct 1997 A
5698771 Shields et al. Dec 1997 A
5739834 Okabe et al. Apr 1998 A
5747692 Jacobsen et al. May 1998 A
5771148 Davis Jun 1998 A
5777977 Fujiwara et al. Jul 1998 A
5788468 Dewa et al. Aug 1998 A
5793485 Gourley Aug 1998 A
5798146 Murokh et al. Aug 1998 A
5807425 Gibbs Sep 1998 A
5812163 Wong Sep 1998 A
5839062 Nguyen et al. Nov 1998 A
5846302 Putro Dec 1998 A
5846708 Hollis et al. Dec 1998 A
5871567 Covington et al. Feb 1999 A
5874675 Edmans et al. Feb 1999 A
5897097 Biegelsen et al. Apr 1999 A
5908603 Tsai et al. Jun 1999 A
5914553 Adams et al. Jun 1999 A
5919364 Lebouitz et al. Jul 1999 A
5920011 Hulsing, II Jul 1999 A
5941501 Biegelsen et al. Aug 1999 A
5955932 Nguyen et al. Sep 1999 A
5959516 Chang et al. Sep 1999 A
5967163 Pan et al. Oct 1999 A
5969250 Greiff Oct 1999 A
5971355 Biegelsen et al. Oct 1999 A
5993520 Yu Nov 1999 A
5994982 Kintis et al. Nov 1999 A
6007309 Hartley Dec 1999 A
6016092 Qiu et al. Jan 2000 A
6018170 Hatano et al. Jan 2000 A
6032923 Biegelsen et al. Mar 2000 A
6033852 Andle et al. Mar 2000 A
6037797 Lagowski et al. Mar 2000 A
6040611 De Los Santos et al. Mar 2000 A
6043727 Warneke et al. Mar 2000 A
6046659 Loo et al. Apr 2000 A
6048692 Maracas et al. Apr 2000 A
6051853 Shimada et al. Apr 2000 A
6057520 Goodwin-Johansson May 2000 A
6069540 Berenz et al. May 2000 A
6089534 Biegelsen et al. Jul 2000 A
6094102 Chang et al. Jul 2000 A
6100477 Randall et al. Aug 2000 A
6106245 Cabuz Aug 2000 A
6119691 Angadjivand et al. Sep 2000 A
6120002 Biegelsen et al. Sep 2000 A
6123316 Biegelsen et al. Sep 2000 A
6124632 Lo et al. Sep 2000 A
6126140 Johnson et al. Oct 2000 A
6127744 Streeter et al. Oct 2000 A
6127812 Ghezzo et al. Oct 2000 A
6149190 Galvin et al. Nov 2000 A
6168395 Quenzer et al. Jan 2001 B1
6168948 Anderson et al. Jan 2001 B1
6170332 MacDonald et al. Jan 2001 B1
6177351 Beratan et al. Jan 2001 B1
6181009 Takahashi et al. Jan 2001 B1
6197139 Ju et al. Mar 2001 B1
6199874 Galvin et al. Mar 2001 B1
6204737 Ellä Mar 2001 B1
6214094 Rousseau et al. Apr 2001 B1
6238946 Ziegler May 2001 B1
6255758 Cabuz et al. Jul 2001 B1
6265758 Takahashi Jul 2001 B1
6275122 Speidell et al. Aug 2001 B1
6287776 Hefti Sep 2001 B1
6324914 Xue et al. Dec 2001 B1
6336353 Matsiev et al. Jan 2002 B2
6384353 Huang et al. May 2002 B1
6393895 Matsiev et al. May 2002 B1
6395638 Linnemann et al. May 2002 B1
6423148 Aoki Jul 2002 B1
6431212 Hayenga et al. Aug 2002 B1
6469785 Duveneck et al. Oct 2002 B1
6470754 Gianchandani Oct 2002 B1
6485273 Goodwin-Johansson Nov 2002 B1
6496348 McIntosh Dec 2002 B2
6504118 Hyman et al. Jan 2003 B2
6580280 Nakae et al. Jun 2003 B2
6597560 Potter Jul 2003 B2
6626417 Winger et al. Sep 2003 B2
6638627 Potter Oct 2003 B2
6673677 Hofmann et al. Jan 2004 B2
6674132 Willer Jan 2004 B2
6688179 Potter et al. Feb 2004 B2
6707355 Yee Mar 2004 B1
6717488 Potter Apr 2004 B2
6734770 Aigner et al. May 2004 B2
6750590 Potter Jun 2004 B2
6773488 Potter Aug 2004 B2
6787438 Nelson Sep 2004 B1
6798132 Satake Sep 2004 B2
6841917 Potter Jan 2005 B2
6842009 Potter Jan 2005 B2
6854330 Potter Feb 2005 B2
7195393 Potter Mar 2007 B2
7211923 Potter May 2007 B2
7217582 Potter May 2007 B2
7280014 Potter Oct 2007 B2
7287328 Potter Oct 2007 B2
20010047689 McIntosh Dec 2001 A1
20020000649 Tilmans et al. Jan 2002 A1
20020012937 Tender et al. Jan 2002 A1
20020072201 Potter Jun 2002 A1
20020131228 Potter Sep 2002 A1
20020131230 Potter Sep 2002 A1
20020182091 Potter Dec 2002 A1
20020185003 Potter Dec 2002 A1
20020187618 Potter Dec 2002 A1
20020197761 Patel et al. Dec 2002 A1
20030079543 Potter May 2003 A1
20030079548 Potter et al. May 2003 A1
20030080839 Wong May 2003 A1
20030081397 Potter May 2003 A1
20030112096 Potter Jun 2003 A1
20030201784 Potter Oct 2003 A1
20030210573 Lee Nov 2003 A1
20040023236 Potter et al. Feb 2004 A1
20040113752 Schuster Jun 2004 A1
20040145271 Potter Jul 2004 A1
20040155555 Potter Aug 2004 A1
20050035683 Raisanen Feb 2005 A1
20050044955 Potter Mar 2005 A1
20050079640 Potter Apr 2005 A1
20050110057 Wang et al. May 2005 A1
20050186117 Uchiyama et al. Aug 2005 A1
20060131692 Saitoh et al. Jun 2006 A1
20070074731 Potter Apr 2007 A1
20070152776 Potter Jul 2007 A1
Foreign Referenced Citations (7)
Number Date Country
58-029379 Feb 1983 JP
62-297534 Dec 1987 JP
02-219478 Sep 1990 JP
4-236172 Aug 1992 JP
08-308258 Nov 1996 JP
2000-304567 Nov 2000 JP
WO 9731506 Aug 1997 WO
Non-Patent Literature Citations (24)
Entry
Ma et al. “Fixed and trapped charges at oxide-nitride-oxide heterostructure interfaces formed by remote plasma enhanced chemical vapor deposition,” J. Vac. Sci. Technol. B. vol. 11, No. 4, Jul./Aug. 1993, pp. 1533-1540.
“Embedded Electronic Charge MEMS Sensor Technology”, Michael D. Potter, Meeting Paper, Nanotech 2002, American Institute of Aeronautics and Astronautics, Sep. 9-12, 2002.
Wu et al. (“Field related passivation of interface trap after high-field electron injection”, Electronics Letters, vol. 34, No. 7, Apr. 2, 1998, pp. 656-657.
Aguilera et al., “Electron Energy Distribution at the Insulator-Semiconductor Interface in AC Thin Film Electroluminescent Display Devices,” IEEE Transactions on Electron Devices 41(8):1357-1363 (1994).
Brown, et al., “A Varactor-Tuned RF Filter,” IEEE Trans. on MTT, pp. 1-4 (1999).
Cass, S., “Large Jobs for Little Devices,” IEEE Spectrum, pp. 72-73 (2001).
Cui, Z., “Basic Information in Microfluidic System: A Knowledge Base for Microfluidic Devices,” retrieved from the internet at http://web.archive.org/web/20011015071501/http://www.ccmicro.rl.ac.uk/info—microfluidics.html (Oct. 15, 2001).
ILIC et al., “Mechanical Resonant Immunospecific Biological Detector,” Appl. Phys. Lett. 77(3):450-452 (2000).
ILIC et al., “Single Cell Detection with Micromechanical Oscillators,” J. Vac. Sci. Technol. B 19(6):2825-2828 (2001).
Judy et al., “Surface Machined Micromechanical Membrane Pump,” IEEE, pp. 182-186 (1991).
Kobayashi et al., “Distribution of Trapped Electrons at Interface State in ACTFEL Devices,” in Proceedings of the Sixth International Workshop on Electroluminescence, El Paso, Texas, May 11-13, 1992.
Laser & Santiago, “A Review of Micropumps,” J. Micromech. Microeng. 14:R35-R64 (2004).
Shoji & Esashi, “Microflow Devices and Systems,” J. Micromech. Microeng. 4:157-171 (1994).
http://ucsub.colorado.edu/˜maz/research/background.html [Retrieved from Web site on Apr. 4, 2001].
“Low-Power, High-Performance MEMS-Based Switch Fabric,” at http://www.ece.ncsu.edu/erl/damemi/switchproj.html [Retrieved from Web site on Apr. 4, 2001].
http://wwvv.eecs.umich.edu/RADLAB/bio/rebeiz/Current—Research.html [Retrieved from Web site on Apr. 4, 2001].
“MEMS Technology Developers,” at http://www.ida.org/DIVISIONS/std/MEMS/tech—fluids.html [Retrieved from the internet on Jun. 13, 2002].
Tada, Y., “Experimental Characteristics of Electret Generator, Using Polymer Film Electrets,” Jpn. J. Appl. Phys. 31:846-851, Mar. 1992.
Sterken et al., “An Electret-Based Electrostatic μ-Generator,” 12th International Conference on Solid State Sensors, Actuators and Microsytems, pp. 1291-1294, Boston, MA (Jun. 8-12, 2003).
Peano & Tambosso, “Design and Optimization of MEMS Electret-Based Capacitive Energy Scavenger,” J. Microelectromechanical Systems 14(3):429-435, Jun. 2005.
Tada, Y.., “Improvement of Conventional Electret Motors,” IEEE Transactions on Electrical Insulation 28(3): 402-410, Jun. 1993.
Gracewski et al., “Design and Modeling of a Micro-Energy Harvester Using an Embedded Charge Layer,” J. Micromech. Microeng. 16:235-241, Jan. 2006.
Jefimenko & Walker, “Electrostatic Current Generator Having a Disk Electret as an Active Element,” Transactions on Industry Applications 1A-14(6):537-540, (Nov./Dec. 1978).
Genda et al., “High Power Electrostatic Motor and Generator Using Electrets,” 12th International Conference on Solid State Sensors, Actuators and Microsytems, pp. 492-495, Boston, MA (Jun. 8-12, 2003).
Related Publications (1)
Number Date Country
20050205966 A1 Sep 2005 US
Provisional Applications (1)
Number Date Country
60546045 Feb 2004 US