Claims
- 1. A hybrid thick film chip device comprising:
- an insulative substrate having first and second opposite plane surfaces;
- a first set of end terminals on opposite ends of one plane surface;
- a second set of end terminals on opposite ends of the other plane surface;
- means for electrically interconnecting the terminals a each end into pairs;
- a thick film electrical resistor deposited on one of said plane surfaces of said substrate and electrically connected to said first and second sets of terminals; and
- a second thick film component extending between one of said set of terminals and electrically connected to said first and second sets of terminals.
- 2. A device as set forth in claim 1 wherein said second thick film component is mounted in parallel spaced relationship over said resistor and is electrically connected to and mounted on said first set of end terminals.
- 3. A device as defined in claim 1 wherein said resistor is deposited on one surface of said substrate and said second component is mounted between said terminals on the opposite surface of said substrate.
- 4. A device as defined in claim 1 wherein the means for electrically interconnecting the terminals at each end into pairs comprises channels formed in the ends of said substrate and electrical means deposited on respective surfaces of said channels.
- 5. A device as claimed in claim 4 wherein the channels are open slots formed in the end surfaces of the substrate.
- 6. A device as defined in claim 1 wherein one of the components is a capacitor.
Parent Case Info
This patent application is a continuation of prior U.S. patent application Ser. No. 881,669 filed on July 3, 1986.
US Referenced Citations (9)
Foreign Referenced Citations (3)
Number |
Date |
Country |
54-19360 |
Feb 1979 |
JPX |
56-55067 |
May 1981 |
JPX |
60-86850 |
May 1985 |
JPX |
Continuations (1)
|
Number |
Date |
Country |
Parent |
881669 |
Jul 1986 |
|