Patent Application
20080296584
1. Technical Field
The present invention relates to Group III-V nitride semiconductor layer-bonded substrates in which a III-V nitride semiconductor layer and a base substrate are bonded together, and to semiconductor devices incorporating such bonded substrates.
2. Description of the Related Art
Semiconductor devices employing III-V nitride semiconductors are formed in different ways. In one method, a III-V nitride semiconductor epitaxial layer is formed by, for example, metalorganic chemical vapor deposition (MOCVD) or by molecular beam epitaxy (MBE) onto a normative substrate, such as an Si, SiC, or sapphire substrate, that differs from the III-V nitride semiconductor in chemical composition, but only slightly in coefficient of thermal expansion. In another method, onto a III-V nitride semiconductor substrate, a III-V nitride semiconductor epitaxial layer is formed by, for example, MOCVD or MBE.
Utilizing the normative substrate as a substrate for forming a III-V nitride semiconductor epitaxial layer, however, produces stress in the normative substrate due, principally, to difference in thermal expansion coefficient, and to lattice mismatch, between the normative substrate and the III-V nitride semiconductor epitaxial layer. The stress produced in the substrate can lead to substrate and semiconductor device warpage, which causes such problems as increase in dislocation density in the III-V nitride semiconductor epitaxial layer, occurrences of epitaxial layer exfoliation, and degradation of semiconductor device performance. Meanwhile, although utilizing a III-V nitride semiconductor substrate as a substrate for III-V nitride semiconductor epitaxial layer formation enables manufacturing semiconductor devices of enhanced properties—on account of their being no difference or only slight difference in thermal expansion coefficient, and of their being close lattice mismatch, between the III-V nitride semiconductor substrate and the III-V nitride semiconductor epitaxial layer—the very high cost of the III-V nitride semiconductor substrates has made the semiconductor devices built on the substrates disadvantageously expensive.
Therefore, as substrates for the formation of III-V nitride semiconductor epitaxial layers, low-cost materials on which semiconductor devices of favorable properties can be manufactured are being sought. Examples that have been proposed of such substrates include a substrate in which a thin layer of GaN-based III-V nitride semiconductor has been bonded to a base substrate having the thermal expansion coefficient close to, or higher than that of the III-V nitride semiconductor thin layer. (Cf. Int'l. App. Based Japanese Unexamined Pat. App. Pub. No. 2004-512688, for example.)
In Pat. App. Pub. No. 2004-512688, all that is discussed with regard to the bonded substrate is difference in coefficient of thermal expansion between the III-V nitride semiconductor layer and the base substrate. The reason why this patent reference focuses exclusively on difference in thermal expansion coefficient is that in manufacturing semiconductor devices, because growing by MOCVD or MBE an at least single-lamina III-V nitride semiconductor epitaxial layer onto a III-V nitride semiconductor layer-bonded substrate requires high-temperature processes at a level of 600° C. to 1100° C., a significant difference in thermal expansion coefficient between the III-V nitride semiconductor layer and the base substrate will lead to incidents of exfoliation of, and/or cracking in the semiconductor layer bonded to the base substrate.
Minimal difference in thermal expansion coefficient between the III-V nitride semiconductor layer and the base substrate is not, however, the only property demanded of III-V nitride semiconductor layer-bonded substrates employed in semiconductor devices. In particular, in order to reduce the accumulation of heat in the III-V nitride semiconductor layer in manufacturing and in using the semiconductor devices, it is necessary to employ base substrates of high thermal conductivity. Pat. App. Pub. No. 2004-512688, however, fails to take this necessity into consideration.
An object of the present invention is to take into consideration not only the difference in thermal expansion coefficient between the III-V nitride semiconductor layer and the base substrate, but also the thermal conductivity of the base substrate, to make available both III-V nitride semiconductor layer-bonded substrates that enable manufacturing enhanced-performance semiconductor devices, and semiconductor devices including the III-V nitride semiconductor layer-bonded substrates.
One aspect of the present invention is a III-V nitride semiconductor layer-bonded substrate in which a III-V nitride semiconductor layer and a base substrate are bonded together, the bonded substrate being characterized in that the difference in thermal expansion coefficient between the III-V nitride semiconductor layer and the base substrate is 4.5×10−6 K−1 or less, and the thermal conductivity of the base substrate is 50 W·m−1·K−1 or more.
In a III-V nitride semiconductor layer-bonded substrate involving the present invention, as the III-V nitride semiconductor layer, a GaN layer can be utilized. Furthermore, the resistivity of the base substrate can be brought to 10 Ω·cm or less. Moreover, the principal component of the base substrate can be a metal containing at least whichever of Mo, W, or Ir. Alternatively, the principal component the base substrate can be at least whichever of AlN, Si, or SiC. Herein, “principal component” means a component of which 50 mol % or more is contained within the base substrate. In that regard, for example, the sum total of AlN, SiC and Si may be 50 mol % or more. Furthermore, the base substrate thermal conductivity can be made higher than the III-V nitride semiconductor layer thermal conductivity. The base substrate can also be composed of one material selected from the group consisting of Cu—Mo alloys, Cu—W alloys, Al—SiC composite materials, diamond, and diamond-metal composite materials. Moreover, in the base substrate, a plurality of layers can be laminated.
The present invention in another aspect is a semiconductor device having an at least single-lamina III-V nitride semiconductor epitaxial layer formed on the III-V nitride semiconductor layer-bonded substrate.
The present invention affords III-V nitride semiconductor layer-bonded substrates that enable manufacturing semiconductor devices of enhanced properties, and the semiconductor devices including the III-V nitride semiconductor layer-bonded substrates.
From the following detailed description in conjunction with the accompanying drawings, the foregoing and other objects, features, aspects and advantages of the present invention will become readily apparent to those skilled in the art.
Referring to
The situation in which the difference |αL−αS| between the thermal expansion coefficient αL of the III-V nitride semiconductor layer 20 and the thermal expansion coefficient αS of the base substrate 10 has gone higher than 4.5×10−6 K−1 causes exfoliation of the III-V nitride semiconductor layer 20 bonded to the base substrate 10, and/or produces cracks in the III-V nitride semiconductor layer 20. From this perspective, the difference |αL−αS| between the thermal expansion coefficient αL of the III-V nitride semiconductor layer 20 and the thermal expansion coefficient αS of the base substrate 10 is preferably 3.5×10−6 K−1 or less, with 3.0×10−6 K−1 or less being more preferable.
Furthermore, in the situation in which the thermal conductivity λS of the base substrate 10 is less than 50 W·m−1·K−1, an accumulation of heat in III-V nitride semiconductor layer during manufacturing and operation of a semiconductor device increases, degrading the semiconductor device properties. From this perspective, the base substrate thermal conductivity λS is preferably 70 W·m−1·K−1 or more, with at least 100 W·m−1·K−1 being more preferable.
The III-V nitride semiconductor layer 20 in the III-V nitride semiconductor layer-bonded substrate 1 of Embodiment Mode 1 is not particularly limited, so the III-V nitride semiconductor layer 20 may be, to cite exemplary substrates, different Al1-x-yGaxInyN layers (0≦x, 0≦y, x+y≦1). In particular, from the perspective of having outstanding versatility to various semiconductor devices, the III-V nitride semiconductor layer 20 is preferably a GaN layer.
The base substrate 10 in the III-V nitride semiconductor layer-bonded substrate 1 of Embodiment Mode 1 is not particularly limited, as long as the thermal expansion coefficient difference |αL−αS| between the III-V nitride semiconductor layer 20 and the base substrate 10 is 4.5×10−6 K−1 or less, and the thermal conductivity λS of is 50 W·m−1·K−1 or more. Referring to Table I, examples of substances preferably employed in the base substrate 10 include: single crystals, such as SiC, AlN, Si, GaN, GaP, ZrB2 and InP; ceramic, such as polycrystalline AlN (poly-AlN), (sintered) BeO and (sintered) SiC; metals, such as W, Mo, Ir, Ta, and Nb; and heat sink material, such as (sintered) AlN, Cu—Mo alloys, Cu—W alloys, (sintered) Al—SiC composite materials, diamond, and (sintered) diamond-metal composite materials. Herein, the thermal expansion coefficients, heat conductivities, and resistivities of these substances are set forth in Table I.
From the perspective of making it possible to form an electroconductive semiconductor device, either of the two principal surfaces of which an electrode can be formed, the resistivity of the base substrate 10 in the III-V nitride semiconductor layer-bonded substrate 1 of Embodiment Mode 1 is preferably 10 Ω·cm or less, with 1 Ω·cm or less being more preferable.
Furthermore, the base substrate 10 in the III-V nitride semiconductor layer-bonded substrate 1 of Embodiment Mode 1 is preferably composed mainly of a metal containing at least one of Mo, W, or Ir. Herein, the main component means a component contained 50 mol % or more in base substrate. Moreover, 99 mol % or more of a metal including at least either Mo, W, or Ir is preferably contained in the base substrate 10. Metallic Mo, metallic W and metallic Ir are each characterized by only slightly differing in thermal expansion coefficient from III-V nitride semiconductor, particularly from GaN, and by exhibiting high thermal conductivity and low resistivity. Metallic Mo is readily available and easily workable; meanwhile, although metallic W is not easy to work, it is readily available, and conversely, metallic Ir is not easy to come by yet is easily workable.
Also the base substrate 10 in the III-V nitride semiconductor layer-bonded substrate 1 of Embodiment Mode 1 is preferably composed mainly of at least one of AlN, Si, or SiC. That is, at least one of AlN, Si, or Sic is preferably contained 50 mol % or more in the base substrate 10. Additionally, in the base substrate 10, at least one of AlN, Si, or SiC is preferably contained 99 mol % or more. AlN, Si, and SiC are each characterized by only slightly differing in thermal expansion coefficient from III-V nitride semiconductors, particularly from GaN, and by exhibiting high thermal conductivity.
Moreover, the thermal conductivity of the base substrate 10 in the III-V nitride semiconductor-bonded substrate 1 of Embodiment Mode 1 preferably equals or exceeds that of the III-V nitride semiconductor layer 20. In the situation in which the thermal conductivity λS of the base substrate 10 equals or exceeds the thermal conductivity λL of the III-V nitride semiconductor layer 20 (that is, λS≧λL), the base substrate 10 acts as a heat sink for the III-V nitride semiconductor layer 20, meaning that an accumulation of heat in the III-V nitride semiconductor layer 20 during manufacturing and operation of a device is reduced, the device properties are kept at a high level, and its useful life is extended.
Furthermore, the base substrate 10 in the III-V nitride semiconductor layer-bonded substrate 1 of Embodiment Mode 1 preferably includes at least one material selected from the group consisting of (sintered) AlN, Cu—Mo alloys, Cu—W alloys, (sintered) Al—SiC composite materials, diamond, or diamond-metal composite materials. These substances are especially advantageous for heat-sink material because they differ only slightly in thermal expansion coefficient from III-V nitride semiconductors, particularly from GaN, and exhibit remarkably high thermal conductivity.
Additionally, referring to
How a III-V nitride semiconductor layer-bonded substrate involving the present invention is manufactured is not particularly limited, but the following two embodiment modes, for example, are preferably utilized.
Referring to
Herein, the method whereby one of the principal surfaces of the thick III-V nitride semiconductor layer 20 and one of the principal surfaces of the base substrate 10 are bonded together is not particularly limited, but the following ways are preferably employed: the direct bonding technique in which the surfaces to be bonded together are cleaned, directly bonded together, and then joined at a raised temperatures of 600° C. to 1200° C.; and the surface activation technique in which the bonding plane is activated with plasma or ions to join the surfaces.
Herein, the technique whereby the III-V nitride semiconductor layer 20 is sliced in the plane 20c parallel to the bonding plane 12c and located at the distance T into the III-V nitride semiconductor layer 20 from the bonding plane is not particularly limited; accordingly, the III-V nitride semiconductor layer 20 can be mechanically cut by using an inner-circumferentially bladed slicer, an outer-circumferentially bladed slicer or handsaw, or by irradiating laser. Mechanically cutting the III-V nitride semiconductor layer 20, however, reduces the chances that the thickness T of the III-V nitride semiconductor layer 20 on the base substrate 10 is brought to 10 μm or less, so that such a mechanical cutting way is generally suited to manufacturing of III-V nitride semiconductor layer-bonded substrate 1 in which a thickness of the III-V nitride semiconductor layer 20 is more than 10 μm.
Referring to
Through above steps, the substrate (III-V nitride semiconductor layer-bonded substrate 1) in which a transferred part with thickness of TD, of the III-V nitride semiconductor layer 20 has been bonded to the base substrate 10 can be produced. Herein, the thickness TD of the transferred part of the III-V nitride semiconductor layer 20 approximately equals the depth D at which the ions are implanted. Furthermore, in the ion implanting step, from the perspective of minimizing damage to substrate, an ion whose radius is small is preferable, with a hydrogen ion being most preferable. Additionally, in the separating step, the force applied to the base substrate 10 and III-V nitride semiconductor layer 20 includes not only direct force but also indirect force such as stress generated by heat processing.
Such a manufacturing method exploits the fact that that portion of III-V nitride semiconductor layer in which ions are implanted is made fragile, and the depth D at which the ions are implanted is precisely adjustable. For this reason, this method is suited to manufacturing of the III-V nitride semiconductor layer-bonded substrate 1 having the III-V nitride semiconductor layer 20 with the small thickness TD of, for example, a level of 10 nm to 10 μm.
Also in the situation in which a plurality of layers—for example, the first layer 10a and second layer 10b—are laminated as illustrated in
Referring to
Specifically, in the semiconductor device of Embodiment Mode 2, referring to
Furthermore, a p-side electrode 48 is formed on the p-type GaN layer 47, and an n-side electrode 49 on the base substrate 10 in the III-V nitride semiconductor layer-bonded substrate 1. In this way, in a semiconductor device of the present embodiment mode, the p-side electrode 48 and the n-side electrode 49 sandwich the III-V nitride semiconductor layer-bonded substrate 1 and the at least single-lamina III-V nitride semiconductor epitaxial layer 40 and are formed on the principal surfaces on both sides of the bonded substrate/epitaxial layer. Consequently, the base substrate 10 must be a metallic, semiconducting, etc., electroconductive substrate.
Referring to
Specifically, in the semiconductor device of Embodiment mode 3, referring to
Furthermore, a p-side electrode 48 is formed on the p-type GaN layer 47. On the other hand, an n-side electrode 49 is formed on the n-type GaN layer 43 where it has been exposed by dry-etching removal of respective partial regions of the p-type GaN layer 47, p-type Al0.2Ga0.8N layer 46, emission layer 45, and n-type Al0.05Ga0.95N layer 44.
In Embodiment 1, as to various kinds of base substrates and III-V nitride semiconductor layers, whether or not a base substrate principal surface and a semiconductor layer principal surface (elemental Group III-atomic surface) can be bonded together was checked. Herein, as the base substrates, Mo, W, Cu, Al, polycrystalline AlN, Si, SiC, and glass ceramic were utilized. And, as the III-V nitride semiconductor layers, five types of Al1-xGaxN layers (x=0, 0.25, 0.5, 0.75, and 1) were utilized.
First, in the following manner, the different III-V nitride semiconductor layers were formed. An AlN buffer layer 50 nm in thickness was formed by MOCVD, and then the five types of 2 μm-thick Al1-xGaxN layers (x=0, 0.25, 0.5, 0.75, and 1) were epitaxially grown, respectively on 2 inch (50.8 mm)-diameter, 400 μm-thick Si substrates. Subsequently, hydrogen ions were implanted in these five types of Al1-xGaxN layers. With hydrogen ion accelerating voltage being 50 keV, and with the hydrogen ion implantation dose being 1×1017 cm−2, a dopant maximum depth of approximately 200 nm below the Al1-xGaxN layer principal surfaces (elemental III-atomic surfaces) was obtained.
After the hydrogen ion implantation, the Al1-xGaxN layer principal surfaces (the elemental III-atomic surfaces) were cleaned, put in a dry-etching device, and then rendered cleansed surfaces by the plasma generated by discharging electricity through N2 gas. Herein, the conditions under which the Al1-xGaxN layer principal surfaces (the elemental III-atomic surfaces) were dry-etched with N2 gas were: RF power of 100 W; N2 gas flow rate of 50 sccm (1 sccm is a unit indicating the volume of a gas flowing for one minute in the normal state—that is, 1013 hPa and 273 K—is 1 cm3); and N2 gas partial pressure of 13.3 Pa.
On the other hand, the Mo, W, Cu, and Al base substrate principal surfaces were rendered cleansed surfaces by plasma generated by discharging electricity through Ar gas. Herein, the conditions under which the base substrate principal surfaces were dry-etched with Ar gas were: RF power of 100 W; Ar gas flow rate of 50 sccm; and Ar gas partial pressure of 6.7 Pa. In addition, the AlN, Si, SiC and grass ceramic base substrate principal surfaces were rendered cleansed surfaces by plasma generated by discharging electricity through O2 gas. Herein, the conditions under which the base substrate principal surfaces were dry-etched with O2 gas were: RF power of 100 W; O2 gas flow rate of 50 sccm; and O2 gas partial pressure of 6.7 Pa.
Next, the Al1-xGaxN layer principal surfaces (elemental III-atomic surfaces) and base substrate principal surfaces that had been cleansed by dry etching were bonded together in the open air. After bonding, being low in bonding strength, the principal surfaces were heated slowly from room temperature (for example, 20° C. to 30° C.) up to 200° C. to 300° C. over a period of 3 hours in the open air to increase bonding strength.
Subsequently, by ramping to 500° C. and applying a load obliquely to the laminate wafers comprising base substrate, Al1-xGaxN layers, AlN buffer layer, and Si substrate, the portion made fragile by the hydrogen ion implantation were separated out to form 200 nm-thick Al1-xGaxN layers onto the base substrates. Under this test, those laminate wafers yielding a bonded substrate were defined as passing, and those in which, under heat, an Al1-xGaxN layer was exfoliated from the base substrate or cracks were produced in an Al1-xGaxN layer were defined as failing. The results are set forth in Table II.
As is clear from Table II, all the five kinds of Al1-xGaxN layers (x=0, 0.25, 0.5, 0.75 and 1) could be bonded to the Mo, W, polycrystalline AlN, Si, and SiC base substrates, but could not be bonded to the Cu, Al, and glass ceramic substrates. Herein, the base substrates and III-V nitride semiconductor layers that were successfully bonded together met the relationship: The difference in thermal expansion coefficient being 4.5×10−6 K−1 or less, and the base substrate thermal conductivity being 50 W·m−1·K−1 or more.
In Embodiment 2, it was checked whether or not principal surfaces of different base substrates and principal surface of a GaN layer (III-V nitride semiconductor layer) could be bonded together. Herein, as the base substrates, Mo, W, Cu, Al, polycrystalline AlN, Si, SiC, glass ceramic, Cu—Mo alloys, Cu—W alloys, (sintered) Al—SiC composite materials, and (sintered) diamond-Cu composite material were utilized.
Although the thermal expansion coefficient and thermal conductivity of the Cu—Mo alloy, Cu—W alloy, Al—SiC composite materials, and diamond-Cu composite material that were utilized as the base substrates varied depending on content of the components, Cu—Mo alloys with thermal expansion coefficient of 8×10−6 K−1 and thermal conductivity of 180 W·m−1·K−1, Cu—W alloys with thermal expansion coefficient of 8×10−6 K−1 and thermal conductivity of 230 W·m−1·K−1, Al—SiC composite materials with thermal expansion coefficient of 8×10−6 K−1 and thermal conductivity of 150 W·m−1·K−1, and diamond-Cu composite material with thermal expansion coefficient of 6×10−6 K−1 and thermal conductivity of 550 W·m−1·K−1 were employed in Embodiment 2.
Referring to
After the hydrogen ion implantation, one of the GaN layer principal surface (N-atomic surface) was cleaned, put in a dry-etching device, and then rendered a cleansed surface by plasma generated by discharging electricity through N2 gas. Herein, the conditions under which the GaN layer principal surface (N-atomic surface) was dry-etched with N2 gas were: RF power of 100 W; N2 gas flow rate of 50 sccm; and N2 gas partial pressure of 13.3 Pa.
On the other hand, principal surfaces of the Mo, W, Cu, Al, Cu—Mo alloy, Cu—W alloy, Al—SiC composite materials, or diamond-Cu composite material base substrates were rendered cleansed surfaces by plasma generated by discharging electricity through Ar gas. Herein, the conditions under which the base substrate principal surfaces were dry-etched with Ar gas were: RF power of 100 W; Ar gas flow rate of 50 sccm; and Ar gas partial pressure of 6.7 Pa. Furthermore, the principal surfaces of the polycrystalline AlN, Si, SiC, and grass ceramic base substrates were rendered cleansed surfaces by plasma generated by discharging electricity through O2 gas. Herein, the conditions under which the base substrate principal surfaces were etched with O2 gas were: RF power of 100 W; O2 gas flow rate of 50 sccm; and O2 gas partial pressure of 6.7 Pa.
Next, referring to
Subsequently, by ramping to 500° C. and applying a load obliquely to the laminate wafers comprising base substrate and GaN layer, the portion made fragile by the hydrogen ion implantation were separated out to form 200 nm-thick GaN layers (III-V nitride semiconductor layers 20) onto the base substrates 10. Under this test, those laminate wafers yielding a bonded substrate were defined as passing, and those in which, under heat, the GaN layer was exfoliated from the base substrate or cracks were produced in the GaN layer were defined as failing. The results are set forth in Table III.
As clear from Table III, the Mo, W, polycrystalline AlN, Si, SiC, Cu—Mo alloy, Cu—W alloy, Al—SiC composite materials, and diamond-Cu composite material base substrates could be bonded with a GaN layer, but the Cu, Al, and glass-ceramic base substrates could not be bonded with a GaN layer. Herein, the successfully bonded base substrates and III-V nitride semiconductor layers met the relationship: The difference in thermal expansion coefficient being 4.5×10−6 K−1 or less, and the base substrate thermal conductivity being 50 W·m−1·K−1 or more.
Referring to
The substrate with an attached GaN epitaxial layer, the GaN layer/Mo bonded substrate, and the GaN layer/Si bonded substrate were each immersed into an aqueous NaOH solution at 180° C. to measure the density of etch pits arising in correspondence with the GaN layer or GaN epitaxial layer dislocation density. The etch pit density in the GaN layers in the GaN layer/Mo bonded substrate and GaN layer/Si bonded substrate was under one sixth that of the GaN epitaxial layer in the substrate with an attached GaN epitaxial layer. The foregoing results demonstrated that the GaN layers in the GaN layer-bonded substrates had a dislocation density lower than that of the GaN epitaxial layer in the substrate with an attached GaN epitaxial layer.
Referring to
Additionally, in the same manner as in above example, a semiconductor device LED-4B was created employing the bonded substrate, produced in Embodiment 2, in which the W substrate and 200 nm-thick GaN layer had been bonded together.
On the other hand, for comparison with above semiconductor devices, a typical semiconductor device LED-R1 was created in the manner in which, referring to
Next, the p-type GaN layer 57, serving as a temporary substrate, was attached to a (not illustrated) Si substrate, and then the n-type GaN layer 53, exposed by removing the sapphire substrate (baseplate 30) utilizing a laser lift-off technique, was bonded (not illustrated) to the Mo substrate (base substrate 10) in the same manner as in Embodiment 2. After the bonding, the Si substrate serving as the temporary substrate was heated up to 200° C. and removed (not illustrated).
Next, referring to
As a result of measuring emission intensities of the created LED-4A, LED-4B, and LED-R1 at peak wavelength of 450 nm, the emission intensities of the LED-4A and LED-4B was respectively 1.3 and 1.4 relative to the emission intensity of the LED-R1. That is, it has been proved that the III-V nitride semiconductor epitaxial layer 40 formed on the III-V nitride semiconductor layer of the III-V nitride semiconductor layer-bonded substrate has crystallinity and exhibits device characteristics superior to crystallinity and device characteristics of the III-V nitride semiconductor epitaxial layer 50 formed on the sapphire substrate with the buffer layer intervening between the substrate and the bonded substrate.
Referring to
Subsequently, partial regions of the p-type GaN layer, p-type Al0.2Ga0.8N layer 46, emission layer 45, and n-type Al0.05Ga0.95N layer 44 were removed by mesa-etching so that the n-type GaN layer 43 was regionally exposed. Successively, a p-side electrode 48 were formed on the p-type GaN layer 47 and a n-side electrode 49 on that region of the n-type GaN layer 43 which had been exposed by vacuum deposition technique or by electron beam evaporation technique to create a semiconductor device LED-5A.
Additionally, in the same manner as in above example, a semiconductor device LED-5B was created employing the bonded substrate (GaN layer-SiC bonded substrate) that had been produced in Embodiment 2, and in which the SiC substrate (base substrate) and the 200 nm-thick GaN layer had been bonded together.
On the other hand, for comparison with above semiconductor devices, a typical semiconductor device LED-R2 was created in the manner in which, referring to
Next, a portion of the p-type GaN layer 57, p-type Al0.2Ga0.8N layer 56, emission layer 55, and n-type Al0.05Ga0.95N layer 54 was removed by mesa etching so that the n-type GaN layer 53 was regionally exposed. Subsequently, by vacuum deposition technique, or by electron beam evaporation technique, a p-side electrode 58 was formed on the p-type GaN layer 57, and an n-side electrode 59 on that region of the n-type GaN layer 43 which had been exposed, and thus a semiconductor device LED-R2 was created.
As a result of measuring emission intensities of the created LED-5A, LED-5B, and LED-R2 at peak wavelength of 450 nm, the emission intensities of the LED-5A and LED-5B were respectively 1.22 and 1.27 relative to the emission intensity of the LED-R2. That is, these results indicated that the III-V nitride semiconductor epitaxial layer 40 formed on the III-V nitride semiconductor layer of the III-V nitride semiconductor layer-bonded substrate had crystallinity and exhibited device properties superior to crystallinity and device properties of the III-V nitride semiconductor epitaxial layer 50 formed on the sapphire substrate (base substrate 30) with the III-V nitride buffer layer 31 intervening between the substrate and the bonded substrate.
Referring to
On the other hand, referring to
Furthermore, referring to
Next, referring to
Moreover, referring to
Next, referring to
Subsequently, a portion of the p-type GaN layer 47, p-type Al0.2Ga0.8N layer 46, emission layer 45, and n-type Al0.05Ga0.95N layer 44 was removed by mesa etching so that the n-type GaN layer 43 was regionally exposed. After that, by vacuum deposition technique, or by electron beam evaporation technique, a p-side electrode 48 was formed on the p-type GaN layer 47 and an n-side electrode 49 on that region of the n-type GaN layer 43 which had been exposed, to create a semiconductor device LED-6A.
As a result of measuring emission intensities of the LED-6A created in Embodiment 6 and of the comparative LED-R2 created in Embodiment 5 at peak wavelength of 450 nm, the emission intensity of the LED-6A was 1.16 relative to that of the LED-R2. That is, the result proved that the III-V nitride semiconductor epitaxial layer 40 formed on the III-V nitride semiconductor layer 20 of the III-V nitride semiconductor layer-bonded substrate 1 had crystallinity and exhibited device characteristics superior to crystallinity and device characteristics of the III-V nitride semiconductor epitaxial layer 50 formed on the sapphire substrate (base substrate 30) with the III-V nitride buffer layer 31 intervening between the substrate and the epitaxial layer.
The presently disclosed embodiments and implementation examples should in all respects be considered to be illustrative and not limiting. The scope of the present invention is set forth not by the foregoing description but by the scope of the patent claims, and is intended to include meanings equivalent to the scope of the patent claims and all modifications within the scope.
Only selected embodiments have been chosen to illustrate the present invention. To those skilled in the art, however, it will be apparent from the foregoing disclosure that various changes and modifications can be made herein without departing from the scope of the invention as defined in the appended claims. Furthermore, the foregoing description of the embodiments according to the present invention is provided for illustration only, and not for limiting the invention as defined by the appended claims and their equivalents.
| Number | Date | Country | Kind |
|---|---|---|---|
| JP-2007-143922 | May 2007 | JP | national |
