Patent Grant
10339879
The present invention relates to a technique for correcting display pixel misalignment.
Display apparatuses including projectors occasionally encounter pixel misalignment in which display pixels are misaligned. Pixel misalignment may cause display defects. For example, when pixels of a specific color component are misaligned, color misalignment occurs accordingly, causing an incorrect color display. JP-A-2014-160155 discloses a technique, called a pixel misalignment correction process, for correcting pixel misalignment. The pixel misalignment correction process shifts the correspondence between pixels of a display apparatus and data pixels indicated by an image signal.
The pixel misalignment correction process may cause a corner spot which is uneven display occurring at the corners of a display region.
An advantage of some aspects of the invention is that a technique that corrects pixel misalignment while reducing the occurrence of a corner spot is provided.
An aspect of the invention provides an image processing apparatus including a corrector and a determinator. The corrector corrects a correspondence between display pixels of a display unit and data pixels on an image signal to be inputted to the display pixels so that at least one of the display pixels is defined as a mask pixel to which the image signal is no longer inputted. The determinator determines a gradation of the mask pixel in accordance with a gradation indicated by the image signal to be inputted to an edge pixel that is included in the display pixels and located at an edge of the display pixels. According to this aspect, the image processing apparatus corrects pixel misalignment while reducing the occurrence of a corner spot.
The determinator may preferably determine the gradation of the mask pixel by multiplying the gradation of the edge pixel by a coefficient k, where k is a positive real number less than 1. This allows the gradation of the mask pixel to be lower than the gradation of the edge pixel.
The mask pixel may include a first mask pixel and a second mask pixel. The first mask pixel is located closer to the edge pixel than the second mask pixel is. In such a case, the determinator preferably determines a gradation of the first mask pixel by multiplying the gradation of the edge pixel by a first coefficient k1, where k1 is a positive real number less than 1, and preferably determines a gradation of the second mask pixel by multiplying the gradation of the edge pixel by a second coefficient k2, where k2 is a positive real number less than the first coefficient k1. This further reduces a voltage at the boundary between the edge pixel and the mask pixel.
When the gradation of each of the display pixels is represented by a voltage applied thereto, a ratio of a voltage applied to the mask pixel to a voltage applied to the edge pixel may be preferably given as follows: 0.1≤k≤0.6, where Vm represents the voltage applied to the mask pixel and where Vi represents the voltage applied to the edge pixel. This reduces the occurrence of a corner spot.
When the gradation of each of the display pixels is represented by a brightness level thereof, a ratio of a brightness level of the mask pixel to a brightness level of the edge pixel may be preferably given as follows: 0.05%≤(Tm/Ti)≤40%, where Tm represents the brightness level of the mask pixel and where Ti represents the brightness level of the edge pixel. This reduces the occurrence of a corner spot while keeping the mask pixel invisible.
Another aspect of the invention provides a display apparatus including a display unit, a corrector, and a determinator. The display unit has display pixels. The corrector corrects a correspondence between the display pixels of the display and data pixels on an image signal to be inputted to the plurality of display pixels so that at least one of the plurality of display pixels is defined as a mask pixel to which the image signal is no longer inputted. The determinator determines a gradation of the mask pixel in accordance with a gradation indicated by the image signal to be inputted to an edge pixel that is included in the plurality of display pixels and located at an edge of the plurality of display pixels. According to this aspect, the display apparatus corrects pixel misalignment while reducing the occurrence of a corner spot.
It is preferable that the display apparatus includes a projection unit and that the display includes multiple liquid crystal panels that modulate different color components of light. The projection unit projects the light modulated by the liquid crystal panels. This corrects pixel misalignment on an image to be projected.
Still another aspect of the invention provides an image processing method including a correcting step and a determining step. The correcting step corrects a correspondence between display pixels of a display unit and data pixels on an image signal to be inputted to the display pixels so that at least one of the display pixels is defined as a mask pixel to which the image signal is no longer inputted. The determining step determines a gradation of the mask pixel in accordance with a gradation indicated by the image signal to be inputted to an edge pixel that is included in the display pixels and located at an edge of the display pixels. According to this aspect, the image processing method corrects pixel misalignment while reducing the occurrence of a corner spot.
The invention will be described with reference to the accompanying drawings, wherein like numbers reference like elements.
A projector that uses an electro-optical device, such as a liquid crystal panel, as an optical modulator is taken as an example to describe a display apparatus according to an embodiment.
In
In order not to interfere with an image displayed by the image pixel, the mask pixel is controlled to have a gradation corresponding to black by related techniques. As a result, a voltage at the boundary between an edge pixel and the mask pixel increases. The voltage increase may cause a corner spot which is an uneven gradation distribution occurring at the corners of the displayed image.
The light source 11 emits light used to display the image. The light source 11 has a lamp or a solid state light source. Examples of the lamp include a high-pressure mercury lamp, a halogen lamp, and a metal halide lamp. Examples of the solid state light source include a light emitting diode (LED) and a laser diode. The light source 11 further has a driving circuit for the lamp or the solid state light source. The light emitted by the light source 11 is split by a spectroscopic optical system (not shown) into multiple color components, and the color components are modulated separately. According to the present embodiment, the light is split into three color components: red (R), green (G), and blue (B).
The IF section 12 serves as an interface that allows the exchange of data between the display apparatus 1 and an external apparatus. For example, the IF section 12 has at least one of the followings. A video graphics array (VGA) port, a universal serial bus (USB) port, a wired local area network (LAN) interface, a separate (S) port, an RCA jack, a high-definition multimedia interface (HDMI, a registered trademark of HDMI Licensing LLC) port, a microphone jack, and a wireless LAN interface. According to the present embodiment, the IF section 12 serves as an image input interface. Alternatively, the IF section 12 may double as an image output interface. The IF section 12 receives an image signal Vin from an external apparatus (not shown) and outputs an image signal Si and a synchronization signal Sync. The image signal Si indicates the gradation of each of pixels for each color component. The synchronization signal Sync indicates the timing of synchronization between the data pixel and the display pixel and has, for example, both a horizontal synchronization signal and a vertical synchronization signal.
The image processing circuit 13 applies predetermined image processing, such as resizing or keystone correction, to the image signal Si. The converter 15 outputs the synchronization signal Sync that indicates the timing to drive the liquid crystal panel 17. Further, the converter 15 converts the image signal Si into a signal form that can be processed by the liquid crystal driver 16. According to the present embodiment, the converter 15 converts the image signal Si into data signals DR, DG, and DB. The liquid crystal driver 16 outputs a drive signal to drive the liquid crystal panel 17 in accordance with the data signals DR, DG, and DB. As such, the optical state of each pixel in the liquid crystal panel 17 is determined in accordance with the image signal Si. The liquid crystal panel 17 is an example of an optical modulator that modulates projection light. According to the present embodiment, the liquid crystal panel 17 has multiple display pixels arranged in a matrix. Further, the liquid crystal driver 16 and the liquid crystal panel 17 are divided into sets for each color component. Specifically, the liquid crystal driver 16 includes liquid crystal drivers 16R, 16G, and 16B, and the liquid crystal panel 17 includes liquid crystal panels 17R, 17G, and 17B. The set of the liquid crystal driver 16R and the liquid crystal panel 17R is provided corresponding to the red (R) component, the set of the liquid crystal driver 16G and the liquid crystal panel 17G is provided corresponding to the green (G) component, and the set of the liquid crystal driver 16B and the liquid crystal panel 17B is provided corresponding to the blue (B) component.
The liquid crystal panels 17R, 17G, and 17B modulate the light emitted by the light source 11 to create their respective color images. The modulated light beams are combined and then projected on a screen by the projection lens 18.
The controller 19 controls the components of the display apparatus 1 and includes a central processing unit (CPU) and a memory module. The controller 19 outputs a control signal Sc. The control signal Sc specifies a method to determine the gradation of the mask pixel. According to the present embodiment, the method of determining the gradation of the mask pixel includes a voltage correction method based on a voltage and a brightness correction method based on a brightness level. The control signal Sc specifies which of the two methods is used to determine the gradation of the mask pixel. The controller 19 controls the operation of the image processing circuit 13.
The pixel misalignment processing circuit 131 performs a pixel misalignment process including a gradation determination process that uses the voltage correction method to determine the gradation of the mask pixel. When receiving a logic high signal as an enable signal Enable, the pixel misalignment processing circuit 131 applies the pixel misalignment process to the inputted image signal Si. In contrast, when receiving a logic low level as the enable signal Enable, the pixel misalignment processing circuit 131 outputs the inputted image signal Si without applying the pixel misalignment process to the inputted image signal Si.
The converter 132 converts the image signal Si indicative of the voltage of each pixel into a brightness signal indicative of the brightness level of each pixel. When the liquid crystal panel 17 is a transmissive liquid crystal panel, the brightness level of a pixel refers to the transmittance of the pixel. When the liquid crystal panel 17 is a reflective liquid crystal panel, the brightness level of a pixel refers to the reflectance of the pixel. According to the present embodiment, the liquid crystal panel 17 is a transmissive liquid crystal panel. The converter 132 stores a conversion table which is set in accordance with voltage-transmittance (V-T) characteristics of the liquid crystal panel 17. The converter 132 converts a voltage into a brightness level by referring to the conversion table.
The pixel misalignment processing circuit 133 performs the pixel misalignment process including the gradation determination process that uses the brightness correction method to determine the gradation of the mask pixel. When receiving the high level signal as the enable signal, the pixel misalignment processing circuit 133 performs the pixel misalignment correction on the inputted image signal Si. In contrast, when receiving the low level signal as the enable signal, the pixel misalignment processing circuit 133 outputs the inputted image signal Si without performing the pixel misalignment correction.
The control signal Sc is logic high when the gradation of the mask pixel is to be determined by the brightness correction method. In contrast, the control signal Sc is logic low when the gradation of the mask pixel is to be determined by the voltage correction method. The inverter 134 inverts the logic level of the control signal Sc to be inputted as the enable signal Enable to the pixel misalignment processing circuit 131. In contrast, the logic level of the control signal Sc remains unchanged when the control signal Sc is inputted as the enable signal Enable to the pixel misalignment processing circuit 133.
The pixel misalignment correction unit 1311 performs the pixel misalignment correction process. As already described with reference to
In the pixel misalignment correction process, the pixel misalignment correction unit 1311 shifts the timing between a horizontal synchronization signal Hsync and the image signal Si by an amount corresponding to the pixel misalignment. For example, when the data pixel needs to be shifted to the left by one pixel relative to the display pixel, the pixel misalignment correction unit 1311 delays the horizontal synchronization signal Hsync relative to the image signal by one clock cycle. In contrast, when the data pixel needs to be shifted to the right by one pixel relative to the display pixel, the pixel misalignment correction unit 1311 delays the image signal relative to the horizontal synchronization signal Hsync by one clock cycle.
The cut-off pixel processor 1312 performs the cut-off pixel process. The display pixel to be set as the cut-off pixel is determined by, for example, the controller 19. In the cut-off pixel process, the cut-off pixel processor 1312 processes the image signal Si so that the gradation of the cut-off pixel can correspond to black. If the liquid crystal panel 17 has no cut-off pixel, the cut-off pixel processor 1312 outputs the inputted image signal Si without any processing.
The mask pixel processor 1313 performs the mask pixel process. According to the present embodiment, the mask pixel process determines the gradation of the mask pixel by multiplying the gradation of the edge pixel by a predetermined coefficient.
An image signal Data-IN is inputted to the mask pixel processor 1313. For the sake of simplicity, the image signal Data-IN shown in
The D-FF 13131 delays the image signal Data_IN by one clock cycle, thereby generating an output signal. Further, the D-FF 13131 stores data on the falling edge of the signal DE. The multiplier 13132 multiplies the output signal of the D-FF 13131 by a coefficient k indicated by the coefficient signal k, thereby outputting an image signal Data_A. The image signal Data_A outputted from the multiplier 13132 is divided into two signals; one of which is inputted to the D-FF 13133; the other of which is inputted to the selector 13135.
The D-FF 13133 delays the image signal Data_A by one clock cycle, thereby outputting an image signal Data_B. The image signal Data_B outputted from the D-FF 13133 and an image signal Data(2CLK) are inputted to the selector 13134. The image signal Data(2CLK) is a signal generated by delaying the image signal Data_IN by two clock cycles. When the selection signal Sel is logic low, the selector 13134 outputs the image signal Data(2CLK). When the selection signal Sel is logic high, the selector 13134 outputs the image signal Data_B. Each of the D-FF 13131 and the D-FF 13133 reset data to output when the horizontal synchronization signal Hsync changes to logic low.
The image signal Data_A and the output signal of the selector 13134 are inputted to the selector 13135. In addition, a signal DE(2CLK) is inputted as a selection signal to the selector 13135. The signal DE(2CLK) is generated by delaying the signal DE by two clock cycles. When the signal DE(2CLK) is logic low, the selector 13135 outputs the image signal Data_A. When the signal DE(2CLK) is logic high, the selector 13135 outputs the output signal of the selector 13134. The output signal of the selector 13135 is divided into two signals; one of which is inputted to the selector 13136; the other of which is inputted to the selector 13137. The signal inputted to the selector 13136 is the same as the signal inputted to the selector 13137. For the sake of convenience, the signal inputted to the selector 13136 is referred to as the “image signal Data_Cp”, and the signal inputted to the selector 13137 is referred to as the “image signal Data_C”. For the operation of the selector 13136 and the selector 137, the image signal Data_Cp is effective when the selection signal Sel is logic high, and the image signal Data_C is effective when the selection signal Sel is logic low. As such, when one of the image signal Data_Cp and the image signal Data_C is effective, the other is ineffective. Therefore, the image signal Data_Cp and the image signal Data_C are considered as separate signals.
The image signal Data_Cp and an image signal Data(3CLK) are inputted to the selector 13136. The image signal Data(3CLK) is a signal generated by delaying the image signal Data_IN by three clock cycles. In addition, a signal DE(3CLK) is inputted as a selection signal to the selector 13136. The selection signal DE(3CLK) is a signal generated by delaying the signal DE by three clock cycles. When the signal DE(3CLK) is logic low, the selector 13136 outputs the image signal Data_Cp. When the signal DE(3CLK) is logic high, the selector 13136 outputs the image signal Data(3CLK).
An output signal Data_D of the selector 13136 and the image signal Data_C are inputted to the selector 13137. In addition, the selection signal Sel is inputted to the selector 13136. When the selection signal Sel is logic low, the selector 13137 outputs the image signal Data_C. When the selection signal Sel is logic high, the selector 13137 outputs the image signal Data_D. An output signal of the selector 13137 is outputted as an image signal Data_Out from the mask pixel processor 1313.
In the image signal Data_C and the image signal Data_D, a value calculated by multiplying the gradation of the edge pixel by the coefficient k is set to the gradation of the mask pixel. For example, the gradation of the mask pixel adjacent to the edge pixel having the gradation of “A” is set to “kA”. In the image signal Data_C, one pixel adjacent to the edge pixel is processed as the mask pixel. In the image signal Data_D, two pixels adjacent to the edge pixel are processed as the mask pixels.
Referring back to
Although the configuration of the pixel misalignment processing circuit 133 is not described here, the pixel misalignment processing circuit 133 has the same configuration as that of the pixel misalignment processing circuit 131 shown in
The liquid crystal panel 17 is an example of a display unit for displaying an image. The projection lens 18 is an example of a projection unit for projecting light modulated by the display unit. The pixel misalignment correction unit 1311 is an example of a corrector for correcting the correspondence between display pixels of the display unit and data pixels on an image signal. The mask pixel processor 1313 is an example of a determinator for determining the gradation of a mask pixel in accordance with a gradation indicated by the image signal inputted to an edge pixel. The pixel misalignment processing circuit 131 is an example of an image processing apparatus having the corrector and the determinator.
This process reduces a voltage at a boundary E between the mask pixel and the edge pixel (i.e., the boundary between the pixels P[7] and P[8] of the blue (B) component and the boundary between the pixels P[1] and P[2] of each of the green (G) component and the red (R) component), compared to related-art techniques that always change the gradation of the mask pixel to black without any consideration of the gradation of the edge pixel. The reduction in the voltage reduces the occurrence of a corner spot accordingly. Further, since the gradation of the mask pixel is set so that the mask pixel is darker than the edge pixel, color misalignment occurring at both ends of an image becomes less visible than the condition shown in
The third operation example uses the cut-off pixel as the image pixel, thus reducing a reduction in resolution.
The inventor of the invention conducted an experiment to examine whether a corner spot occurs by setting the coefficient k as a parameter to various values. The experiment was conducted as follows. All pixels of a normally black, vertical alignment (VA) liquid crystal panel had a voltage (5.0 volts) applied thereto corresponding to white (i.e., the maximum gradation) and kept illuminated continuously for two hundred hours. Then, a visual inspection of whether a corner spot occurred after the two-hundred-hour illumination was conducted.
0.05%≤(Tm/Ti) (1),
where Tm represents the brightness of the mask pixel, and Ti represents the brightness of the edge pixel.
The inventor of the invention conducted another experiment to determine a condition that makes the mask pixel invisible by setting the intensities of the image pixel and the mask pixel as parameters to various values.
(Tm/Ti)≤40% (2),
where when (Tm/Ti) is 40%, the coefficient k is 0.6.
In conclusion, the experiment results shown in
0.1≤k≤0.6 (3)
Besides, the brightness ratio (Tm/Ti) of the mask pixel to the edge pixel preferably satisfies the following condition (4):
0.05%≤(Tm/Ti)≤40% (4)
The above embodiment can be modified in various ways. Modifications are described below. The modifications described below may be used in combination with each other.
Multiple mask pixels may be provided corresponding to one edge pixel. In such a case, the intensities of the mask pixels can be determined by multiplying the gradation of the edge pixel by different coefficients.
The method of determining the gradation of the mask pixel is not limited to that described in the embodiment. For example, the gradation of the mask pixel can be determined by subtracting a predetermined value from the gradation of the edge pixel. In this case, the gradation of the mask pixel is processed so as not to become negative.
The hardware configurations of the display apparatus 1 and the components of the display apparatus 1 are not limited to those described in the embodiment. The display apparatus 1 and the components of the display apparatus 1 can have any hardware configuration that implements required functions. For example, although the image processing circuit 13 shown in
The number of pixels, the voltage values, the gradation values, the signal levels described in the embodiment are just examples, and the invention is not limited to the examples.
This application claims priority to Japan Patent Application No. 2016-79494 filed Apr. 12, 2016, the entire disclosures of which are hereby incorporated by reference in their entireties.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2016-079494 | Apr 2016 | JP | national |
| Number | Name | Date | Kind |
|---|---|---|---|
| 20020063784 | Kitagawa | May 2002 | A1 |
| 20080089608 | Phillips | Apr 2008 | A1 |
| Number | Date | Country |
|---|---|---|
| 2009-031442 | Feb 2009 | JP |
| 2014-160155 | Sep 2014 | JP |
| Number | Date | Country | |
|---|---|---|---|
| 20170294168 A1 | Oct 2017 | US |
