The disclosure herein relates to an image sensor, particularly relates to an image sensor based on charge carrier avalanche.
An image sensor or imaging sensor is a sensor that can detect a spatial intensity distribution of a radiation. An image sensor usually represents the detected image by electrical signals. Image sensors based on semiconductor devices may be classified into several types, including semiconductor charge-coupled devices (CCD), complementary metal-oxide-semiconductor (CMOS), N-type metal-oxide-semiconductor (NMOS). A CMOS image sensor is a type of active pixel sensor made using the CMOS semiconductor process. Light incident on a pixel in the CMOS image sensor is converted into an electric voltage. The electric voltage is digitized into a discrete value that represents the intensity of the light incident on that pixel. An active-pixel sensor (APS) is an image sensor that includes pixels with a photodetector and an active amplifier. A CCD image sensor includes a capacitor in a pixel. When light incidents on the pixel, the light generates electrical charges and the charges are stored on the capacitor. The stored charges are converted to an electric voltage and the electrical voltage is digitized into a discrete value that represents the intensity of the light incident on that pixel.
Disclosed herein is an image sensor comprising: a plurality of avalanche photodiodes (APDs); wherein each of the APDs comprises a radiation absorption layer that comprises an absorption region and an amplification region; wherein the absorption region is configured to generate charge carriers therein from a particle of radiation absorbed by the radiation absorption layer; wherein the absorption region comprises an InGaAs layer sandwiched between InP layers; wherein the amplification region has an electric field therein, the electric field having a field strength sufficient to cause an avalanche of the charge carriers in the amplification region.
In an aspect, the absorption region has a thickness of 10 microns or above.
In an aspect, interfaces between the InGaAs layer and the InP layers are parallel to a radiation receiving surface of the radiation absorption layer.
In an aspect, interfaces between the InGaAs layer and the InP layers are perpendicular to a radiation receiving surface of the radiation absorption layer.
In an aspect, the doped semiconductor has a non-zero concentration gradient of a dopant.
In an aspect, the amplification region comprises a doped semiconductor in electrical contact with a first electrode.
In an aspect, a geometry of the first electrode is configured to generate the electric field.
In an aspect, the first electrode comprises a tip with a shape of cone, frustum, prism, pyramid, cuboid, or cylinder.
In an aspect, the first electrode is configured to collect the charge carriers generated directly from the particle of radiation or by the avalanche.
In an aspect, the first electrode is configured to concentrate the electric field.
In an aspect, the first electrode extends into the radiation absorption layer.
In an aspect, at least one of the plurality of APDs comprises an electronics layer.
In an aspect, the image sensor further comprises an outer electrode arranged around the first electrode, and electrically insulated from the first electrode; wherein the outer electrode is configured to shape the electric field in the amplification region.
In an aspect, the outer electrode is configured not to collect charge carriers.
In an aspect, the outer electrode comprises discrete regions.
In an aspect, the image sensor further comprises a second electrode on the radiation absorption layer, the second electrode being opposite from the first electrode.
In an aspect, the second electrode is configured to collect charge carriers in the radiation absorption layer.
In an aspect, the second electrode is planar.
In an aspect, the second electrode comprises discrete regions.
In an aspect, the discrete regions of the second electrode extend into the radiation absorption layer.
Charge carrier avalanche is a process where free charge carriers in a material are subjected to strong acceleration by an electric field and subsequently collide with other atoms of the material, thereby ionizing them (impact ionization) and releasing additional charge carriers which accelerate and collide with further atoms, releasing more charge carriers—a chain reaction. Impact ionization is a process in a material by which one energetic charge carrier can lose energy by the creation of other charge carriers. For example, in semiconductors, an electron (or hole) with enough kinetic energy can knock a bound electron out of its bound state (in the valence band) and promote it to a state in the conduction band, creating an electron-hole pair. One example of an electronic device using the charge carrier avalanche is an avalanche photodiode (APD), which uses charge carrier avalanche to generate an electric current upon exposure to light. An APD will be used as an example to describe the charge carrier avalanche but the description may be applicable to other electronic devices that use the charge carrier avalanche.
An APD may work in the Geiger mode or the linear mode. When the APD works in the Geiger mode, it may be called a single-photon avalanche diode (SPAD) (also known as a Geiger-mode APD or G-APD). A SPAD is an APD working under a reverse bias above the breakdown voltage. Here the word “above” means that absolute value of the reverse bias is greater than the absolute value of the breakdown voltage. A SPAD may be used to detect low intensity light (e.g., down to a single photon) and to signal the arrival times of the photons with a jitter of a few tens of picoseconds. A SPAD may be in a form of a p-n junction under a reverse bias (i.e., the p-type region of the p-n junction is biased at a lower electric potential than the n-type region) above the breakdown voltage of the p-n junction. The breakdown voltage of a p-n junction is a reverse bias, above which exponential increase in the electric current in the p-n junction occurs. An APD working at a reverse bias below the breakdown voltage is operating in the linear mode because the electric current in the APD is proportional to the intensity of the light incident on the APD.
In one embodiment, a portion or whole radiation absorption layer 311 includes a sandwich-type structure made of stacks of the InGaAs layer 212 sandwiched by the InP layers 211, as shown in
In one embodiment, the radiation absorption layer 311 may comprise a doped region 312 that is lightly doped with a dopant. A semiconductor is considered to be lightly doped when the semiconductor contains a proportion of dopant to semiconductor atom being small enough so that the electronic states of the dopants at the Fermi level are localized (i.e., the band of the dopant may not overlap with the conduction or valence band of the semiconductor). For instance, lightly doped silicon may have a ratio of dopants to silicon atoms on the order of 1/1011. The doped region 312 may extend a few microns from a surface into the interior region of the radiation absorption layer 311, and may have a non-zero concentration gradient of the dopant. In the example of
The one or more electrodes 304 may comprise a conducting material such as a metal (e.g., gold, copper, aluminum, platinum, etc.), or any other suitable conducting materials (e.g., a heavily doped semiconductor). The one or more electrodes 304 may have small dimensions or a suitable shape so that the electric field 306 near the one or more electrodes 304 is concentrated. For example, the one or more electrodes 304 may comprise a tip with a shape of cone, frustum, prism, pyramid, cuboid, or cylinder, etc. In the example of
When the radiation hits the radiation absorption layer 311, it may be absorbed and generate one or more charge carriers by a number of mechanisms. A particle of the radiation may generate 10 to 100000 charge carriers. One type (electrons or holes) of the charge carriers drift toward the amplification regions 320. The charge carriers may drift in directions such that substantially all (more than 98%, more than 99.5%, more than 99.9% or more than 99.99% of) charge carriers generated by a particle of radiation incident around the footprint 330 of one of the electrodes 304 flow to the amplification region 320 corresponding to the electrode 304. Namely, less than 2%, less than 0.5%, less than 0.1%, or less than 0.01% of these charge carriers flow beyond the amplification region 320 corresponding to the electrode 304. When the charge carriers enter the amplification region 320, the avalanche effect occurs and causes amplification of the charge carriers. The amplified charge carriers can be collected through the corresponding electrodes 304, as an electric current. In the linear mode, the electric current is proportional to the number of incident particles of radiation around the footprint 330 of the electrode 304 per unit time (i.e., proportional to the radiation intensity). The electric currents at the electrodes 304 may be compiled to represent a spatial intensity distribution of radiation, i.e., an image.
In the example of
The outer electrode 305 may be configured to shape the electric field 306 in the amplification region 320 of the electrode 304 corresponding to the outer electrode 305, and the outer electrode 305 may not be configured to collect charge carriers. For example, the electric field 306 (e.g., its strength, gradient) may be tuned by introducing a voltage difference between the outer electrode 305 and its corresponding electrode 304. In an embodiment, the outer electrode 305 may have a same voltage with the counter electrode 301. In an embodiment, the outer electrode 305 may not necessarily be a ring as shown in
In an embodiment, the counter electrode 301 may be planar, as shown in
In step 1000, a semiconductor substrate 411 is obtained. The semiconductor substrate 411 may comprise an intrinsic semiconductor such as silicon. The semiconductor substrate 411 may have a sufficient thickness and thus a sufficient absorbance (e.g., >80% or >90%) for incident particles of radiation of interest (e.g., photons of X-ray). The semiconductor substrate 411 may have a thickness of 10 microns or above.
In step 1001-step 1003, the semiconductor substrate 411 may be doped to form a doped region 412 (shown in step 1004-step 1006). The doped region 412 may function as the doped region 312 of the radiation absorption layer 311 in
In step 1001, a mask layer 402 is formed on a surface of the semiconductor substrate 411. The mask layer 402 may serve as a screening layer configured to retard entry of dopants into the semiconductor substrate 411 in the step 1002 of doping. The mask layer 402 may comprise a material such as silicon dioxide. The thickness of the mask layer 402 may be determined according to doping conditions in step 1002 and desired doping profile of the doped region 412 (shown in step 1004-step 1006) to be formed. The mask layer 402 may be formed onto the surface by various techniques, such as thermal oxidation, vapor deposition, spin coating, sputtering or any other suitable processes.
In step 1002, a surface of the semiconductor substrate 411 is light doped with a suitable dopant 10 by a doping technique such as dopant diffusion and ion implantation. The rate of dopant entering into the semiconductor substrate 411 may be controlled by the mask layer 402, the dose of dopants doped, and doping details such as the energy of the dopants during an ion implantation.
In step 1003, the semiconductor substrate 411 being doped is annealed to drive the dopants into the interior region of the semiconductor substrate 411. The dopants diffuse into the interior region at elevated temperatures (e.g., around 900° C.). The annealing duration may be prolonged to promote diffusion of the dopants into the interior region. The high-temperature environment of the annealing may also help anneal out defects of the semiconductor substrate 411.
Besides controlling the doping and annealing conditions, the doping (step 1002) and annealing (step 1003) may be carried out in a repeating manner for a number of times to form the doped region 412 with a desired doping profile.
In an embodiment, the doped region 412 may comprise discrete regions. The mask layer 402 may have a pattern with areas of different thicknesses. A portion of dopants can penetrate through the thinner areas of the mask layer and form discrete regions of the doped region 412, while the thicker areas of the mask layer prevent the dopants entering into the semiconductor substrate 411.
In step 1004, the mask layer 402 may be removed by wet etching, chemical mechanical polishing or some other suitable techniques.
In step 1005, electrodes 404 may be formed onto the semiconductor substrate 411. The electrodes 404 may function as the electrodes 304 of the image sensor 300. The electrodes 404 may be in electrical contact with the doped region 412. In the example of step 1005, the electrodes 404 each comprise a tapered tip extending into the semiconductor substrate 411. Forming the electrode 404 may involve forming a mask with openings on the surface of the semiconductor substrate 411 by suitable techniques such as lithography. Shapes and locations of the openings correspond to the footprint shapes and locations of the electrodes 404 to be formed. Recesses of desired shape and dimensions are formed into the surface of the semiconductor substrate 411 by etching portions of the substrate 411 uncovered by the mask. The etching process may be carried out by a technique such as dry etching (e.g., deep reactive-ion etching), wet etching (e.g., anisotropic wet etching), or a combination thereof. Conducing materials such as metal (e.g., gold, copper, aluminum, platinum, etc.) may be deposited into the recesses to form the electrodes 404 by a suitable technique such as physical vapor deposition, chemical vapor deposition, spin coating, sputtering, etc. The mask may be kept and server as a passivation layer of the surface of the substrate 411. In an embodiment, the mask may be removed and a passivation material 403 may be applied to passivate the surface of the substrate 411.
In optional step 1006, outer electrodes 405 may be formed around the electrodes 404. The electrodes 405 may function as the outer electrodes 305 in
In step 1007, a sandwich layer 413 may be bonded on another surface of the substrate 411. The sandwich layer 413 may include one or more sandwich-type structures formed by InGaAs layer 212 sandwiched in between InP layers 211. A counter electrode 401 may be formed on a surface of the sandwich layer 413. The counter electrode 401 may function as the counter electrode 301 of the image sensor 300. In the example of step 1007, the counter electrode 401 is planar and may be formed by depositing conducting materials such as metals onto the other surface of the semiconductor substrate 411 by a suitable technique such as vapor deposition, sputtering, etc.
Forming the image sensor 300 may comprise some intermediate steps such as surface cleaning, polishing, surface passivation, which are not shown in
The electronics layer 920 may include an electronic system 921 suitable for processing or interpreting the electrical signals. The electronic system 921 may include an analog circuitry such as a filter network, amplifiers, integrators, and comparators, or a digital circuitry such as a microprocessors, and memory. The electronic system 921 may include one or more ADCs. The electronic system 921 may include components shared by the pixels or components dedicated to a single pixel. For example, the electronic system 921 may include an amplifier dedicated to each pixel and a microprocessor shared among all the pixels. The electronic system 921 may be electrically connected to the pixels by vias 931. Space among the vias may be filled with a filler material 930, which may increase the mechanical stability of the connection of the electronics layer 920 to the radiation absorption layer 910. Other bonding techniques are possible to connect the electronic system 921 to the pixels without using vias.
The first voltage comparator 1901 is configured to compare the voltage of an electrode (e.g., one of the electrodes 904 in
The second voltage comparator 1902 is configured to compare the voltage to a second threshold. The second voltage comparator 1902 may be configured to monitor the voltage directly, or calculate the voltage by integrating an electric current flowing through the electrode over a period of time. The second voltage comparator 1902 may be a continuous comparator. The second voltage comparator 1902 may be controllably activated or deactivated by the controller 1910. When the second voltage comparator 1902 is deactivated, the power consumption of the second voltage comparator 1902 may be less than 1%, less than 5%, less than 10% or less than 20% of the power consumption when the second voltage comparator 1902 is activated. The absolute value of the second threshold is greater than the absolute value of the first threshold. As used herein, the term “absolute value” or “modulus” |x| of a real number x is the non-negative value of x without regard to its sign. Namely,
The second threshold may be 200%-300% of the first threshold. The second threshold may be at least 50% of the maximum voltage one incident radiation particle may generate directly in the radiation absorption layer or after being amplified in the radiation absorption layer. For example, the second threshold may be 100 mV, 150 mV, 200 mV, 250 mV or 300 mV. The second voltage comparator 1902 and the first voltage comparator 1901 may be the same component. Namely, the system 921 may have one voltage comparator that can compare a voltage with two different thresholds at different times.
The first voltage comparator 1901 or the second voltage comparator 1902 may include one or more op-amps or any other suitable circuitry. The first voltage comparator 1901 or the second voltage comparator 1902 may have a high speed to allow the system 921 to operate under a high flux of incident radiation particle. However, having a high speed is often at the cost of power consumption.
The counter 1920 is configured to register a number of particles of radiation reaching the radiation absorption layer. The counter 1920 may be a software component (e.g., a number stored in a computer memory) or a hardware component (e.g., a 4017 IC and a 7490 IC).
The controller 1910 may be a hardware component such as a microcontroller and a microprocessor. The controller 1910 is configured to start a time delay from a time at which the first voltage comparator 1901 determines that the absolute value of the voltage equals or exceeds the absolute value of the first threshold (e.g., the absolute value of the voltage increases from below the absolute value of the first threshold to a value equal to or above the absolute value of the first threshold). The absolute value is used here because the voltage may be negative or positive, depending on which electrode is used. The controller 1910 may be configured to keep deactivated the second voltage comparator 1902, the counter 1920 and any other circuits the operation of the first voltage comparator 1901 does not require, before the time at which the first voltage comparator 1901 determines that the absolute value of the voltage equals or exceeds the absolute value of the first threshold. The time delay may expire before or after the voltage becomes stable, i.e., the rate of change of the voltage is substantially zero. The phase “the rate of change of the voltage is substantially zero” means that temporal change of the voltage is less than 0.1%/ns. The phase “the rate of change of the voltage is substantially non-zero” means that temporal change of the voltage is at least 0.1%/ns.
The controller 1910 may be configured to activate the second voltage comparator during (including the beginning and the expiration) the time delay. In an embodiment, the controller 1910 is configured to activate the second voltage comparator at the beginning of the time delay. The term “activate” means causing the component to enter an operational state (e.g., by sending a signal such as a voltage pulse or a logic level, by providing power, etc.). The term “deactivate” means causing the component to enter a non-operational state (e.g., by sending a signal such as a voltage pulse or a logic level, by cut off power, etc.). The operational state may have higher power consumption (e.g., 10 times higher, 100 times higher, 1000 times higher) than the non-operational state. The controller 1910 itself may be deactivated until the output of the first voltage comparator 1901 activates the controller 1910 when the absolute value of the voltage equals or exceeds the absolute value of the first threshold.
The controller 1910 may be configured to cause the number registered by the counter 1920 to increase by one, if, during the time delay, the second voltage comparator 1902 determines that the absolute value of the voltage equals or exceeds the absolute value of the second threshold.
The controller 1910 may be configured to cause the voltmeter 1906 to measure the voltage upon expiration of the time delay. The controller 1910 may be configured to connect the electrode to an electrical ground, so as to reset the voltage and discharge any charge carriers accumulated on the electrode. In an embodiment, the electrode is connected to an electrical ground after the expiration of the time delay. In an embodiment, the electrode is connected to an electrical ground for a finite reset time period. The controller 1910 may connect the electrode to the electrical ground by controlling the switch 1905. The switch 1905 may be a transistor such as a field-effect transistor (FET).
In an embodiment, the system 921 has no analog filter network (e.g., a RC network). In an embodiment, the system 921 has no analog circuitry.
The voltmeter 1906 may feed the voltage it measures to the controller 1910 as an analog or digital signal.
The system 921 may include a capacitor module 1909 electrically connected to the electrode, wherein the capacitor module is configured to collect charge carriers from the electrode. The capacitor module can include a capacitor in the feedback path of an amplifier. The amplifier configured as such is called a capacitive transimpedance amplifier (CTIA). CTIA has high dynamic range by keeping the amplifier from saturating and improves the signal-to-noise ratio by limiting the bandwidth in the signal path. Charge carriers from the electrode accumulate on the capacitor over a period of time (“integration period”) (e.g., as shown in
The controller 1910 may be configured to cause the voltmeter 1906 to measure the voltage upon expiration of the time delay TD1. In an embodiment, the controller 1910 causes the voltmeter 1906 to measure the voltage after the rate of change of the voltage becomes substantially zero after the expiration of the time delay TD1. The voltage at this moment is proportional to the amount of charge carriers generated by a particle of radiation or amplified by the avalanche, which relates to the energy of the radiation particle. The controller 1910 may be configured to determine the energy of the radiation particle based on voltage the voltmeter 1906 measures. One way to determine the energy is by binning the voltage. The counter 1920 may have a sub-counter for each bin. When the controller 1910 determines that the energy of the radiation particle falls in a bin, the controller 1910 may cause the number registered in the sub-counter for that bin to increase by one. Therefore, the system 921 may be able to detect a radiation image and may be able to resolve radiation particle energies of each radiation particle.
After TD1 expires, the controller 1910 connects the electrode to an electric ground for a reset period RST to allow charge carriers accumulated on the electrode to flow to the ground and reset the voltage. After RST, the system 921 is ready to detect another incident radiation particle. Implicitly, the rate of incident particles of radiation the system 921 can handle in the example of
Although X-ray is used as an example of the radiation herein, the apparatuses and methods disclosed herein may also be suitable for other radiation such as infrared light.
While various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The various aspects and embodiments disclosed herein are for purposes of illustration and are not intended to be limiting, with the true scope and spirit being indicated by the following claims.
Number | Date | Country | |
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Parent | PCT/CN2020/132599 | Nov 2020 | US |
Child | 18196016 | US |