Claims
- 1. A method of fabricating a printhead having a polysilicon coated layer, the layer having a uniform sheet resistance comprising:
- (a) forming the polysilicon layer of substantially uniform grain size on a substrate;
- (b) doping the polysilicon layer with dopants;
- (c) exposing the polysilicon layer to electrical charges generated by a flood gun during doping of the polysilicon layer; and
- (d) annealing the polysilicon layer.
- 2. The method of claim 1, wherein forming the polysilicon comprises chemical vapor deposition of polycrystalline silicon at at least one of a flat temperature profile and a ramped temperature profile.
- 3. The method of claim 1, wherein the step of forming the polysilicon comprises:
- (i) chemical vapor deposition of amorphous silicon at at least one of a flat temperature profile and a ramped temperature profile; and
- (ii) thermal cycling of the amorphous silicon at temperatures to convert the amorphous silicon to polysilicon.
- 4. The method of claim 1, wherein doping the polysilicon layer comprises at least one of ion implantation and diffusion of dopants into the polysilicon layer.
- 5. The method of claim 4, wherein the dopants are at least one of n-type and p-type dopants.
- 6. The method of claim 1, wherein the charges generated by the flood gun are low energy electrons.
- 7. A method of fabricating a heater element so that resistances between individual resistors of heater elements in a printhead and from printhead to printhead are substantially uniform, the method comprising the steps of:
- (a) forming a resistor on a substrate of a heater element, the resistor forming step comprising:
- (i) forming a polysilicon on a substrate;
- (ii) doping the polysilicon with dopants while exposing the polysilicon to electrical charges generated by a flood gun, and
- (iii) annealing the polysilicon to form the resistor;
- (b) forming contact means at each of two ends of the resistor;
- (c) forming insulation means on top of the resistor and between the contact means;
- (d) forming insulative films on top of the contact means and insulation means of the heater element.
- 8. The method of claim 7, wherein forming the polysilicon layer comprises chemical vapor deposition of polycrystalline silicon at at least one of a flat temperature profile and a ramped temperature profile.
- 9. The method of claim 7, wherein the step of forming the polysilicon comprises:
- (i) chemical vapor deposition of amorphous silicon at at least one of a flat temperature profile and a ramped temperature profile; and
- (ii) thermal cycling of the amorphous silicon at temperatures to convert the amorphous silicon to polysilicon.
- 10. The method claim of 7, wherein the charges generated by the flood gun are low energy electrons.
- 11. The method of claim 7, wherein forming the contact means comprises:
- (i) depositing oxide on top of the resistor;
- (ii) depositing phosphosilicate glass on the oxide;
- (iii) heating the oxide to reflow the phosphosilicate glass;
- (iv) etching the phosphosilicate glass to form contact vias at each end of the resistor and to expose an area between the contact vias; and
- (v) forming electrodes at the contact vias.
- 12. The method of claim 7, wherein forming the insulation means comprises:
- (i) forming at least one of a dielectric layer and an oxide layer on top of the resistor and between the contact means; and
- (ii) forming a Ta layer on top of at least one of the dielectric and oxide layers.
- 13. The method of claim 7, wherein forming the insulative films comprises:
- (i) depositing a first insulative layer;
- (ii) depositing a second insulative layer;
- (iii) etching the second insulative layer to expose a portion of the first insulative layer; and
- (iv) etching the first insulative layer to expose the insulation means.
Parent Case Info
This is a Division of application Ser. No. 07/972,277 filed Nov. 5, 1992, now abandoned.
US Referenced Citations (6)
Foreign Referenced Citations (3)
Number |
Date |
Country |
0090963 A2 |
Oct 1983 |
EPX |
0281141 |
Sep 1988 |
EPX |
3613372 A1 |
Sep 1987 |
DEX |
Non-Patent Literature Citations (2)
Entry |
C.P. Wu et al., "Wafer Charging Control in High-Current Implanters", J. Electrochem. Soc., vol. 13, Oct. 10, 1992, pp. 2-9. |
A Sedra and K. Smith. "Microelectronic Circuits"; Saunders College Publishing, USA (1991) pp. A4-A6, F1. |
Divisions (1)
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Number |
Date |
Country |
Parent |
972277 |
Nov 1992 |
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