Patent Application
20150268268
The present invention relates generally to microelectromechanical systems (MEMS) inertial sensors. More specifically, the present invention relates to an inertial sensor having built-in trim capacitance for trimming offset.
Microelectromechanical Systems (MEMS) devices are widely used in applications such as automotive, inertial guidance systems, household appliances, protection systems for a variety of devices, and many other industrial, scientific, and engineering systems. Such MEMS devices may be used to sense a physical condition such as acceleration, angular velocity, pressure, or temperature, and to provide an electrical signal representative of the sensed physical condition. MEMS sensor designs are highly desirable for operation in high gravity environments and in miniaturized devices, and due to their relatively low cost.
A more complete understanding of the present invention may be derived by referring to the detailed description and claims when considered in connection with the Figures, wherein like reference numbers refer to similar items throughout the Figures, the Figures are not necessarily drawn to scale, and:
Capacitive-sensing MEMS inertial sensor designs are useful for measuring acceleration forces. These forces may be static, like the constant force of gravity, or they can be dynamic, caused by moving or vibrating the accelerometer. In general, capacitive-sensing MEMS accelerometers sense a change in electrical capacitance, with respect to acceleration, to vary the output of an energized circuit. One common form of accelerometer is a two layer capacitive inertial sensor having a “teeter-totter” or “see saw” configuration. This commonly utilized sensor type uses a movable element or plate that rotates under z-axis acceleration above a substrate. The accelerometer structure can measure two distinct capacitances to determine differential or relative capacitance.
In an accelerometer, when the movable element is not subject to acceleration, it should be in a non-excited state, i.e., a null state or position. For example, the movable element of a z-axis accelerometer should be balanced above a surface of an underlying substrate such that it lies generally in a plane that is parallel to the surface of the substrate. Unfortunately, displacement of the movable element from the non-excited state can result when the accelerometer is subjected to package stress or excessive temperature. For example, when a packaged accelerometer experiences a temperature change, the package substrate may bend due to a mismatch in the coefficient of thermal expansion (CTE) of the materials used to manufacture and package the accelerometer.
The term “offset” refers to the output deviation from its nominal value at the non-excited state of the MEMS sensor. Package stress and/or temperature induced displacement can produce a non-zero output electrical signal (i.e., an offset voltage) at the output terminals of the accelerometer in response to package stress or excessive temperature. Additionally, the offset voltage can vary from sensor to sensor due to process and manufacturing variations. Z-axis accelerometers are particularly subject to offset since they are more sensitive to asymmetrical bending of the underlying substrate. Unfortunately, offset of the movable element can result in decreased accelerometer performance, clipping, reduced usable dynamic range due to non-symmetry, and so forth.
Some architectures for MEMS accelerometers include capacitor banks that are connected to the sense nodes in order to trim for, i.e., adjust for, the offset. That is, in capacitive-sensing accelerometers, offset trimming is generally realized by transferring some amount of electric charge, Q, into the sense nodes of the accelerometer. Other techniques for offset trimming may be employed as well. For purposes of the following discussion, techniques used to adjust for offset in the movable element are referred to collectively as “trimming” or, alternatively, “offset trimming.”
Temperature coefficient of offset (TCO) is a measure of induced stresses as a function of temperature that are placed on a semiconductor device such as a MEMS device. Thus, TCO is a measure of how much thermal stresses effect the performance of a semiconductor device, such as a MEMS sensor. In MEMS accelerometer products, the TCO may be one of the most critical parameters and should be preferably near zero in order to reduce sensor inaccuracies. In practice, however, the TCO is typically not sufficiently near zero, thus requiring compensation to reduce the TCO to near zero.
For some accelerometer applications, offset trimming may be performed with the accelerometer at room temperature to derive a single offset value (electric charge) for a particular accelerometer. A single offset value may be inadequate for offset trimming over a wide range of operational temperatures and/or may not take into consideration the stress effect after the accelerometer is mounted to a board. While such an approach may be economical, part performance may be sacrificed.
In other accelerometer applications, TCO may be calculated using multiple temperature insertions. A correction factor offset trim value (sometimes referred to as a trim code) may then be derived for each temperature range. When in use, a temperature sensor can monitor the operating temperature of the accelerometer and the appropriate trim code corresponding to the current temperature may be applied in order to trim for, i.e., adjust for, the offset. Unfortunately, such a technique can significantly increase test costs. Furthermore, this approach may not take into consideration the stress effect after the accelerometer is mounted to a board.
Embodiments entail MEMS inertial sensor designs, which may be, for example, z-axis accelerometers or other sensing devices, that incorporate built-in trim elements that produce trim capacitances in response to asymmetrical bending of the underlying substrate for use in offset trimming. Embodiments additionally entail methodology for utilizing the built-in trim capacitors to perform a trim function using the measurements from the trim capacitors. The methodology can be used to perform dynamic, in situ compensation for the offset voltage or to determine the TCO correction factors (trim code). Such an approach can yield test cost savings as well as improved sensor performance.
Referring to
MEMS sensor 20 includes a movable element 24, commonly referred to as a “proof mass” flexibly suspended above a surface 26 of a substrate 28 by one or more flexures 30. More particularly, MEMS inertial sensor 20 includes an anchor 32 formed on surface 26 of substrate 28, and flexures 30 are coupled between anchor 32 and movable element 24. Flexures 30 enable rotation of movable element 24 about a rotational axis 34, and anchor 32 is positioned at rotational axis 34. Anchor 32 is illustrated in
MEMS sensor 20 further includes trim elements 36 and 38, respectively, spaced away from, i.e., suspended above, surface 26 of substrate 28 by a rigid beam structure 40. In the illustrated embodiment, trim elements 36 and 38, respectively, are immovably coupled to anchor 32, i.e. are static relative to anchor 32. In particular, an end 42 of beam structure 40 is affixed to trim element 36, the opposing end 44 of beam structure 40 is affixed to trim element 38, and a central region 46 of beam structure 40 is affixed to anchor 32. In some embodiments, beam structure 40 is suitably dimensioned to largely prevent movement of trim elements 36 and 38, respectively, about rotational axis 34 when MEMS sensor 20 is subjected to acceleration. Additionally, trim elements 36 and 38 are symmetrically positioned relative to one another on opposing sides of rotational axis 34.
A static conductive layer 48 is disposed on surface 26 of substrate 28. Static conductive layer 48 (most clearly seen in
Sense elements 50 and 52 are sized and spaced symmetrically with respect to rotational axis 34. That is, each of sense elements 50 and 52 is offset an equivalent distance 58 on opposing sides of rotational axis 34. Likewise, trim elements 54 and 56 are symmetrically arranged relative to rotational axis 34. That is, each of trim elements 54 and 56 is offset an equivalent distance 60 on opposing sides of rotational axis 34. Only two sense elements 50 and 52 are shown in
When intended for operation as a teeter-totter type accelerometer, a section 62 of movable element 24 on one side of rotational axis 34 is formed with relatively greater mass than a section 64 of movable element 24 on the other side of rotational axis 34. In an embodiment, the greater mass of section 62 may be created by offsetting rotational axis 34 such that an extended portion 66 of section 62 is formed distal from rotational axis 34. In other embodiments, when rotational axis 34 is not offset, the greater mass of section 62 relative to section 64 may be created by making section 62 thicker than section 64, and/or by removing mass from section 64 by, for example, forming apertures extending through section 64.
The greater mass of section 62 causes movable element 24 to rotate/tilt about rotational axis 34 in response to acceleration in Z-direction 22, as demonstrated in
In an embodiment, sense element 50 faces section 62 of movable element 24, and thus a sense signal, referred to herein as a sense capacitance 68 and labeled CS1, is produced between sense element 50 and section 62 of movable element 24. Similarly, sense element 52 faces section 64 of movable element 24, and thus a sense signal, referred to herein as a sense capacitance 70 and labeled CS2, is produced between sense element 52 and section 64 of movable element 24. The change of position of movable element 24 relative to the static sense elements 50 and 52 in response to acceleration in Z-direction 22 results in sense capacitances 68 and 70, respectively, whose difference, i.e., a differential capacitance, is indicative of acceleration in Z-direction 22. It should be understood that the capacitor symbols illustrated in
Detection circuitry (not shown) captures a resulting capacitance signal generated from sense capacitances 68 and 70 which is subsequently processed to a final output signal. When subject to a fixed or constant acceleration, the capacitance value is also constant, resulting in a measurement signal proportional to static acceleration, also referred to as DC or uniform acceleration, which can subsequently be processed to a final output signal.
During operation the sense signal, i.e., the final output signal, may include an offset signal component resulting from the indirect coupling of movable element 24 to the underlying substrate 28 via anchor 32. Thus, deformation of the underlying substrate due to, for example, package stress and/or temperature variation can produce a non-zero output electrical signal (e.g., an offset voltage) at the output terminals of the accelerometer. Trim elements 36, 38, 54, and 56 are implemented in inertial sensor 20 to compensate for, i.e., largely cancel, this offset voltage.
It should be recalled that trim elements 36 and 38, respectively are indirectly attached to the underlying substrate 28 via anchor 32. Thus, trim elements 36 and 38 will experience the same or nearly the same offset as does movable element 24. In an embodiment, trim element 54 faces trim element 36. Thus, a trim signal, referred to herein as a trim capacitance 72 and labeled CT1, is produced between trim element 36 and trim element 54. Similarly, trim element 56 faces trim element 38. Thus, a trim signal, referred to herein as a trim capacitance 74 and labeled CT2, is produced between trim element 38 and trim element 56.
A resulting capacitance signal generated from trim capacitances 72 and 74 is produced when trim elements 36 and 38 are under package stress and/or elevated temperature. Moreover, the difference between trim capacitances 72 and 74, respectively, correlates with the difference between sense capacitances 68 and 70, respectively under package stress and/or elevated temperature. However, since trim capacitances 72 and 74 are immovable about rotational axis 34, trim capacitances 72 and 74 should have no or minimum change (differentially) under acceleration. As will be discussed in connection with methodology presented below, trim capacitances 72 and 74 can be used to trim an offset error component in an output signal of inertial sensor 20.
Inertial sensor 20 may be fabricated in accordance with conventional MEMS process technologies, such as, for example, surface micromachining using a number of different conductive, semi-conductive, and/or dielectric materials. Surface micromachining is based on the deposition, patterning, and etching of different structural layers. Surface micromachining enables the fabrication of high-quality MEMS devices because it is based on thin-film technology that combines control and flexibility in fabrication. By way of example, surface 26 of substrate 28 may be deposited with conductive material layer 48. This conductive material layer 48 can then be masked, patterned, and etched to define sense elements 50 and 52, respectively, and trim elements 54 and 56, respectively. Subsequent operations can entail the deposition of a sacrificial layer, formation of contact openings, deposition of a second conductive material, masking, patterning, etching, and the like per conventional techniques to produce inertial sensor 20 having movable element 24 and the suspended and immovable trim elements 36 and 38, respectively.
In the configuration of
In contrast to inertial sensor 20 (
In the configuration of
Although separate anchors 82 and 84 are used to suitably suspend movable element 24 and trim elements 36 and 38 above the underlying substrate 28, due to their position at rotational axis 34, each of movable element 24 and trim elements 36 and 38 will be subject to similar offset error due to package stress and temperature variation. Thus, any offset error imposed on the sense signal can be compensated for, i.e., corrected, as will be discussed in connection with methodology presented below.
Both inertial sensor 20 (
In contrast to inertial sensors 20 (
Offset error trim process 110 begins with a task 112. At task 112, a differential trim capacitance is detected from the trim elements. Referring briefly to
A task 114 is performed in connection with task 112. At task 114, a differential sense capacitance is detected from the sense elements. Again referring briefly to
Offset error trim process 110 continues with a task 116. At task 116, the raw trim signal detected at task 112 may be amplified using a trim signal amplification factor. In some embodiments, it may be desirable to electronically amplify the capacitance change of the trim elements, i.e., the raw trim signal, and use the amplified signal to dynamically trim the offset error from the differential sense capacitance. Accordingly, in some embodiments, prior to factory test and/or in situ operation of the inertial sensor, e.g., any of inertial sensors 20 (
Once the trim signal is obtained at task 116, a task 118 is performed. At task 118, the trim signal is applied to the raw sense signal determined at task 114 to produce a compensated sense signal in which offset error due to package stress and temperature has been largely removed. In some embodiments, the trim signal is subtracted from the raw sense signal to produce the compensated sense signal.
Process 110 continues with a task 120. At task 120, this compensated sense signal, indicative of acceleration, and corrected for offset error is output from the compensation circuit (not shown). Following task 120, an iteration of offset error trim process 110 ends. Of course, in some embodiments, process 110 is continuously repeated in order to obtain continuous or periodic acceleration readings in accordance with particular design configurations.
Raw trim voltage signal 128 is amplified at a gain block 136 using an amplification factor 138, labeled -K, to obtain a trim signal 140, labeled V(T), in accordance with task 116 (
Compensation circuit 122 may be implemented in hardware, software, or some combination thereof. Additionally, gain block 136 and/or summing circuit 142 may be implemented in an analog domain, or alternatively, in the digital domain. The block diagram of
The configuration shown in
In an example, when the trim cycle is set, i.e., logic signal 150 is set to, for example “1,” raw trim voltage signal 128 may be stored in a trim storage block 152, labeled TRIM MEM, and/or raw trim voltage signal 128 may be amplified at gain block 136 using amplification factor 138 to obtain trim signal 140. Trim signal 140 can eventually be applied to raw sense voltage signal 134 via summing circuit 142 in accordance with task 118 (
In various embodiments, trim storage block 152, gain block 136 and/or summing circuit 142 of compensation circuit 146 may be implemented in the analog domain, or alternatively, in the digital domain. The block diagram of
The configuration shown in
The block diagram of
Offset error trim process 110 (
Referring to
Trim code definition process 168 includes a series of operations that may be executed prior to board mount of inertial sensor 20. Trim code definition process 168 then continues with a series of operations that may be executed after board mount of inertial sensor 20. Compensation circuit 170 presented in
Trim code definition process 168 begins with a task 172. At task 172, inertial sensor 20 is subjected to a next temperature setting. Of course, during a first iteration of trim code definition process 168, a “next” temperature setting may be a first temperature setting. Task 172 is performed prior to board mount of inertial sensor 20 and under zero acceleration at the sensing axis.
In response to task 172, a task 174 is performed. At task 174, a differential trim capacitance is detected from the trim elements. In particular, trim capacitances 72 and 74 from trim elements 54 and 56 are received at compensation circuit 170. The difference between trim capacitance 74 and trim capacitance 72 is differential trim capacitance 124. Differential trim capacitance 124 is input into a capacitance-to-voltage block 176 which conditions differential trim capacitance 124 to produce a raw trim voltage signal 128, labeled V(RT), that is proportional to differential trim capacitance 124.
A task 178 is performed in connection with task 174. At task 178, a differential sense capacitance is detected from the sense elements. In particular, sense capacitances 68 and 70 from sense elements 50 and 52 are received at compensation circuit 170. The difference between sense capacitance 70 and sense capacitance 68 is differential sense capacitance 130. Differential sense capacitance 130 is input into another capacitance-to-voltage block 180 which conditions differential sense capacitance 130 to produce raw sense voltage signal 134, labeled V(RS), that is proportional to differential sense capacitance 130.
Trim code definition process 168 continues with a task 182. At task 182, a correlation factor is established between raw sense voltage signal 134 and raw trim voltage signal 128. By way of example, the block diagram of
Following task 182, trim code definition process 168 continues with a query task 192. At query task 192, a determination is made as to whether there is another temperature setting 188 at which a correlation factor 186 is to be established. If there is another temperature setting 188, process control loops back to task 172 so that correlation factors 186 can be determined at multiple temperature settings 188. However, when a determination is made at query task 192 that there are no further temperature settings 188 for which correlation factor 186 is to be established, trim code definition process 168 continues with a task 194.
Task 194 is executed after a correlation factor 186 is established for each temperature setting 188 of interest. Additionally, task 194 is executed after inertial sensor 20 has been board mounted. Thus, task 194 and subsequent tasks of trim code definition process can be executed to derive a TCO trim code, taking into consideration stress due to board mounting. At task 194, inertial sensor 20 is subjected to a next temperature setting. Again, during a first iteration of task 194, the “next” temperature setting may be a first temperature setting. During the execution of task 194, there is not a zero acceleration requirement.
Process 168 continues with a task 196. At task 196, a differential trim capacitance is detected from the trim elements. Again, trim capacitances 72 and 74 from trim elements 54 and 56 are received at compensation circuit 170. The difference between trim capacitance 74 and trim capacitance 72, i.e., differential trim capacitance 124 is input into a capacitance-to-voltage block 176 which conditions differential trim capacitance 124 to produce a raw trim voltage signal 128, labeled V(RT), that is proportional to differential trim capacitance 124.
A task 198 is performed in connection with task 196. At task 198, a temperature function of raw trim voltage signal 128 is established as a function of temperature setting 188. By way of example, processing block 184 includes a functional representation which shows a trim voltage signal 200, labeled V(RT)TEMP, as a function of temperature setting 188. Those skilled in the art will recognize that various mathematical techniques may be implemented to determine trim voltage signal 200.
Following task 198, a task 202 is performed. At task 202, the temperature function of the raw trim voltage signal 128, i.e., trim voltage signal 200, is converted to a temperature function of a sense signal using the correlation factor to derive the trim code. By way of example, processing block 184 includes a mathematical representation which shows the conversion of trim voltage signal 200 to a sense voltage signal 204, labeled V(RS)TEMP, using correction factor 186 for a particular temperature setting 188. In an embodiment sense voltage signal 204 determined using correction factor 186 is a derived TCO trim code 206.
Trim code definition process 168 continues with a task 208. At task 208, TCO trim code 206 is stored in memory. By way of example, processing block 184 includes a table 210. Table 210 includes multiple temperature settings 188 and TCO trim codes 206, where each temperature setting 188 has a particular TCO trim code 206 associated therewith. Table 210 may be memory that at least temporarily stores TCO trim codes 206 in association with their temperature settings 188. The contents of table 210 may subsequently be loaded into a corresponding memory element 212 in compensation circuit 170, so that TCO trim codes 206 can be accessed when inertial sensor 20 is in operational use. Although only a single inertial sensor 20 is represented herein, the contents of table 210 may be loaded into the corresponding memory elements 212 of a plurality of inertial sensors 20 so that each inertial sensor has the same TCO trim codes 206.
Following task 208, trim code definition process 168 continues with a query task 214. At query task 214, a determination is made as to whether there is another temperature setting for which TCO trim code 206 is to be determined. When there is another temperature setting, program control loops back to task 194 to repeat the determination of TCO trim code 206 at another temperature setting 188. However, if there is not another temperature setting for which TCO trim code 206 is to be determined, trim code definition process 168 exits.
Referring to
Offset error trim process 216 begins with a task 218. At task 218, a differential sense capacitance is detected from the sense elements in response to acceleration in Z-direction 22 (
A task 220 is performed in cooperation with task 218. At task 220, the operational temperature of inertial sensor 20 is detected. As shown in
In response to tasks 218 and 220, a task 226 is performed. At task 226, one of TCO trim codes 206 associated with operational temperature 224 is selected from memory element 212 and is applied to raw sense voltage signal 134. In an embodiment, the negative of the selected one of TCO trim codes 206 is added to raw sense voltage signal 134 at a summing circuit 228 to produce compensated sense voltage signal 144. That is, TCO trim code 206, representing the offset error, is subtracted from raw sense voltage signal 134 to yield compensated sense voltage signal 144.
Offset error trim process 216 continues with a task 230. At task 230, compensated sense voltage signal 144, indicative of acceleration, and corrected for offset error is output from compensation circuit 170. Following task 230, an iteration of offset error trim process 216 ends. Of course, in some embodiments, process 216 may be continuously repeated in order to obtain continuous or periodic acceleration readings in accordance with particular design configurations.
Embodiments entail MEMS inertial sensor designs, which may be, for example, z-axis accelerometers or other sensing devices that incorporate built-in trim elements to produce trim capacitances in response to asymmetrical bending of the underlying substrate for use in offset trimming. That is, the trim elements are largely insensitive to acceleration (differentially) due to their symmetrical design. However, the trim elements are sensitive to asymmetrical bending of the underlying substrate to produce capacitance signals that will change differentially, thus serving as correction (trim) capacitors. Embodiments additionally entail methodology for utilizing the built-in trim elements and the resulting capacitances to perform a trim function using the measurements from the trim elements. The methodology can be used to perform dynamic, in situ compensation for the offset voltage or to determine TCO correction factors (trim code). Such an approach can yield test cost savings as well as improved sensor performance.
Although a particular MEMS device architecture is described in conjunction with the figures, embodiments may be implemented in MEMS devices having other architectures as well. Furthermore, certain process blocks described in connection with the methodology may be performed in parallel with each other or with performing other processes, and/or the particular ordering of the process blocks may be modified, while achieving substantially the same result. These and other such variations are intended to be included within the scope of the inventive subject matter.
While the principles of the inventive subject matter have been described above in connection with specific apparatus and methods, it is to be clearly understood that this description is made only by way of example and not as a limitation on the scope of the inventive subject matter. Further, the phraseology or terminology employed herein is for the purpose of description and not of limitation.
The foregoing description of specific embodiments reveals the general nature of the inventive subject matter sufficiently so that others can, by applying current knowledge, readily modify and/or adapt it for various applications without departing from the general concept. Therefore, such adaptations and modifications are within the meaning and range of equivalents of the disclosed embodiments. The inventive subject matter embraces all such alternatives, modifications, equivalents, and variations as fall within the spirit and broad scope of the appended claims.
