Insulation structure for high temperature conditions and manufacturing method thereof

Abstract

An insulation structure for high temperature conditions and a manufacturing method thereof. In the insulation structure, a substrate has a conductive pattern formed on at least one surface thereof for electrical connection of a device. A metal oxide layer pattern is formed on a predetermined portion of the conductive pattern by anodization, the metal oxide layer pattern made of one selected from a group consisting of Al, Ti and Mg.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

FIG. 1 illustrates a conventional method for manufacturing an insulation structure which adopts a solder resist as an insulating layer;

FIG. 2 is a schematic view illustrating an insulation structure according to an embodiment of the invention;

FIGS. 3 a to 3f illustrate a method for manufacturing an insulation structure according to another embodiment of the invention;

FIG. 4 is a schematic view illustrating an electrical connection of devices in a wafer level package (WLP) process using the insulation structure of the invention;

FIG. 5 illustrates a successive arrangement of those structures as shown in FIG. 4; and

FIG. 6 is a schematic view illustrating a successive arrangement of an electrical connection of LEDs using the insulation structure of the invention.

Claims

1. An insulation structure for high temperature conditions comprising: a substrate having a conductive pattern formed on at least one surface thereof for electrical connection of a device; anda metal oxide layer pattern formed on a predetermined portion of the conductive pattern by anodization, the metal oxide layer pattern comprising one selected from a group consisting of Al, Ti and Mg.

2. The insulation structure according to claim 1, wherein the device comprises a power chip or a light emitting diode.

3. The insulation structure according to claim 1, further comprising an upper substrate provided on the metal oxide layer pattern.

4. The insulation structure according to claim 3, wherein the upper substrate and the metal oxide pattern are bonded together by Au/Sn eutectic bonding.

5. The insulation structure according to claim 3, wherein the device comprises a light emitting diode, and the upper substrate comprises a reflecting plate.

6. The insulation structure according to claim 1, wherein the substrate is a Si substrate.

7. A method for manufacturing an insulation structure for high temperature conditions comprising: preparing a substrate having a conductive pattern formed on at least one surface thereof for electrical connection of a device;depositing a metal selected from a group consisting of Al, Ti and Mg on the substrate with the conductive pattern formed thereon by PVD to form a metal deposition layer;oxidizing the metal deposition layer by anodization to form a metal oxide layer;applying a photosensitive film on the metal oxide layer, and exposing and developing the photosensitive film to form a photosensitive film pattern; andetching a surface of the substrate with the photosensitive film pattern formed thereon to remove the metal oxide layer, thereby forming a metal oxide layer pattern on the conductive pattern.

8. The method according to claim 7, wherein the PVD is sputtering or evaporation.

9. The method according to claim 7, further comprising attaching an upper substrate onto the metal oxide layer pattern.

10. The method according to claim 9, wherein the upper substrate and the metal oxide layer pattern are bonded together by Au/Sn eutectic bonding.

11. The method according to claim 9, wherein the device comprises a light emitting diode, and the upper substrate comprises a reflecting plate.