Patent Application
20050073805
The present invention relates to integrated circuits; more particularly, the present invention relates to integrated circuit packages.
With the continued advancement of computer systems there is a desire to increase input/output (I/O) and power delivery interconnect performance, resulting in higher pin (or land) counts of socketed integrated circuit devices. Increasing the land (or pin) count of an integrated circuit typically results in increased package and socket size as the land pitch, the center to center spacing between lands, is uniform. An alternative method is to uniformly reduce the land pitch to minimize the impact of increasing the physical size of a device.
For a given socket technology, there is also a practical high volume manufacturing (HVM) limit restricting the extent to which socket land pitch can be reduced. At this time something larger than 1 mm in any dimension represents a HVM limit for various types of sockets (e.g., stamped metal contact land grid array (LGA) sockets). Therefore, if a target land count cannot be reached given a desired body size and the minimum HVM pitch limit, the only way to increase land count is to grow body size over the target. Growth to package body size represents significant cost because all components of the total integrated circuit solution increase in cost. Another limitation for increasing land count by reducing pitch is motherboard routing technologies used in breaking out signals from the socket. At this time, it is generally agreed that a 5 mil line width and 5 mil line-2-line space paired with a 25 mil pad via and an 18 mil socket pad represent the industry standard technology base for motherboard routing rules. The combination of these technologies with the desired signal to ground ratio for a device will limit how many rows deep land side motherboard breakout can reach. Non-land side breakout on the motherboard is limited by line geometries, via pad size, and via pitch.
The present invention will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the invention. The drawings, however, should not be taken to limit the invention to the specific embodiments, but are for explanation and understanding only.
An integrated circuit (IC) package with mixed pitch is described. In the following description, numerous details are set forth. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the present invention.
Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment.
Socket 120 facilitates an electrical connection between IC 130 and circuits on motherboard 110. IC 130 is a semiconductor wafer on which thousands or millions of tiny resistors, capacitors, and transistors are fabricated. According to one embodiment, socket 120 is a zero insertion force (ZIF) connector. However, in other embodiments, socket 120 may be implemented using other types of sockets (e.g., PGA). According to one embodiment, IC package 130 is a land grid array (LGA), with an accompanying LGA socket 120. However, in other embodiments, IC 130 may function as a pin grid array (PGA) or other type of microprocessor or IC circuitry with the accompanying PGA socket 120.
Contacts 225 are mounted on solder balls 215 as a component of socket 120 to provide a connection between motherboard 110 and IC package 130. In one embodiment, contacts 225 are stamped metal contacts. Lands 230 are mounted on package 130 to provide an electrical contact at package 130 for transmitting and receiving electrical signals.
However as described above, traditional socketed IC packages utilize a uniform (fixed) pitch that is maintained throughout the pinfield. Increasing pin counts with IC packages have been offset with scaling a fixed pitch to lower levels. Nonetheless, the cost of reducing pitch is becoming a significant challenge with fine pitched (<1.27 mil) interconnects on large, low layer count printed circuit boards due to routing challenges.
Moreover, there are manufacturing and design constraints with a given socket technology that affect the pitch. Maintaining consistent row and/or column symmetry is desirable for manufacturing of stamped metal contact technologies. For stamped metal LGA contacts, a design constraint is introduced where the required contact deflection to mate with the IC package may limit the minimum pitch reduction in one direction “X” by a different amount than more than a perpendicular direction “Y”
According to one embodiment, motherboard 110, socket 120 and IC package 130 have a different pitches between various land pads, contacts and lands, respectively, to facilitate an optimal balance for increasing contact density with maintained socket manufacturability and accommodating lower cost motherboard 110 designs.
The mixed pitch between lands on an IC package increases contact density without requiring improved motherboard routing and socket manufacturing capabilities. The resulting increase in contact density allows for a smaller package, smaller socket, and a corresponding reduction in motherboard real estate, enabling for cost optimized components to be created without sacrificing performance.
Whereas many alterations and modifications of the present invention will no doubt become apparent to a person of ordinary skill in the art after having read the foregoing description, it is to be understood that any particular embodiment shown and described by way of illustration is in no way intended to be considered limiting. Therefore, references to details of various embodiments are not intended to limit the scope of the claims which in themselves recite only those features regarded as the invention.
