Patent Application
20230116097
The present disclosure relates to an interposer for a CPU socket of a printed circuit board assembly having multiple CPU sockets connected by a CPU interconnect.
In recent years, computer systems have seen a steady increase in the size of CPU sockets, the number of CPU cores, the CPU thermal design point, the number of Peripheral Component Interconnect Express (PCIe) lanes on each CPU socket, and the number of memory channels. These increases and other changes pose a challenge for designing a computer system that can accommodate greater connectivity and features. This challenge is even greater for dense server designs where memory, connectivity, processing and interconnect make it increasingly difficult to route all of the signals. Unfortunately, physical constraints may result in stranding lanes and a reduction in features and performance.
As one example, a computer system may have two CPU sockets and a total of x128 lanes available to be routed as either fixed CPU interconnect lanes or fixed PCIe lanes. However, if the computer system is designed with x64 lanes dedicated to the CPU interconnect, then there are only x64 lanes remaining available to support PCIe connections. In one situation, all x64 lanes might be used to connect a graphics processing unit (GPU), but then there are no remaining available lanes for a high-performance network card. In another situation, x16 lanes may be used to connect each of two high-performance network cards, but this leaves only x32 lanes for connecting a GPU. Regardless of the selected configuration of lanes laid out on the printed circuit board, there are challenges in finding an available location for all the necessary connections.
Some embodiments provide an interposer comprising a planar substrate having a bottom side and a top side. A pad array is formed on the bottom side of the planar substrate, wherein the pad array is configured to connect with a pin array within a first CPU socket. A first serial computer expansion bus connector is formed on the top side of the planar substrate and is electronically coupled to a first portion of the pad array, and a second serial computer expansion bus connector is formed on the top side of the planar substrate and is electronically coupled to a second portion of the pad array. The interposer further comprises a perimeter structure secured to the planar substrate and adapted for securing to a CPU carrier.
Some embodiments provide a kit comprising the disclosed interposer and a heatsink securable to the first CPU socket, wherein the heatsink includes a bottom surface having a contact area for contacting the interposer, wherein the contact area applies a load to the interposer and conducts heat away from the interposer.
Some embodiments provide an apparatus comprising a printed circuit board assembly that includes a first CPU socket and a second CPU socket, wherein the first and second CPU sockets are connected by a CPU interconnect. The disclosed interposer is installed in the first CPU socket, and a CPU is installed in the second CPU socket. A first serial computer expansion bus cable has a first cable connector coupled to the first serial computer expansion bus connector on the interposer, and a second serial computer expansion bus cable has a second cable connector coupled to the second serial computer expansion bus connector on the interposer.
Some embodiments provide an interposer comprising a planar substrate having a bottom side and a top side. A pad array is formed on the bottom side of the planar substrate, wherein the pad array is configured to connect with a pin array within a first CPU socket. A first serial computer expansion bus connector is formed on the top side of the planar substrate and is electronically coupled to a first portion of the pad array, and a second serial computer expansion bus connector is formed on the top side of the planar substrate and is electronically coupled to a second portion of the pad array. The interposer further comprises a perimeter structure secured to the planar substrate and adapted for securing to a CPU carrier.
The planar substrate may be a printed circuit board, which may be made using materials, techniques and conditions known for making printed circuit boards for use in other computer and electronic components and devices. For example, the planar substrate may include a dielectric or electrically insulating material, such as a thermoset resin, that also provides mechanical support for electrical conductors and electronic components. Furthermore, the planar substrate may have a laminate structure with conductive traces and conductive layers formed between layers of the dielectric or electrically insulating material. The planar substrate may further include plated through-holes and other structures extending through one or more of the laminate layers in order to establish a desired circuit and/or electrical connection.
Embodiments of the interposer may route a plurality of individual conductors through the planar substrate. Specifically, an individual conductor may connect an individual pad of the pad array formed on the bottom side of the planar substrate to an individual pin, pad or other conductor of the first or second serial computer expansion bus connectors that are formed on the top side of the planar substrate. Other components may be formed on or in the planar substrate or secured to the planar substate.
Some embodiments of the interposer may include a first retimer electronically coupled between the first portion of the pad array and the first serial computer expansion bus connector, and a second retimer electronically coupled between the second portion of the pad array and the second serial computer expansion bus connector. The retimers may be necessary or helpful to reduces errors in the communication caused by the interconnect, printed circuit board and cabling changes, and signal reflections. Each retimer may be in the form of an integrated circuit chip secured to the planar substrate. Each retimer may receive incoming signals from the serial computer expansion bus, either via the pad array or the serial computer expansion bus connector, and re-generates output signals. Accordingly, each retimer may divide a communication link between two endpoints into completely independent physical segments on each side of the retimer so that any discontinuities in the signals are not cumulative. The serial computer expansion bus may be designed and controlled in accordance with the Peripheral Component Interconnect Express (PCIe) standard or protocol, or other serial computer expansion bus standard or protocol.
In some embodiments, the first and second retimers may be disposed on the top side of the planar substrate. Optionally, the first and second retimers may be placed in a location between the first and second serial computer expansion bus connectors in order to be co-located for thermal communication with a heatsink and/or to avoid physically interfering with routing of a serial computer expansion bus cable.
Some embodiments of the interposer may be characterized by having a form factor allowing for substitution of the interposer for a CPU adapted for use in the first CPU socket. In other words, the form factor of the interposer and a CPU are sufficiently similar that either of the interposer or the CPU may be installed in the particular CPU socket at any particular time. Accordingly, a CPU may be removed and replaced with the interposer and/or the interposer may be removed and replaced with the CPU. For example, a carrier frame may be secured to either the CPU or the interposer prior to installation in the CPU socket. In this manner, the interposer provides a configuration option that was not previously available. A printed circuit board assembly having first and second CPU sockets may receive first and second CPUs and be operated as a dual CPU computing system. Alternatively, that same printed circuit board having the same first and second CPU sockets may receive the interposer in the first CPU socket and a PCU in the second CPU socket, such that interposer provides at least one serial computer expansion bus connection to at least one expansion card. In this later alternative, the CPU installed in the second CPU socket may communicate with the at least one expansion card via the CPU interconnect, the interposer and at least one serial computer expansion bus cable. Nonlimiting examples of the expansion card include a graphics processing unit (GPU), network adapter, non-volatile memory, and the like.
In some embodiments, the interposer has a perimeter structure that includes a lid. Accordingly, the lid may have a substantially role in the form factor of the interposer. For example, the perimeter dimensions, shape, features and/or contours of the lid may or may not provide the interposer with a sufficiently similar form factor as a CPU to be interchangeable with a CPU carrier and/or the CPU socket itself. In one option, the lid of the interposer may facilitate the interposer being secureable to a CPU carrier in the same manner as a CPU is securable to the CPU carrier.
Some embodiments provide a kit comprising the disclosed interposer and a heatsink securable to the first CPU socket, wherein the heatsink includes a bottom surface having a contact area for contacting the interposer, wherein the contact area applies a load to the interposer and conducts heat away from the interposer. The amount of load (force) applied to the interposer may be important to establish a reliable connection between the individual pads of the pad array and the individual pins or other conductors of the pin array of the CPU socket. Preferably, the total amount of load (force) applied to the interposer from all sources, such as the load frame and the heatsink, is the same amount of load (force) applied to a CPU for use in the same or similar CPU socket. However, if fewer than all of the individual pads of the pad array are to be used to form connections to the first and second serial computer expansion bus connectors, then a reduced total load may be applied so that the amount of load per pad remains about the same. For embodiments where the bottom of the heatsink does not make uniform contact with the top surface of the interposer, such as the lid, the heatsink may include stiffening ribs disposed on the top surface and may extend along opposing sides of the top surface so that the heatsink load is more evenly applied across the top of the interposer.
In some embodiments, the kit may provide some or all of the components necessary to recover CPU interconnect lanes for use as one or more serial computer expansion bus connections with expansion cards or components, such as a GPU, network adapter and/or nonvolatile memory. However, a kit may include some of the necessary components, while other necessary component may be independently obtained by a system user, designer, installer or manufacturer. For example, the serial computer expansion bus cables may be a standard item available through other channels, such that the kits may include the interposer and the heatsink that accommodate the use of standard serial computer expansion bus cables with the interposer.
In some embodiments of the kit, the interposer may include any of the interposer embodiments described herein. For example, the kit may include an interposer that includes a first retimer and a second retimer, where the first retimer is electronically coupled between the first portion of the pad array and the first serial computer expansion bus connector, and the second retimer is electronically coupled between the second portion of the pad array and the second serial computer expansion bus connector. Furthermore, the first and second retimers may be disposed on the top side of the planar substrate and may be located between the first and second serial computer expansion bus connectors, and wherein the heatsink includes a set of heatsink fins disposed on a top surface of the heatsink for alignment with the first and second retimers.
Some embodiments of the kit may further include at least one serial computer expansion bus cable having a cable connector for connecting to a serial computer expansion bus connector on the interposer. In some embodiments, the kit may include a first serial computer expansion bus cable having a first cable connector for connecting to the first serial computer expansion bus connector on the interposer and a second serial computer expansion bus cable having a second cable connector for connecting to the second serial computer expansion bus connector on the interposer. Accordingly, the heatsink may include a first passage for the first serial computer expansion bus cable to extend away from the first serial computer expansion bus connector on the interposer and a second passage for the second serial computer expansion bus cable to extend away from the second serial computer expansion bus connector on the interposer. In one option, the first passage extends laterally along the bottom surface of the heatsink to a first edge of the heatsink and the second passage extends laterally along the bottom surface of the heatsink to a second edge of the heatsink that is opposite of the first edge. Accordingly, with this option, the first and second cable connectors on the ends of the serial computer expansion bus cables may be 90-degree connectors having a low profile. In another option, the first passage extends though the heatsink from the bottom surface to the top surface of the heatsink for alignment with the first serial computer expansion bus connector on the interposer and the second passage extends through the heatsink from the bottom surface to the top surface of the heatsink for alignment with the second serial computer expansion bus connector on the interposer. Accordingly, with this latter option, the first and second cable connectors on the ends of the serial computer expansion bus cables may be 180-degree connectors.
Some embodiments provide an apparatus comprising a printed circuit board assembly that includes a first CPU socket and a second CPU socket, wherein the first and second CPU sockets are connected by a CPU interconnect. The disclosed interposer is installed in the first CPU socket, and a CPU is installed in the second CPU socket. A first serial computer expansion bus cable has a first cable connector coupled to the first serial computer expansion bus connector on the interposer, and a second serial computer expansion bus cable has a second cable connector coupled to the second serial computer expansion bus connector on the interposer.
In some embodiments of the apparatus, the interposer that is installed in the first CPU socket may include any of the interposer embodiments described herein. In addition, some of the apparatus embodiments may include any of the kit embodiments or kit components embodiments described herein.
Some embodiments of the apparatus further include a heatsink secured to the first CPU socket, wherein the heatsink includes a bottom surface having a contact area in contact with the interposer. The contact area may apply a load to the interposer and conduct heat away from the interposer. The heatsink may further include at least one passage that enables at least one serial computer expansion bus cable to extend away from at least one serial computer expansion bus connector on the interposer. For example, the heatsink may include a first passage for the first serial computer expansion bus cable to extend away from the first serial computer expansion bus connector on the interposer and a second passage for the second serial computer expansion bus cable to extend away from the second serial computer expansion bus connector on the interposer.
Some embodiments of the apparatus may further include an expansion card or other component selected from a graphics processing unit, a network adapter and/or a nonvolatile memory device, wherein the selected component(s) is/are connected to the interposer via a serial computer expansion bus cable. A flexible cable may be used to connect to the expansion card or other component in various locations on the printed circuit board assembly and/or at various distances from the interposer.
Some embodiments of the interposer, kit and/or apparatus provide the technical benefit of providing additional flexibility in the configuration of a computing system that has at least two CPU sockets connected by a CPU interconnect. Specifically, a computing system, such as a server, may have a substantial number of serial communication lanes dedicated to a CPU interconnect between dual CPU sockets to support the operation of dual CPUs, yet the computing system may be configured with an interposer installed in one of the CPU sockets so that those dedicated lanes may be recovered or reused for serial computer expansion bus connections, such as PCIe connections, to other expansion cards or devices as needed. In some cases, workloads may have been optimized for execution by a graphics processing unit (GPU) and, as a result, may not require or utilize two CPUs. Especially with CPU cores increasing rapidly in recent years, the performance of a single CPU with multiple cores working with a GPU may be more than sufficient to provide the best application performance. Furthermore, using two CPUs may even have a negative impact of performance since balanced input/output (IO) may be required to offset non-uniform memory access (NUMA) performance issues. Designing a computing system to have balanced IO increases the cost of the system in addition to the second CPU and additional memory.
Embodiments may utilize a common dual CPU socket (2S) server design, but only populate one CPU and recover the signals of the CPU-to-CPU interconnect for serial computer expansion bus lanes, such as PCIe lanes, to be used for other purposes, such as for GPU connectivity. Some embodiments may therefore be used in a first non-accelerated configuration as a traditional 2S system with two CPUs, or may use the interposer to achieve an accelerated configuration (i.e., including a GPU) as a 1S system with one CPU. Accordingly, various embodiments may be beneficially used in artificial intelligence applications, such as in the formation of a neural network. The use of interconnected GPUs with a mesh topology for scale-out is applicable for use with artificial intelligence (AI) using neural networks as well as high-performance computing (HPC). Both HPC and AI applications take advantage of the high parallel nature of GPUs.
Embodiments may also utilize the interposer in a server design having two or more CPU sockets, such that one or more CPU socket may be occupied by an interposer and one or more CPU socket may be occupied by a CPU. For example, a system board having four CPU sockets might have 3 CPUs and 1 interposer, 2 CPUs and 2 interposers, or 1 CPU and 3 interposers. The particular configuration of CPUs and interposers among a set of available CPU sockets may be selected on the basis of the type of workload that is expected to be performed by the system.
Accordingly, a method may include installing an interposer in a CPU socket of a multi-socket server, wherein each socket is connected by a CPU interconnect. The method may further include connecting first and second serial computer expansion bus cables to the interposer, connecting a first expansion card, such as a graphic processing unit, to the first serial computer expansion bus cable, and connecting a second expansion card, such as a network adapter and/or a nonvolatile memory device, to the second serial computer expansion bus cable. Using this method, the signals for a CPU-to-CPU interconnect may be recovered for serial computer expansion bus lanes, such as PCIe lanes, to be used to connect various expansion cards or devices, such as a GPU.
A pair of serial computer expansion bus cables 22 each have a connector 24 that is aligned (see dashed lines illustrating alignment) to be connected to the first and second serial computer expansion bus connectors 42 on the top of the interposer 40. Note that the connectors 24 form a near 90-degree angle connector, such that the direction of connection between the connectors 24, 42 is substantially vertical (in the illustration) and the cables 22 extend from the connector 24 in a substantially horizontal direction. However, the cables 22 may be flexible such that they may be directed as necessary to an expansion card or other device for connection with the other end of the cable.
The heatsink assembly 60 has six (6) spring-loaded screws 61 aligned with six (6) threaded holes or other fastening elements on the socket 18. Furthermore, the sets of heat sink fins 62 are aligned with a central area of the interposer 40 between the connectors 42. Also note that the heatsink 60 has a pair of stiffening ribs 65 that extend upward and run along opposing sides of the heatsink 60 to help distribute the load of the spring-loaded fasteners 61 and the weight of the heatsink 60 evenly across the bottom of the heatsink and evenly across the top of the interposer 40. The heatsink 60 includes passages 64 that allow the heatsink 60 to be received over the top of the cables 22 and their connectors 24, to engage the interposer 40, and to be secured to the socket 18 with the screws 61 without interfering with or damaging the cables 22 or their connectors 24. The serial computer expansion bus cables 22 may extend from the subassembly 50 to an expansion card or other devices, such as one or more of a graphics processing unit (GPU), networking adapter, or non-volatile memory (NVMe) storage device.
The lid itself may have a perimeter edge 47 having a shape, dimensions and features that, along with the planar substrate 44, give the interposer 40 a sufficiently similar form factor to a CPU so that the interposer 40 is interchangeable with a CPU. For example, the perimeter edge 47 may be configured to be secured to the carrier frame in the same or similar manner as a CPU. Furthermore, the lid 46 has a top surface that is flat for both thermally engaging a heatsink and transferring load (force) from the heatsink to the bottom surface of the interposer 40.
As will be appreciated by one skilled in the art, embodiments may take the form of a system, method or computer program product. Accordingly, embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, embodiments may take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon.
Any combination of one or more computer readable storage medium(s) may be utilized. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: a portable computer diskette, a hard disk, a random-access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. Furthermore, any program instruction or code that is embodied on such computer readable storage media (including forms referred to as volatile memory) that is not a transitory signal are, for the avoidance of doubt, considered “non-transitory”.
Program code embodied on a computer readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing. Computer program code for carrying out various operations may be written in any combination of one or more programming languages, including an object-oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The program code may execute entirely on the user’s computer, partly on the user’s computer, as a stand-alone software package, partly on the user’s computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user’s computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
Embodiments may be described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general-purpose computer, special purpose computer, and/or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
These computer program instructions may also be stored on computer readable storage media is not a transitory signal, such that the program instructions can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, and such that the program instructions stored in the computer readable storage medium produce an article of manufacture.
The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of the claims. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components and/or groups, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The terms “preferably,” “preferred,” “prefer,” “optionally,” “may,” and similar terms are used to indicate that an item, condition or step being referred to is an optional (not required) feature of the embodiment.
The corresponding structures, materials, acts, and equivalents of all means or steps plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. Embodiments have been presented for purposes of illustration and description, but it is not intended to be exhaustive or limited to the embodiments in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art after reading this disclosure. The disclosed embodiments were chosen and described as non-limiting examples to enable others of ordinary skill in the art to understand these embodiments and other embodiments involving modifications suited to a particular implementation.
