JUNCTION FIELD EFFECT TRANSISTOR, INTEGRATED CIRCUIT FOR SWITCHING POWER SUPPLY, AND SWITCHING POWER SUPPLY

Information

  • Patent Application
  • 20070221963
  • Publication Number
    20070221963
  • Date Filed
    March 24, 2007
    17 years ago
  • Date Published
    September 27, 2007
    17 years ago
Abstract
A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIGS. 1A-1D schematically illustrate a first embodiment of a junction field effect transistor (JFET) according to the present invention.



FIGS. 2A-2D schematically illustrate a second embodiment of a JFET according to the present invention.



FIG. 3 is a circuit diagram of a switching power supply according to the present invention.



FIG. 4 illustrates voltage-ampere curves of a JFET 125 of FIGS. 1A-1D, an NMOSFET 127 of FIG. 3, and an NMOSFET 304 of FIG. 7.



FIG. 5 illustrates curves showing a switching characteristic of the NMOSFET used as the NMOSFET 127 and the NMOSFET 304.



FIG. 6 is a graphic showing a substrate bias effect of the NMOSFET used as the NMOSFET 127 and the NMOSFET 304.



FIG. 7 is a circuit diagram of a conventional switching power supply.



FIGS. 8A-8D schematically illustrate a JFET 302 of FIG. 7.


Claims
  • 1. A junction field effect transistor (JFET) comprising: a semiconductor substrate of a first conductivity type;a drain region of a second conductivity type in the semiconductor substrate;a drain electrode electrically connected to the drain region;a drift region of the second conductivity type in the semiconductor substrate;a plurality of source regions of the second conductivity type in the semiconductor substrate;a source electrode electrically connected to each of the source regions;a gate region of the first conductivity in the semiconductor substrate in contact with the drift region and the source regions; anda gate electrode electrically connected to the gate region,wherein the drift region is between the drain region and the source regions, andwherein the source electrodes provide at least a first source electrode and a second source electrode electrically isolated from the first source electrode.
  • 2. The JFET according to claim 1, wherein the source regions are formed circumferentially around the drift region.
  • 3. The JFET according to claim 2, wherein the source regions are equally spaced around the drift region.
  • 4. The JFET according to claim 2, wherein the gate region is selectively formed in a surface layer of the semiconductor substrate to provide a plurality of recessed regions that extend radially outwardly, and each of the source regions is in one of the recessed regions.
  • 5. The JFET according to claim 4, wherein each of the source regions occupies a portion of the respective recessed region or an entire region of the respective recessed region.
  • 6. The JFET according to claim 1, further comprising a semiconductor region of the first conductivity type formed on the drift region and in contact with the drift region.
  • 7. An integrated circuit (IC) for a switching power supply, comprising: a start-up circuit comprising:a JFET having a first source electrode and a second source electrode electrically isolated from the first source electrode;a MOSFET of a second conductivity type having a drain terminal, a gate terminal, and a source terminal; anda resistor,wherein the drain terminal of the MOSFET is connected to the first source electrode of the JFET,wherein the gate terminal of the MOSFET is connected to the second source electrode of the JFET through the resistor, and is adapted to be connected to a control circuit for outputting a control signal for controlling a switching element, andwherein the source terminal of the MOSFET is adapted to be connected to the control circuit and a capacitor.
  • 8. The IC according to claim 7, further including the control circuit, wherein the start-up circuit and the control circuit are integrated in a same semiconductor substrate.
  • 9. The IC according to claim 7, wherein the JFET comprises: a semiconductor substrate of a first conductivity type;a drain region of a second conductivity type in the semiconductor substrate;a drain electrode electrically connected to the drain region;a drift region of the second conductivity type in the semiconductor substrate;a plurality of source regions of the second conductivity type in the semiconductor substrate;a source electrode electrically connected to each of the source regions;a gate region of the first conductivity in the semiconductor substrate in contact with the drift region and the source regions; anda gate electrode electrically connected to the gate region,wherein the drift region is between the drain region and the source regions, andwherein the source electrodes provide at least the first source electrode and the second source electrode.
  • 10. The IC according to claim 9, wherein the source regions are formed circumferentially around the drift region.
  • 11. The IC according to claim 10, wherein the source regions are equally spaced around the drift region.
  • 12. The IC according to claim 10, wherein the gate region is selectively formed in a surface layer of the semiconductor substrate to provide a plurality of recessed regions that extend radially outwardly, and each of the source regions is in one of the recessed regions.
  • 13. The IC according to claim 12, wherein each of the source regions occupies a portion of the respective recessed region or an entire region of the respective recessed region.
  • 14. A switching power supply comprising: a control circuit for outputting a control signal for controlling a switching element;a capacitor;a start-up circuit comprising:a control circuit for outputting a control signal for controlling a switching element,wherein the start-up circuit comprises:a JFET having a first source electrode and a second source electrode electrically isolated from the first source electrode;a MOSFET of the second conductivity type having a drain terminal, a gate terminal, and a source terminal; anda resistor,wherein the drain terminal of the MOSFET is connected to the first source electrode of the JFET,wherein the gate terminal of the MOSFET is connected to the second source electrode of the JFET through the resistor, and is connected to the control circuit, andwherein the source terminal of the MOSFET is connected to the control circuit and to the capacitor.
  • 15. The switching power supply according to claim 14, wherein the JFET comprises: a semiconductor substrate of a first conductivity type;a drain region of a second conductivity type in the semiconductor substrate;a drain electrode electrically connected to the drain region;a drift region of the second conductivity type in the semiconductor substrate;a plurality of source regions of the second conductivity type in the semiconductor substrate;a source electrode electrically connected to each of the source regions;a gate region of the first conductivity in the semiconductor substrate in contact with the drift region and the source regions; anda gate electrode electrically connected to the gate region,wherein the drift region is between the drain region and the source regions, andwherein the source electrodes provide at least the first source electrode and the second source electrode.
  • 16. The switching power supply according to claim 15, wherein the source regions are formed circumferentially around the drift region.
  • 17. The switching power supply according to claim 16, wherein the source regions are equally spaced around the drift region.
  • 18. The switching power supply according to claim 18, wherein the gate region is selectively formed in a surface layer of the semiconductor substrate to provide a plurality of recessed regions that extend radially outwardly, and each of the source regions is in one of the recessed regions.
  • 19. The switching power supply according to claim 18, wherein each of the source regions occupies a portion of the respective recessed region or an entire region of the respective recessed region.
Priority Claims (1)
Number Date Country Kind
2006-082988 Mar 2006 JP national