Claims
- 1. A junction field effect transistor comprising:
- a. a substrate of semiconductor material of one conductivity type having a planar surface and constituting a first gate;
- b. a first and second planar regions adjacent said surface of opposite conductivity type to said one conductivity type and constituting a source region and a drain region;
- c. a third region of opposite conductivity type to said one conductivity connecting said first and second regions below said surface and constituting a channel region; and
- d. a wedged-shaped fourth region of said one conductivity type separating said first and second regions above said third region, and constituting a second gate.
- 2. A junction field effect transistor as in claim 1 wherein said fourth region comprises a V-shaped groove region.
- 3. A junction field effect transistor as in claim 2 wherein said V-shaped groove region contours a V-shaped cross sectional opening in said planar surface.
- 4. A junction field effect transistor as in claim 3 wherein said V-shaped opening has a width of approximately 0.33 mils and a depth of approximately 0.23 mils.
- 5. A junction field effect transistor as in claim 3 wherein said V-shaped groove region has a depth in the range of 1 to 5 microns from the surface of said V-shaped opening.
- 6. A junction field effect transistor as in claim 1 wherein fourth region has a width of approximately 0.33 mils and a depth of approximately 0.23 mils.
Parent Case Info
This is a divisional of application Ser. No. 347,681, filed Apr. 4, 1973, now U.S. Pat. No. 3,930,300.
US Referenced Citations (3)
Divisions (1)
|
Number |
Date |
Country |
Parent |
347681 |
Apr 1973 |
|