Patent Application
20230088061
The present disclosure relates, in general, to electronic devices, and more particularly, to bonder tools and methods for bonding semiconductor devices.
Prior semiconductor packages and methods for forming semiconductor packages are inadequate, for example resulting in excess cost, decreased reliability, relatively low performance, or package sizes that are too large. Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such approaches with the present disclosure and reference to the drawings.
The following discussion provides various examples of semiconductor devices and methods of manufacturing semiconductor devices. Such examples are non-limiting, and the scope of the appended claims should not be limited to the particular examples disclosed. In the following discussion, the terms “example” and “e.g.” are non-limiting.
The figures illustrate the general manner of construction, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the present disclosure. In addition, elements in the drawing figures are not necessarily drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of the examples discussed in the present disclosure. The same reference numerals in different figures denote the same elements.
The term “or” means any one or more of the items in the list joined by “or”. As an example, “x or y” means any element of the three-element set {(x), (y), (x, y)}. As another example, “x, y, or z” means any element of the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.
The terms “comprises,” “comprising,” “includes,” “including,” are “open ended” terms and specify the presence of stated features, but do not preclude the presence or addition of one or more other features. The terms “first,” “second,” etc. may be used herein to describe various elements, and these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Thus, for example, a first element discussed in this disclosure could be termed a second element without departing from the teachings of the present disclosure.
Unless specified otherwise, the term “coupled” may be used to describe two elements directly contacting each other or describe two elements indirectly connected by one or more other elements. For example, if element A is coupled to element B, then element A can be directly contacting element B or indirectly connected to element B by an intervening element C. Similarly, the terms “over” or “on” may be used to describe two elements directly contacting each other or describe two elements indirectly connected by one or more other elements.
In one example, a method to manufacture a semiconductor device comprises providing an electronic component over a substrate, wherein an interconnect of the electronic component contacts a conductive structure of the substrate, providing the substrate over a laser assisted bonding (LAB) tool, wherein the LAB tool comprises a stage block with a window, and heating the interconnect with a laser beam through the window until the interconnect is bonded with the conductive structure.
In another example, a method to manufacture a semiconductor device comprises providing an electronic component over a first substrate side of a substrate, wherein an interconnect of the electronic component contacts a conductive structure of the substrate, providing the substrate in a hybrid bonder tool comprising a laser assisted boding (LAB) tool and a thermal/compression boding (TCB) tool, applying a first heat to the interconnect with a laser beam from the LAB tool through a second substrate side opposite the first substrate side, and applying a second heat or compression to the interconnect with the TCB tool through the electronic component.
In a further example, a system comprises a laser assisted bonding (LAB) tool comprises a laser source, a stage block with a window over the laser source, wherein the laser source is configured to emit a laser beam through the window to apply a first heat on an interconnect of a workpiece supported by the stage block.
In one example, a system can comprise a laser assisted bonding (LAB) tool comprising a stage block and a laser source facing the stage block. The stage block can be configured to support a first substrate and a first electronic component coupled with the first substrate, the first electronic component comprising a first interconnect. The laser source can be configured to emit a first laser towards the stage block to induce a first heat on the first interconnect to bond the first interconnect with the first substrate.
In one example, a semiconductor device can comprise a substrate comprising a substrate top side and a substrate bottom side, and a first electronic component comprising a first interconnect bonded to the substrate top side by a first laser beam emitted towards the substrate bottom side.
In one example, a system comprises a laser assisted bonding (LAB) tool. The LAB tool comprises a stage block and a first lateral laser source facing the stage block from a lateral side of the stage block. The stage block is configured to support a substrate and a first electronic component coupled with the substrate, and the first electronic component comprises a first interconnect. The first lateral laser source is configured to emit a first lateral laser beam laterally toward the stage block to induce a first heat on the first interconnect to bond the first interconnect with the substrate. Other examples and related methods are also disclosed herein.
In another example, a system comprises a laser assisted bonding (LAB) tool comprising a stage block, a first lateral laser source facing the stage block from a lateral direction, and a first vertical laser source facing the stage block from a vertical direction. The stage block is configured to support a substrate and a first electronic component coupled with the substrate, the first electronic component comprising a first interconnect and a second interconnect, the first lateral laser source is configured to emit a first lateral laser beam laterally toward the stage block to induce a first heat on the first interconnect to bond the first interconnect with the substrate, and the first vertical laser source is configured to emit a first vertical laser beam vertically toward the stage block to induce a second heat on the second interconnect to bond the second interconnect.
In a further example, a method for Laser Assisted Bonding (LAB) comprises applying a first heat with a vertical laser source towards a substrate supported by a stage block. The first heat bonds interconnects to the substrate, and the first heat is greater for interconnects at an inner portion of the substrate than for the interconnects at an outer portion of the substrate. The method also comprises applying a second heat with a lateral laser source to the substrate. The second heat bonds the interconnects to the substrate, and the second heat is greater for interconnects at the outer portion of the substrate than for the interconnects at the inner portion of the substrate.
Other examples are included in the present disclosure. Such examples may be found in the figures, in the claims, or in the description of the present disclosure.
In some examples, substrate 11 can be a pre-formed substrate. The pre-formed substrate can be manufactured prior to attachment to an electronic device and can comprise dielectric layers between respective conductive layers. The conductive layers can comprise copper and can be formed using an electroplating process. The dielectric layers can be relatively thicker non-photo-definable layers that can be attached as a pre-formed film rather than as a liquid and can include a resin with fillers such as strands, weaves, or other inorganic particles for rigidity or structural support. Since the dielectric layers are non-photo-definable, features such as vias or openings can be formed by using a drill or laser. In some examples, the dielectric layers can comprise a prepreg material or Ajinomoto Buildup Film (ABF). The pre-formed substrate can include a permanent core structure or carrier such as a dielectric material comprising bismaleimide triazine (BT) or FR4, and dielectric and conductive layers can be formed on the permanent core structure. In other examples, the pre-formed substrate can be a coreless substrate and omits the permanent core structure, and the dielectric and conductive layers can be formed on a sacrificial carrier and is removed after formation of the dielectric and conductive layers and before attachment to the electronic device. The pre-formed substrate can referred to as a printed circuit board (PCB) or a laminate substrate. Such pre-formed substrate can be formed through a semi-additive or modified-semi-additive process.
In some examples, substrate 11 can be a re-distribution layer (“RDL”) substrate. In some examples, RDL substrates can comprise one or more conductive redistribution layers and one or more dielectric layers that can be formed layer by layer over an electronic device to which the RDL substrate is to be electrically coupled. In some examples, RDL substrates can comprise one or more conductive redistribution layers and one or more dielectric layers that can be formed layer by layer over a carrier that can be entirely removed or at least partially removed after the electronic device and the RDL substrate are coupled together. In some examples, window 153 shown in
It should be noted that various semiconductor devices 10, 20, or 30 described herein are for the understanding of the present disclosure and that various other semiconductor devices can be used in the present disclosure. The present disclosure can be applied to other semiconductor devices where the electronic component is connected to the substrate via the interconnect.
Laser source 151 can irradiate laser beams 151A through window 153 as shown in
LAB tool 15 can comprise laser source 151, stage block 152, and window 153. LAB tool 15 can be similar to LAB tool 15 shown in
Substrate 11 comprises conductive structure 112 having one or more conductive layers or patterns, and dielectric structure 111 having one or more dielectric layers interlaced with conductive structure 112. In some examples, substrate 11 can have a thickness in the range from about 10 micrometers (μm) to about 2,000 μm. Electronic components 12 or 13 can comprise or be referred to as semiconductor dies, semiconductor chips, or semiconductor packages. In some examples, such semiconductor packages can comprise one or more semiconductor dies or chips coupled to a substrate and encapsulated, with interconnects 121 or 131 exposed. In some examples, interconnect 121 or 131 of electronic components 12 or 13 can be placed in a flip chip type configuration on terminals, such as pads or UBMs (Under-Bump Metallizations), of conductive structure 112 of substrate 11.
In some examples, electronic components 12 or 13 can comprise an application specific integrated circuit, a logic die, a micro control unit, a memory, a digital signal processor, a network processor, a power management unit, an audio processor, a radio-frequency (RF) circuit, or a wireless baseband system on chip processor. In some examples, electronic components 12 or 13 can comprise an active component or a passive component. Electronic components 12 or 13 can have a thickness in the range from about 10 μm to about 1,000 μm.
Interconnects 121 or 131 can electrically connect electronic components 12 or 13 to conductive structure 112 of substrate 11, respectively. Interconnects 121 or 131 can comprise conductive balls or bumps, such as solder balls or bumps, conductive pillars or posts such as copper pillars or posts with solder tips, or metal-core solder balls or bumps having a core comprising, for example, copper or aluminum surrounded by a solder shell. Interconnects 121 or 131 can have diameter in the range from about 10 μm to about 1,000 μm. In some examples, interconnects 121 or 131 can first be formed on or attached to electronic components 12 or 13, and then interconnects 121 or 131 can be placed on substrate 11.
In the example shown in
In the example shown in
In the example shown in
Window 153 can be made of a material capable of permitting passage of laser beams. In some examples, window 153 can be made of quartz or glass. In some examples, window 153 can be a void or a passageway defined by the inner sidewalls of stage block 152. In some examples, window 153 can comprise a material exhibiting any amount of light transmissivity to allow light at the desired wavelength to pass through, for example at or near the wavelength of laser beams 151A. In some examples, the transmittance of window 153 for laser beams can be about 90% or greater to facilitate the LAB process. In some examples, the transmittance of window 153 can be less than 90%. In some examples, window 153 can comprise a grating or other structure to allow at least some amount of light to pass through. In some examples, window 153 can have a thickness in the range from about 1 mm to about 300 mm. In some examples, stage block 152 can support a workpiece worked on by LAB tool 15. The workpiece an comprise, for example, substrate 11, or electronic component 12 or 13 over substrate 11 including interconnects 121 or 131.
In the example shown in
In some examples, laser beams 151A can have energy in the range from about 0.1 kilowatts (kW) to about 16 kW to properly heat or melt interconnects 121 or 131 and to avoid undue heating or damage of dielectric structure 111 or conductive structure 112 of substrate 11. In some examples, laser source 151 can output one or more of laser beams 151A with energy up to approximately 0.1 kW to about 100 kW, whether aimed at specific areas of stage block 152 or substrate 11, or evenly distributed across. In some examples, laser beams 151A can have wavelengths from about 600 μm to about 2,000 μm to properly heat or melt interconnects 121 or 131 and to avoid undue heating or damage of dielectric structure 111 or conductive structure 112 of substrate 11. In some examples, laser beams 151A can be irradiated for a time in the range from about 100 milliseconds (ms) to about 30,000 ms to properly heat or melt interconnects 121 or 131 and to avoid undue heating or damage of dielectric structure 111 or conductive structure 112 of substrate 11. For instance, laser beams 151A can be irradiated for about 2000 ms or less, or about 1000 ms or less, to properly heat and bond interconnects 121 or 131 with substrate 11. In some examples, the temperature of substrate 11 can be maintained at a temperature lower than a temperature of interconnect 121 or 131 when heat is applied to interconnect 121 of 131 from laser beam 151A. In some examples, the temperature of electronic component 12 or 13 can be maintained lower than a temperature of interconnect 121 or 131 when heat is applied to interconnect 121 or 131 from laser beam 151A. In further examples, a temperature of a mold compound or a molded package adjacent to electronic component 12 or 13 can be maintained lower than a temperature of interconnect 121 or 131 when heat is applied to interconnect 121 or 131 from laser beam 151A.
In some examples, when laser beams 151A are irradiated, substrate 11 can be at a temperature in the range from about 30 degrees Celsius (° C.) to about 300° C. to properly heat or melt interconnects 121 or 131 and to avoid undue heating or damage of dielectric structure 111 or conductive structure 112 of substrate 11. For instance, heat caused by laser beams 151A on substrate 11 or interconnects 121,131 can be in the range from about 150° C. to about 350° C., such as from about 230° C. to about 280° C. In some examples, when laser beams are irradiated, window 153 can be at a temperature in the range from about 30° C. to about 300° C. In some examples, the temperature of window 153 can be maintained at a range from about 25° C. to about 150° C., such as from about 70° C. to about 130° C., lower than a melting temperature of interconnects 121 or 131.
Electronic component 14 can comprise a passive component or passive devices. Electronic component 14 can be temporarily connected to conductive structures 112 of substrate 11 through interconnects 141. In some examples, electronic component 14 can comprise at least one of a resistor, a capacitor, an inductor, or a connector. Electronic component 14 can have a thickness in the range from about 0.1 mm to about 3 mm.
In the example shown in
In the example shown in
In some examples, electronic component 12 or 13 could be prone to warpage during laser bonding using LAB tool 15 and the process of
In the example shown in
TCB tool 35 can be positioned above LAB tool 15. In some examples, plate 351 can be initially positioned spaced apart from electronic component 12,13 and can then be lowered after semiconductor device 30 is placed on window 153. Plate 351 can be brought into contact with a top of electronic component 12,13 to maintain pressure on electronic component 12,13 against substrate 11. Plate 351 can apply pressure on electronic component 12,13 with a pressure as low as about 0.1 Newton (N), such as in the range from about 1 N to about 500 N. In some examples, plate 351 can have a thickness in the range from about 1 mm to about 5 mm.
In some examples, plate 351 can vacuum-latch electronic component 12,13 while simultaneously compressing electronic component 12,13. In some examples, vacuum latching can be achieved by coupling plate 351 to a vacuum generator that creates vacuum suction through openings at the bottom side of plate 351 and exposing the top side of electronic component 12 or 13 to such vacuum openings of plate 351. When the heat is transferred to electronic component 12 or 13, plate 351 can remain latched to electronic component 12 or 13 while compressing electronic component 12 or 13 from above to prevent electronic component 12 or 13 from being warped.
Plate 351 can be coupled with heater source 352 for heating thermal/compression plate 351, and such heat can be transferred to electronic component 12 or 13 when plate 351 is brought into contact with electronic component 12 or 13. In some examples, heater source 352 can be maintained at a preset temperature in the range from about 10° C. to about 450° C.
In some examples, TCB tool 35 can be configured to vibrate plate 351 or induce vibration of electronic component 12 or 13 against substrate 11, where such vibration can induce heat due to friction on interconnects 121 or 131. In some examples such vibration-induced heat on interconnects 121 or 131 can cause or aid in the bonding of interconnects 121 or 131 with substrate 11.
The heat transferred from plate 351 to electronic component 12 or 13 can prevent warpage that could otherwise occur due to a mismatch between the temperature of the top and bottom sides of electronic component 12 or 13. For instance, when only LAB tool 15 is used, laser beams 151A can cause the bottom side of electronic component 12 or 13 to be heated more, and to thus expand more, than the top side of electronic component 12 or 13 wherein such difference can induce warpage. By applying compensatory heat with plate 351 to the top side of electronic component 12 or 13, such warpage tendency can be controlled. In some examples, a temperature of substrate 11 can be maintained lower than a temperature of interconnect 121 or 131 when heat is applied to interconnect 121 or 131 from LAB tool 15. In some examples, a temperature of electronic component 12 or 13 with TCB tool 35 can be maintained lower than a temperature of interconnect 121 or 131 when heat is applied to interconnect 121 or 131 from LAB tool 15.
As previously described with respect to stage block 152, in some examples stage block 152a can comprise a transparent material, such as glass or quartz, that permits laser beams 151A to pass through stage block 152a. As also previously described, in some examples the transmittance through stage block 152a can be about 90% or greater for laser beams 151a to facilitate the LAB bonding process.
As shown, laser beams 151A are irradiated from laser source 151 towards stage block 152a, and such laser beams 151A can pass through stage block 152a, such as through window 153 portion of stage block 152a, to reach substrate 11 of semiconductor device 10, 20, 30. Laser beams 151A can transfer or induce heat to interconnects, 121, 131, 141. In some examples, laser beams 151A can reach substrate 11 though stage block 152a, can then pass through substrate 11, and can then reach interconnects, 121, 131, 141 and heat them through heat irradiation. In some examples, interconnects 121, 131, 141 can be positioned at a focal length ora focal distance, within a depth of field (DOF) range of laser beams 151A, and such focusing of laser beams 151A on interconnects 121, 131, 141 can permit greater heating of interconnects 121, 131, 141 than of substrate 11 or electronic components 12, 13, 14. In some examples, laser beams 151A can reach substrate 11 through stage block 152a, can then induce heat on one or more areas of substrate 11, and such heated substrate areas can heat interconnects 121, 131, 141 through heat conduction.
Interconnects 121, 131, 141 of can be heated until bonded with conductive structure 112 of substrate 11. Heat and time parameters can be properly controlled to minimize bonding time for fast throughput while avoiding exposure to higher temperatures to minimize undue thermal expansion or warpage of substrate 11. In some examples, laser beams 151A can be irradiated for about 2000 ms or less, or about 1000 ms or less, to cause proper heating and bonding of interconnects 121,131,141 with substrate 11. In some examples, heat caused by laser beams 151A on interconnects 121, 131, 141 or on substrate 11 can be controlled to remain under about 300° C. or 350° C., such as in the range from about 150° C. to about 350° C., or from about 230° C. to about 280° C.
As previously described, with respect to stage block 152, in some examples stage block 152b can comprise an opaque material, such as ceramic, that obstructs or blocks laser beams 151A from passing through stage block 152b. In some examples, he opaque material of stage block 152b can comprise a metal material. As also previously described, in some examples the transmittance through stage block 152 can be less than 90%, such as 0%, for laser beams 151A.
As shown, laser beams 151A are irradiated from laser source 151 towards stage block 152b, such as towards window 153 portion of stage block 152b. Such laser beams 151A are substantially blocked by stage block 152b, but they can heat stage block 152b, such as by heat irradiation. In turn, such heat in heated stage block 152b, represented by the wavy upward arrows, can be transferred to heat interconnects, 121, 131, 141. In some examples, the heat from stage block 152b reaches and extends through substrate 11 to heat interconnects 121, 131, 141 by heat conduction.
Interconnects 121, 131, 141 of can be heated until bonded with conductive structure 112 of substrate 11. Heat and time parameters can be properly controlled to reduce bonding time while avoiding exposure to higher temperatures to minimize undue thermal expansion or warpage of substrate 11. In some examples, laser beams 151A can be irradiated for about 10000 ms to about 30000 ms, or even longer term to about 10 minutes, to cause proper heating and bonding of interconnects 121,131,141 with substrate 11. In some examples, heat caused by laser beams 151A on interconnects 121, 131, 141 or on substrate 11 can be controlled to remain under about 300° C. or 350° C., such as in the range from about 150° C. to about 350° C., or from about 230° C. to about 280° C.
In some examples stage block 152c can comprise a combination of transparent and opaque materials. For example, stage block 152c can comprise a stack of transparent material portion 152x and opaque material portion 152y. Features or materials, or characteristics of transparent portion 152x can be similar to those described with respect to stage block 152a. Features or materials, or characteristics of opaque portion 152y can be similar to those described with respect to stage block 152b.
As shown, laser beams 151A are irradiated from laser source 151 towards stage block 152c, and such laser beams 151A can pass through transparent material portion 152x of stage block 152c to reach opaque material portion 152y. Laser beams 151A are substantially blocked from passing through by opaque material portion 152y, but they can heat opaque material portion 152y or transparent material portion 152x by, for example, heat irradiation, such that the top of stage block 152c is heated. In turn such heat, represented by the wavy upward arrows, can be transferred to heat interconnects 121, 131, 141. In some examples, the heat from stage block 152c is transferred by heat conduction to extend through substrate 11 and to heat interconnects 121, 131, 141. Interconnects 121, 131, 141 of can be heated until bonded with conductive structure 112 of substrate 11. In some examples, because laser beams 151A are obstructed by opaque material portion 152y from reaching substrate 11, heating of substrate 11 or interconnects 121, 131, 141 through heat conduction can be controlled to remain lower than if laser beams 151A reached and heated substrate 11 through heat irradiation. Such heat control can be used to prevent or restrict undue thermal expansion or warpage of substrate 11.
There can be examples where a thickness of transparent portion 152x can be greater than the thickness of opaque portion 152y. For instance, transparent portion 152x can range in thickness from about 1 mm to about 300 mm, and opaque portion 152y can range in thickness from about 100 μm to about 100 mm. In some examples, opaque portion 152y can comprise one or more plating layers that covers transparent portion 152x.
Interconnects 121, 131, 141 of can be heated until bonded with conductive structure 112 of substrate 11. Heat and time parameters can be properly controlled to reduce bonding time while avoiding exposure to higher temperatures to minimize undue thermal expansion or warpage of substrate 11. In some examples, laser beams 151A can be irradiated for about 5000 ms to about 20000 ms, to cause proper heating and bonding of interconnects 121,131,141 with substrate 11. In some examples, heat caused by laser beams 151A on interconnects 121, 131, 141 or on substrate 11 can be controlled to remain under about 300° C. or 350° C., such as in the range from about 150° C. to about 350° C., or from about 230° C. to about 280° C.
Stage block 152d can be an implementation of stage block 152 described with respect to
Opaque portion 152z comprises a grating or pattern of openings through the opaque material that selectively permit laser beams 151A aligned with such openings to pass through stage block 152d. In some examples, such openings can be vertically aligned with interconnects 121, 131, 141 or with semiconductor devices 10, 20, 30 over substrate 11. In some examples, the opaque material is configured to be vertically aligned with portions of the first substrate that are misaligned with interconnects 121, 131, 141 or with semiconductor devices 10, 20, 30.
Such aligned laser beams 151A will cause heating and bonding of interconnects 121, 131, 141, as described with respect to the laser beams 151A that pass through stage block 152a in
As shown, laser beams 151A are irradiated from laser source 151 towards stage block 152d, and such laser beams 151A can pass through transparent material portion 152x of stage block 152d. Laser beams 151A aligned with the openings defined by the grating of opaque portion 152z can pass through stage block 152d to reach substrate 11 and cause heating of interconnects 121, 131, 141 for bonding. Laser beams 151A misaligned with the openings of the grating of opaque portion 152z will be substantially blocked from passing through stage block 152d. Interconnects 121, 131, 141 can be heated until bonded with conductive structure 112 of substrate 11.
The grating of opaque portion 152z can be configured such that areas of substrate 11 that need to be exposed for heating of interconnects 121, 131, 141 by laser beams 151A through stage block 152d are aligned with the pattern of openings. Other areas of substrate 11 that need not be exposed for bonding can be aligned with the opaque material of opaque portion 152z, or misaligned with the pattern of openings, to be blocked or shielded from laser beams 151A. Such features can limit unnecessary heat exposure of shielded areas of substrate 11 to restrict undue thermal expansion or warpage.
In some examples, the grating of opaque portion 152z can be configured such that the pattern of openings exposes portions of substrate 11 where semiconductor devices 10, 20, 30 are located, while other portions of substrate 11 outside the periphery of semiconductor devices 10, 20, 30 remain shielded by the material of opaque portion 152z.
In some examples, the grating of opaque portion 152z can be configured such that the pattern of openings exposes portions of substrate 11 where interconnects 121, 131, 141 are located, while other portions of substrate 11 outside the periphery of interconnects 121, 131, 141 remain shielded by the material of opaque portion 152z. For instance, as seen with respect to semiconductor device 20, the grating is configured such that opaque portion 152z (a) exposes portions of substrate 11 under semiconductor devices 12,13 within the periphery of interconnects 121,131, and (b) shields portions of substrate 11 under semiconductor devices 12,13 outside the periphery of interconnects 121,131.
There can be examples where a thickness of transparent portion 152x can be greater than the thickness of opaque portion 152z. For instance, transparent portion 152x can range in thickness from about 1 mm to about 300 mm, and opaque portion 152z can range in thickness from about 100 μm to about 100 mm. In some examples, opaque portion 152z can comprise one or more patterned plating layers that cover transparent portion 152x.
Interconnects 121, 131, 141 of can be heated until bonded with conductive structure 112 of substrate 11. Heat and time parameters can be properly controlled to minimize bonding time for fast throughput while avoiding exposure to higher temperatures to minimize undue thermal expansion or warpage of substrate 11. In some examples, laser beams 151A can be irradiated for about 2000 ms or less, or about 1000 ms or less, to cause proper heating and bonding of interconnects 121,131,141 with substrate 11. In some examples, heat caused by laser beams 151A on interconnects 121, 131, 141 or on substrate 11 can be controlled to remain under about 300° C. or 350° C., such as in the range from about 150° C. to about 350° C., or from about 230° C. to about 280° C.
In some examples, LAB tool 15 can comprise laser source 151U that can be similar to laser source 151 but can be configured to emit laser beams 151B towards a top side of semiconductor devices 10, 20, 30 or a top side of stage block 152a. Laser beams 151B can be similar to laser beams 151A, and can induce heating of interconnects 121, 131, 141 from the top of their respective semiconductor devices 10, 20, 30 to assist in bonding interconnects 121,131,141 to substrate 11.
As shown for
In some implementations, laser source 151U can be used along with compression tool 65 during bonding. For instance, features, characteristics, or materials of plate 651 of compression tool 65 can be similar to those described with respect to stage block 152a, 152b, 152c, or 152d in terms of transmittance, such that laser beams 151B can induce, through compression tool 65, bonding of semiconductor device 30 with substrate 11.
For example, as shown in
As another example, as shown in
As another example, as shown in
As another example, as shown in
Semiconductor device 10′ is shown positioned on stage block 152, and can be similar to semiconductor device 10, 20, or 30 or variations. Semiconductor device 10′ can comprise electronic component 12 or 13 at a first side of substrate 11′, and can comprise interconnects 101′ or electronic component 13′ at a second side of substrate 11′. For instance, in some examples semiconductor device 10′ can lack electronic component 13′ at the second side of substrate 11′, or can lack electronic component 13 at the first side of substrate 11′ such that electronic component 12 is attached to stage block 152. In some examples interconnects 121, 131, 131′, or 141 can be concurrently bonded to respective sides of substrate 11′ by laser beams 751A or 751B of laser sources 751L or 751U. In some examples, interconnects 121 or 131 of electronic components 12 or 13 can be pre-bonded to the first side of substrate 11′, such by any of the first LAB bonding or hybrid bonding processes or tools described here, and then semiconductor device 10′ can be inverted and positioned on stage block 152 such that the second side of substrate 11′ faces towards laser source 751U of LAB tool 75 as shown in
LAB tool 75 can be similar to LAB tool 15, and can comprise laser source 751L aimed towards stage block 152. Stage block 152 can comprise any of one or more variations, including but not limited those described for stage block 152a, 152b, 152c, 152d with respect to
Laser emitters 755L can individually emit respective laser beams 751A, which can be similar to laser beams 151A. Laser emitters 755L and respective laser beams 751A can be individually aligned vertically with a portion of a target, such as a portion of stage block 152 or a portion of semiconductor devices 10, 10′, 20, 30. In some examples, laser beams 751A emitted by laser source 751L can leave respective laser emitters 755L and proceed towards their respective targets individually. In some examples, laser source 751L need not rely on a filter, collimator, or lens for grouping, aiming, or directing a group of laser beams 751A. Laser source 751L can comprise an area large enough to concurrently process many substrates such as RDL substrates, pre-formed substrates, or wafers. In some examples, the length and width of laser source 751L can be at least about 300 mm×300 mm. For instance, the length and width of laser source 751L can be at least about 600 mm×600 mm.
In some examples, an individual laser emitter 755L can comprise a laser diode, such as an indium phosphide (InP), gallium nitride (GaN), zinc selenide (ZnSe), aluminum gallium arsenide (AlGaAs), indium gallium nitride (InGaN), or zinc oxide (ZnO) diode. There can be examples where an individual laser emitter 755L can comprise more than one laser diode. In some examples, an individual laser emitter 755L can comprise a length or a width of about 100 μm to about 2 mm. In some examples, the target area for the individual laser emitter can comprise a length or a width of about 100 μm to about 2 mm. In some examples, an individual laser emitter 755L can emit a laser beam 751A with power of about 10 milliwatts to about 2 Watts. In some examples, an individual laser emitter 755L can emit a laser beam 751A with wavelength of about 600 μm to about 2,000 μm.
As seen in
In some examples or areas, LAB tool 75 can control laser source 751L such that laser emitters 755L that are vertically aligned within the peripheries of interconnects 121, 131, 141 emit respective laser beams 751A as high-power beams 751x to heat and bond interconnects 121, 131, 141 to substrate 11.
In some examples or areas, such as seen with respect to semiconductor device 20, LAB tool 75 can control laser source 751L such that laser emitters 755L that are vertically aligned within the peripheries of electronic components 12, 13, 14 emit respective laser beams 751A as high-power beams 751x to bond electronic components 12, 13, 14 to substrate 11.
In some examples, LAB tool 75 can control laser source 751L such that laser emitters 755L that are vertically aligned with areas outside the peripheries of interconnects 121, 131, 141 emit respective laser beams 751A as mid-power beams 751y or low-power beams 751z.
For instance in
For instance in
In some examples, such as seen with respect to semiconductor device 20, LAB tool 75 can control laser source 751L such that laser emitters 755L that are vertically aligned with areas between the peripheries of electronic components 12,13,14 emit respective laser beams 751A as low-power beams 751z.
In some examples, such as seen with respect to semiconductor device 30, LAB tool 75 can control laser source 751L such that laser emitters 755L that are vertically aligned with areas between the peripheries of electronic components 12,13 emit respective laser beams 751A as mid-power beams 751y.
In some examples or areas, LAB tool 75 can control laser source 751L such that laser emitters 755L that are vertically aligned with border regions between semiconductor devices 10, 10′, 20, 30 emit respective laser beams 751A as low-power beams 751z.
In some examples, LAB tool 75 can comprise laser source 751U located over stage block 152. In some examples, laser source 751U can be similar to laser source 151 or 151U. In some examples, laser source 751U can be similar to laser source 751L, and can comprise a laser emitter array of laser emitters 755U that can be similar to laser emitters 755L. There can be implementations where LAB tool 75 can comprise laser source 751U without laser source 751L, or can comprise laser source 751L without laser source 751U.
Laser emitters 755U can individually emit respective laser beams 751B, which can be similar to laser beams 751A. Laser emitters 755U and respective laser beams 751B can be individually aligned vertically with a portion of a target, such as a portion of stage block 152 or a portion of semiconductor devices 10, 10′, 20, 30. In some examples, laser beams 751B emitted by laser source 751U can leave respective laser emitters 755U and proceed towards their respective targets individually. In some examples, laser source 751U need not rely on a filter, collimator, or lens for grouping, aiming, or directing a group of laser beams 751B.
Upper laser emitters 755U of upper laser source 751U can be aimed towards the top side of stage block 152, and lower laser emitters 755L of lower laser source 751L can be aimed towards the bottom side of stage block 152. LAB tool 75 can control laser source 751U and laser source 751L to concurrently emit or adjust laser beams 751A or 751B during the bonding of substrate 11 with semiconductor devices 10, 10′, 20, 30 or with interconnects 121, 131, 101′, or 141.
As seen in
In some examples or areas, LAB tool 75 can control laser source 751U such that laser emitters 755U that are vertically aligned within the peripheries of interconnects 121, 131, 101′, 141 emit respective laser beams 751B as high-power beams 751x to heat and bond respective target interconnects 121, 131, 101′, 141 to substrate 11.
In some examples or areas, such as seen with respect to semiconductor device 20, LAB tool 75 can control laser source 751U such that laser emitters 755U that are vertically aligned within the peripheries of target electronic components 12, 14 emit respective laser beams 751B as high-power beams 751x to bond electronic components 12, 14 to substrate 11. In some cases, not all components of a device need be targeted. For example, as also seen with respect to semiconductor device 20, LAB tool 75 can control laser source 751U such that laser emitters 755U that are vertically aligned within the periphery of electronic component 13 emit respective laser beams 751B as low-power beam 751z, or mid-power beam 751y. Such adjustment can be done, for instance, when electronic component 13 comprises a material that could be sensitive to laser beams 751B, or a material that could block, reflect, or hinder passage of laser beams 751B. In some examples, such materials can comprise mold compound, or a metal such as for heat dissipation or for electro-magnetic interference (EMI) shielding.
In some examples, LAB tool 75 can control laser source 751U such that laser emitters 755U that are vertically aligned with areas outside the peripheries of interconnects 121, 131, 101′, 141 emit respective laser beams 751A as mid-power beams 751y or low-power beams 751z.
As shown in
Compression tool 65 can comprise or can be similar to TCB tool 35, where plate 651 that can be similar to plate 351 or can provide one or more of compression, heat, or vibration to semiconductor device 30 during bonding. In some examples, plate 651 of compression tool 65 can serve as a weight plate that provides compression on the top of semiconductor device 30, such as on top of semiconductor component 12 or 13, without also providing heat or vibration. In some examples, the inherent weight of plate 651 can provide the compression on the top of semiconductor device 30 without any additional force added to push plate 651 onto semiconductor device 30. The compression imparted by plate 651 at the top side of semiconductor device 30 can prevent or restrict undue warpage of semiconductor device 30, semiconductor component 12,13, or substrate 11 during bonding.
In some implementations, laser source 751U can be used along with compression tool 65 during bonding. Features, characteristics, or materials of plate 651 of compression tool 65 can be similar to those already described with respect to any of
As an example, similar to as described with respect to
As another example, similar to as described with respect to
As another example, similar to as described with respect to
As another example, similar to as described with respect to
In the present example, LAB tool 75 controls laser emitters 755 that are vertically aligned with electronic components 12,13,14 to emit laser beams (such as laser beams 751A or 751B from
In some examples, LAB tool 75 can comprise bonding monitor 75i that measures temperatures of multiple areas of semiconductor device 20 in real-time during bonding. Bonding monitor 75i can comprise, for instance, an optical infrared imager or monitor. Bonding monitor 75i can be configured to determine whether target temperatures are being achieved by the laser beams of laser emitter 755 for each of such multiple areas of semiconductor device 20. Such monitoring can be useful for confirming that proper temperatures for interconnect bonding are being achieved, and for guarding against temperatures that could cause undue heating, thermal expansion, warpage, or damage to substrate 11 or electronic components 12,13,14. If bonding monitor 75i determines that some target areas of semiconductor device 20 measure outside their target temperature range (“off-range”) during bonding, LAB tool 75 can react in real-time and selectively control individual laser emitters 755 aligned with such off-range areas to increase or decrease the power of the laser beams emitted towards such off-range areas to bring them within their target temperature range.
An example with steps 7C1-7C4 can illustrate such operation. As seen in
In step 7C1, as seen in zoomed portion 755Z, laser emitters 755 emit laser beams at initial or baseline power towards the area corresponding to electronic component 12, and as seen in zoomed portion 12Z, heat is correspondingly generated by such laser beams in electronic component 12.
In step 7C2, bonding monitor 75i, which monitors the temperature of the multiple areas of electronic component 12 during bonding, identifies off-range area 12-1 at higher temperature than its target temperature range, and identifies off-range area 12-2 at lower temperature than its target temperature range.
In step 7C3, LAB tool 75, based on the monitoring information from bonding monitor 75i, selectively controls laser emitters 755-1 and laser emitters 755-2 to adjust the power of their respective laser beams. Laser emitters 755-1 are vertically aligned with off-range area 12-1 of electronic component 12, and laser emitters 755-2 are vertically aligned with off-range area 12-2 of electronic component 12. To counteract the measured high temperature at off-range area 12-1 of electronic component 12, LAB tool 75 can selectively control laser emitters 755-1 to decrease the power of their laser beams. To counteract the measured low temperature at off-range area 12-2 of electronic component 12, LAB tool 75 can selectively control laser emitters 755-2 to increase the power of their laser beams.
In step 7C4, off-range areas 12-1 and 12-2 of electronic component 12 reach their target temperature as a result of the laser beam adjustments of corresponding laser emitters 755-1 and 755-2. Bonding monitor 75i can keep monitoring the multiple areas of electronic component 12, such that LAB tool 75 can keep selectively controlling the power of respective laser emitters 755 as needed to maintain the multiple areas of electronic component 12 within their target temperature range during bonding.
In some examples, bonder tool 800 can comprise laser source 851L configured to emit laser beams 851A, or can comprise laser source 851U configured to emit laser beams 851B. In some examples, bonder tool 800 can have laser source 851U and laser source 851L, can have laser source 851U without laser source 851L, or can have laser source 851L without laser source 851U.
In some examples, bonder tool 800 can comprise lateral laser source 8551 configured to emit lateral laser beams 8552, lateral laser source 8553 configured to emit lateral laser beams 8554, lateral laser source 8555 configured to emit lateral laser beams 8556, or lateral laser source 8557 configured to emit lateral laser beams 8558. In some examples, bonder tool 800 can comprise all or a subset of lateral laser sources 8551, 8553, 8555, or 8557. For instance, bonder tool 800 can comprise lateral laser sources 8551 and 8553 without lateral laser sources 8555 and 8557, or can comprise lateral laser sources 8555 and 8557 without lateral laser sources 8551 and 8553. In some examples, individual lateral laser beams 8852, 8554, 8556, or 8558, including for example respective beam A, beam B, beam C, or beam D, can be configured or controlled to induce different amounts of heat from the other beams. In some examples, laser beams 851A or 851B from vertical laser sources such as laser source 851L or 851U can be configured to induce a first heat on a workpiece on stage block 852, and laser beams 8552, 8554, 8556, or 8558 from lateral laser sources 8551, 8553, 8555, or 8557 can be configured to induce a second heat on a workpiece on stage block 852. A workpiece can include substrate 81, semiconductor devices 80A or 80B, inner electronic components 82, outer electronic components 84, or various interconnects 821 or 841 thereof, and the scope or the disclosed subject matter is not limited in these respects. In some examples, laser beams 851A or 851B from vertical laser sources such as laser source 851L or 851U can be configured to induce a first heat on a first one of interconnects 821 or 841, and laser beams 8552, 8554, 8556, or 8558 from lateral laser sources 8551, 8553, 8555, or 8557 can be configured to induce a second heat on a second one of interconnects 821 or 841.
Semiconductor device 80A and semiconductor device 80B are shown positioned on stage block 852, and can be similar to, or can comprise features or elements similar to those of, semiconductor devices 10, 10′, 20, or 30, or variations thereof. In some examples, bonder tool 800 can comprise stage block 852 and one or more lateral laser sources 8551, 8553, 8555, or 8557 wherein lateral laser sources 8551, 8553, 8555, or 8557 can face stage block 852 from a lateral side of stage block 853. Semiconductor devices 80A and 80B can comprise substrate 81, inner electronic component 82, outer electronic component 84, and encapsulant 85. In some examples, substrate 81 can be similar to substrate 11 or substrate 11′. In some examples, substrate 81 can comprise device substrate 81A corresponding to semiconductor device 80A and device substrate 81B corresponding to semiconductor device 80B. When placed over stage block 852, device substrates 81A and 81B can be separated or distinct from each other, or can be continuous with each other to be separated at a later stage of assembly.
In semiconductor device 80A, inner electronic component 82 can comprise interconnect 821, and outer electronic component 84 can comprise interconnect 841. Inner electronic component 82 and outer electronic component 84 can be coupled with substrate 81 through interconnects 821 and 841. In some examples interconnects 821 and 841 can be similar to interconnects 121,131, or 141. In some examples, inner electronic component 82 can be similar to electronic components 12 or 13, or outer electronic component 84 can be similar to electronic component 14. Inner electronic component 82 can be seated on upper side of substrate 81. Outer electronic components 84 can be disposed laterally spaced apart from lateral sides of inner electronic component 82. Outer electronic components 84 can comprise outer left electronic component 84 located on the left of inner electronic component 82, or outer right electronic component 84 located on the right of inner electronic component 82. As seen in
Encapsulant 85 of semiconductor device 80A can be coupled with the upper side of substrate 81, lateral sides of inner electronic component 82, and lateral sides of outer electronic component 84. Encapsulant 85 can be interposed between substrate 81 and inner electronic component 82, or between substrate 81 and outer electronic component 84. In some examples, encapsulant 85 can comprise or be referred to as package body or mold compound. In some examples, encapsulant 85 can comprise an organic resin, an inorganic filler, a curing agent, a catalyst, a coupling agent, a colorant, or a flame retardant, and can be formed by compression molding, transfer molding, liquid body molding, vacuum lamination, paste printing, or film assist molding. In some examples, encapsulant 85 can have a thickness in the range from about 0.15 millimeters (mm) to about 5.8 mm. Encapsulant 85 can protect electronic components 82 or 84 from external elements and can provide the structural integrity for substrate 85 or semiconductor device 80A.
In some examples, semiconductor device 80A can be located on the left side on the upper side of substrate 81, and semiconductor device 80B can be located on the right side on the upper side of substrate 81 so as to be spaced apart from semiconductor device 80A. Semiconductor device 80B can have a structure similar to semiconductor device 80A.
Stage block 852 can comprise any of one or more variations, including those described here for stage blocks 152, 152a, 152b, 152c, or 152d. Semiconductor devices 80A or 80B can be seated on or otherwise supported by stage block 852. In some examples, stage block 852 can be configured to support substrate 81, semiconductor device 80A, semiconductor device 80B, inner electronic components 82, or outer electronic components, in various combinations. In semiconductor devices 80A and 80B, interconnects 821 and 841 of inner electronic component 82 or outer electronic component 84 can be simultaneously secured to substrate 81 by laser beams 851A or 851B of laser sources 851L or 851U, or by lateral laser beams 8552, 8554, 8556, or 8558 of lateral laser sources 8551, 8553, 8555, or 8557.
Laser source 851L can be positioned under stage block 852 to vertically emit laser beams 851A toward semiconductor devices 80A or 80B. Laser source 851L emits laser beams 851A from below semiconductor devices 80A and 80B, and heat can be transferred or induced to interconnects 821 and 841 through stage block 852 and substrate 81. In some examples, lateral laser sources 8551, 8553, 8555, or 8557 can face stage block 852 from a lateral side of stage block 852.
Laser beams 851A can be similar to laser beams 151A and 751A in terms of positions, sizes, or control methods. In some examples, laser beams 851A can be selectively emitted toward a target area similarly to laser beams 751A, or the areas covered by laser beams 851A can be selectively controlled. In some examples, laser beams 851A can be emitted toward the entire target area similarly to laser beams 151A. In some examples, laser beams 851A can target another area of semiconductor device 80A, 80B, such as the entire area or perimeter areas. In some examples, laser source 851L can be referred to as or comprise a bottom laser source. In some examples, laser source 851L can be similar to laser sources 151 or 751L previously described.
Laser source 851U can be positioned over stage block 852, and laser beams 851B can be vertically emitted toward semiconductor devices 80A and 80B. Laser source 851U can emit laser beams 851B from above semiconductor devices 80A, 80B to transfer or induce heat to interconnects 821, 841 of electronic components 82, 84. Semiconductor devices 80A or 80B and stage block 852 can be positioned between laser source 851U and laser source 851L.
Laser source 851U can be similar to laser sources 151U and 751U previously described in terms of positions, sizes, or control methods. Laser beams 851B can be similar to laser beams 151B or 751B. In some examples, laser beams 851B can be selectively emitted toward a target area similarly to laser beams 751B, or the areas covered by laser beams 851B can be selectively controlled. In some examples, laser beams 851B can be selectively emitted toward an entire target area similarly to laser beams 151B. In some examples, laser beams 851B can target another area of semiconductor devices 80A or 80B, such as the entire area or perimeter areas. In some examples, laser source 851B can be referred to as or comprise an upper laser source.
Lateral laser sources 8551, 8553, 8555, or 8557 can comprise features or elements similar to those of laser source 851L or laser source 851U. Lateral laser sources 8551, 8553, 8555, or 8557 can be located laterally outside the perimeters of semiconductor devices 80A or 80B, laterally outside the perimeter of stage block 852, or laterally outside the perimeter of laser sources 851L or 851U.
Lateral laser sources 8551, 8553, 8555, or 8557 can irradiate laser laterally toward semiconductor devices 80A and 80B. In some examples, lateral laser sources 8551, 8553, 8555, or 8557 can face stage block 852 from a lateral side of stage block 852. In some examples, lateral laser sources 8551, 8553, 8555, or 8557 can laterally irradiate laser toward interconnects 841 of electronic component 84 within the perimeter of semiconductor device 80A or 80B, or toward interconnect 821 of electronic component 82 within the perimeter of semiconductor device 80A or 80B. In some examples, the arrangement or angles of lateral laser sources 8551, 8553, 8555, or 8557 can be controlled, and lateral laser sources 8551, 8553, 8555, or 8557 can selectively irradiate lateral laser beams 8552, 8554, 8556, or 8558 into a desired target area or portion of semiconductor devices 80A or 80B. For example, lateral laser sources 8551, 8553, 8555, or 8557 can emit lateral laser beams 8552, 8554, 8556, or 8558 at an oblique angle with respect to a top side of stage block 8412. In some examples, the lengths and widths of lateral laser sources 8551, 8553, 8555, or 8557 can be in the range from about 1 mm×1 mm to about 100 mm×100 mm. For example, the length and width of laser source 751L can be in the range from about 300 mm×100 mm. In some examples, the angles between substrate 81 and lateral laser beams 8552, 8554, 8556, or 8558 irradiated from lateral laser sources 8551, 8553, 8555, or 8557 can be in the range from about 1° to about 89°.
In some examples, lateral laser sources 8551, 8553, 8555, or 8557 can irradiate lateral laser beams 8552, 8554, 8556, or 8558 in order to compensate for non-uniform temperature distribution on areas of semiconductor devices 80A or 80B when laser sources 851L and 851U vertically irradiate laser beams 851A or 851B towards semiconductor devices 80A or 80B. In some examples, lateral laser sources 8551, 8553, 8555, or 8557 can selectively irradiate lateral laser beams 8552, 8554, 8556, or 8558 into target areas of semiconductor devices 80A or 80B, respectively, such as towards perimeter portions of substrate 81 or towards areas corresponding to interconnects 821 or 841.
Lateral laser source 8551 can be located on the upper left side of stage block 852. Lateral laser source 8551 can emit laser beams 8552 from the upper left towards electronic devices 80A or 80B. The angle of lateral laser source 8551 can be controlled or adjusted so lateral laser beams 8552 can target areas of semiconductor device 80A or 80B. In some examples lateral laser beams 8552 can comprise one or more lateral laser beams, such as exemplary lateral laser beams 8552A, 8552B, 8552C, or 8552D, and one or more lateral laser beams 8552A, 8552B, 8552C, or 8552D can be controlled or adjusted. In some examples, lateral laser beams 8552A can target a left perimeter area of semiconductor device 80A or of device substrate 81A, such as an area corresponding to interconnects 841 of outer left electronic component 84 of semiconductor device 80A. In some examples, lateral laser beams 8552B can target a center area of semiconductor device 80A or of device substrate 81A, such as an area corresponding to interconnects 821 of inner electronic component 82 of semiconductor device 80A. In some examples, lateral laser beams 8552C can target a right perimeter area of semiconductor device 80A or of device substrate 81A, such as an area corresponding to interconnects 841 of outer right electronic component 84 of semiconductor device 80A. In some examples, lateral laser beams 8552D can target a left perimeter area of semiconductor device 80B or of device substrate 81B, such as an area corresponding to interconnects 841 of outer left electronic component 84 of semiconductor device 80B. In some examples lateral laser beams 8552 such as lateral laser beams 8552A, 8552B, 8552C, or 8552D can be emitted toward a target area of semiconductor device 80A or 80B, or the sizes of areas covered by them can be selectively controlled. In some examples, lateral laser beams 8552 can be simultaneously irradiated as a group towards a common target area of semiconductor devices 80A or 80B. In some examples one or more of lateral laser beams 8552A, 8552B, 8552C, or 8552D can be selectively or sequentially irradiated towards respective distinct target areas of semiconductor devices 80A or 80B, for example by turning any one or more of lateral laser beams 8552A, 8552B, 8552C, or 8552D on or off for a selected duration, or by selectively or sequentially controlling the power of any one or more of lateral laser beams 8552A, 8552B, 8552C, or 8552D. In some examples, the power of any one or more of lateral laser beams 8552A, 8552B, 8552C, or 8552D can be the same as or different than the power of any one or more of the other lateral laser beams 8552A, 8552B, 8552C, or 8552D. In some examples, lateral laser source 8551 can be configured to sweep one or more of lateral laser beams 8552A, 8552B, 8552C, or 8552D, for example via sweeping movement of lateral laser source 8551 or by electronically controlling timing or phasing of one more of lateral laser beams 8552A, 8552B, 8552C, or 8552D to attain a beam sweep across stage block 852. In some examples, lateral laser beams 8552A, 8552B, 8552C, or 8552D can be swept between interconnects 841.
Lateral laser source 8553 can be located on the upper right side of stage block 852. Lateral laser source 8553 can emit laser beams 8554 from the upper right towards electronic devices 80A or 80B. The angle of lateral laser source 8553 can be controlled or adjusted so lateral laser beams 8554 can target areas of semiconductor device 80A or 80B. In some examples lateral laser beams 8554 can comprise one or more lateral laser beams, such as exemplary lateral laser beams 8554A, 8554B, 8554C, or 8554D, and one or more lateral laser beams 8554A, 8554B, 8554C, or 8554D can be controlled or adjusted. In some examples, lateral laser beams 8554A can target a right perimeter area of semiconductor device 80B or of device substrate 81B, such as an area corresponding to interconnects 841 of outer right electronic component 84 of semiconductor device 80B. In some examples, lateral laser beams 8554B can target a center area of semiconductor device 80B or of device substrate 81B, such as an area corresponding to interconnects 821 of inner electronic component 82 of semiconductor device 80B. In some examples, lateral laser beams 8554C can target a left perimeter area of semiconductor device 80B or of device substrate 81B, such as an area corresponding to interconnects 841 of outer left electronic component 84 of semiconductor device 80B. In some examples, lateral laser beams 8554D can target a right perimeter area of semiconductor device 80A or of device substrate 81A, such as an area corresponding to interconnects 841 of outer right electronic component 84 of semiconductor device 80A. In some examples, lateral laser beams 8554, lateral laser beams 8554A, 8554B, 8554C, or 8554D can be emitted toward a target area of semiconductor device 80A or 80B, or the sizes of areas covered by them can be selectively controlled. In some examples, lateral laser beams 8554 can be simultaneously irradiated as a group towards a common target area of semiconductor devices 80A or 80B. In some examples one or more of lateral laser beams 8554A or 8554B, 8554C, 8554D can be selectively or sequentially irradiated towards respective distinct target areas of semiconductor devices 80A or 80B, for example by turning any one or more of lateral laser beams 8554A, 8554B, 8554C, or 8554D on or off for a selected duration, or by selectively or sequentially controlling the power of any one or more of lateral laser beams 8554A, 8554B, 8554C, or 8554D. In some examples, the power of any one or more of lateral laser beams 8554A, 8554B, 8554C, or 8554D can be the same as or different than the power of any one or more of the other lateral laser beams 8554A, 8554B, 8554C, or 8554D. In some examples, lateral laser source 8553 can be configured to sweep one or more of lateral laser beams 8554A, 8554B, 8554C, or 8554D, for example via sweeping movement of lateral laser source 8553 or by electronically controlling timing or phasing of one more of lateral laser beams 8554A, 8554B, 8554C, or 8554D to attain a beam sweep across stage block 852. In some examples, lateral laser beams 8554A, 8554B, 8554C, or 8554D can be swept between interconnects 841.
Lateral laser source 8555 can be located on the lower left side of stage block 852. Lateral laser source 8555 can emit laser beams 8556 from the lower left towards electronic devices 80A or 80B. The angle of lateral laser source 8555 can be controlled or adjusted so lateral laser beams 8556 can target areas of semiconductor device 80A, 80B. In some examples, lateral laser beams 8556 can comprise one or more lateral laser beams, such as exemplary lateral laser beams 8556A, 8556B, 8556C, or 8556D, and one or more of lateral laser beams 8556A, 8556B, 8556C, or 8556D can be controlled or adjusted. In some examples, lateral laser beams 8556A can target a left perimeter area of semiconductor device 80A or of device substrate 81A, such as an area corresponding to interconnects 841 of outer left electronic component 84 of semiconductor device 80A. In some examples, lateral laser beams 8556B can target a center area of semiconductor device 80A or of device substrate 81A, such as an area corresponding to interconnects 821 of inner electronic component 82 of semiconductor device 80A. In some examples, lateral laser beams 8556C can target a right perimeter area of semiconductor device 80A or of device substrate 81A, such as an area corresponding to interconnects 841 of outer right electronic component 84 of semiconductor device 80A. In some examples, lateral laser beams 8556D can target a left perimeter area of semiconductor device 80B or of device substrate 81B, such as an area corresponding to interconnects 841 of outer left electronic component 84 of semiconductor device 80B. In some examples, lateral laser beams 8556, lateral laser beams 8556A, 8556B, 8556C, or 8556D can be emitted toward a target area of semiconductor device 80A or 80B, or the sizes of areas covered by them can be selectively controlled. In some examples, lateral laser beams 8556 can be simultaneously irradiated as a group towards a common target area of semiconductor devices 80A or 80B. In some examples one or more of lateral laser beams 8556A, 8556B, 8556C, or 8556D can be selectively or sequentially irradiated towards respective distinct target areas of semiconductor devices 80A or 80B, for example by turning any one or more of lateral laser beams 8556A, 8556B, 8556C, or 8556D on or off or a selected duration, or by selectively or sequentially controlling the power of any one or more of lateral laser beams 8556A, 8556B, 8556C, or 8556D. In some examples, the power of any one or more of lateral laser beams 8556A, 8556B, 8556C, or 8556D can be the same as or different than the power of any one or more of the other lateral laser beams 8556A, 8556B, 8556C, or 8556D. In some examples, lateral laser source 8555 can be configured to sweep one or more of lateral laser beams 8556A, 8556B, 8556C, or 8556D, for example via sweeping movement of lateral laser source 8555 or by electronically controlling timing or phasing of one more of lateral laser beams 8556A, 8556B, 8556C, or 8556D to attain a beam sweep across stage block 852. In some examples, lateral laser beams 8556A, 8556B, 8556C, or 8556D can be swept between interconnects 841.
Lateral laser source 8557 can be located on the lower right side of stage block 852. Lateral laser source 8557 can emit laser beams 8558 from the lower right towards electronic devices 80A or 80B. The angle of lateral laser source 8557 can be controlled or adjusted so lateral laser beams 8558 can target areas of semiconductor device 80A, 80B. In some examples, lateral laser beams 8558 can comprise one or more lateral laser beams, such as exemplary lateral laser beams 8558A, 8558B, 8558C, 8558D, and one or more of lateral laser beams 8558A, 8558B, 8558C, 8558D can be controlled or adjusted. In some examples, lateral laser beams 8558A can target a right perimeter area of semiconductor device 80B or of device substrate 81B, such as an area corresponding to interconnects 841 of outer right electronic component 84 of semiconductor device 80B. In some examples, lateral laser beams 8558B can target a center area of semiconductor device 80B or of device substrate 81B, such as an area corresponding to interconnects 821 of inner electronic component 82 of semiconductor device 80B. In some examples, lateral laser beams 8558C can target a left perimeter area of semiconductor device 80B or of device substrate 81B, such as an area corresponding to interconnects 841 of outer left electronic component 84 of semiconductor device 80B. In some examples, lateral laser beams 8558D can target a right perimeter area of semiconductor device 80A or of device substrate 81A, such as an area corresponding to interconnects 841 of outer right electronic component 84 of semiconductor device 80A. In some examples, lateral laser beams 8558, lateral laser beams 8558A, 8558B, 8558C, 8558D can be emitted toward a target area of semiconductor device 80A or 80B, or the sizes of areas covered by them can be selectively controlled. In some examples, lateral laser beams 8558 can be simultaneously irradiated as a group towards a common target area of semiconductor devices 80A or 80B. In some examples one or more of lateral laser beams 8558A, 8558B, 8558C, 8558D can be selectively or sequentially irradiated towards respective distinct target areas of semiconductor devices 80A or 80B, for example by turning any one or more of lateral laser beams 8558A, 8558B, 8558C, or 8558D on or off for a selected duration, or by selectively or sequentially controlling the power of any one or more of lateral laser beams 8558A, 8558B, 8558C, or 8558D. In some examples, the power of any one or more of lateral laser beams 8558A, 8558B, 8558C, or 8558D can be the same as or different than the power of any one or more of the other lateral laser beams 8558A, 8558B, 8558C, or 8552D. In some examples, lateral laser source 8557 can be configured to sweep one or more of lateral laser beams 8558A, 8558B, 8558C, or 8558D, for example via sweeping movement of lateral laser source 8551 or by electronically controlling timing or phasing of one more of lateral laser beams 8558A, 8558B, 8558C, or 8558D to attain a beam sweep across stage block 852. In some examples, lateral laser beams 8558A, 8558B, 8558C, or 8558D can be swept between interconnects 841.
As shown in
As shown in
Laser beams 851A or 851B and lateral laser beams 8552, 8554, 8556, or 8558 can be aimed or controlled to target specific areas of semiconductor devices 80A or 80B. Such control or targeting can provide uniform or targeted temperature distributions across semiconductor devices 80A or 80B, or can generate desired heat or temperature at target areas, to induce bonding of interconnects 821 or 841 of electronic components 82 or 84 with substrate 81. In some example, the difference between a maximum temperature and a minimum temperature, for example between interconnects at an outer portion of substrate 81 and interconnects at an inner portion of substrate, can be less than about 20 degrees Celsius, and in some cases less than about 5 degrees Celsius. In some examples, two elements or regions can be considered at a same temperate or a substantially same temperature when a temperature difference between the two elements or regions is within a range of about 20 degrees Celsius to about 5 degrees Celsius or less.
The present disclosure includes reference to certain examples. It will be understood by those skilled in the art, however, that various changes may be made, and equivalents may be substituted without departing from the scope of the disclosure. It is also understood by those skilled in the art that, for simplicity and clarity of the drawings, several variations or options can be inherently disclosed by the figures supported by the description. For example, any of semiconductor devices 10, 10′, 20, 30, 80A, or 80B can comprise a dielectric, such as underfill or an encapsulant like mold compound, around any of respective interconnects 121, 131, 141, 101′, 821, or 841 to further secure them to respective substrate 11, 11′, or 81. As another example, any of any of semiconductor devices 10, 10′, 20, or 30 can comprise an encapsulant, such as mold compound, that covers one or more sides of substrate 11, 11′ and one or more sides of elements 12, 13, 13′, 14, or 101′. In addition, modifications may be made to the disclosed examples without departing from the scope of the present disclosure. Therefore, it is intended that the present disclosure is not limited to the examples disclosed, but that the disclosure will include all examples falling within the scope of the appended claims.
The present application is a continuation-in-part of U.S. patent application Ser. No. 17/244,463 filed on Apr. 29, 2021 (pending) titled “LASER BONDED DEVICES, LASER BONDING TOOLS, AND RELATED METHODS” and published as US 2021/0398936 A1, which is a continuation-in-part of U.S. patent application Ser. No. 16/908,928 filed on Jun. 23, 2020 (pending) titled “HYBRID BONDING INTERCONNECTION USING LASER AND THERMAL COMPRESSION” and published as US 2021/0398940 A1. Said application Ser. No. 17/244,463 (US 2021/0398936 A1) and said application Ser. No. 16/908,928 (US 2021/0398940 A1) are hereby incorporated herein by reference in their entireties. Various aspects of this application are related to U.S. patent application Ser. No. 17/005,021 filed Aug. 27, 2020 and titled “SYSTEM AND METHOD FOR LASER ASSISTED BONDING OF AN ELECTRONIC DEVICE” and published as US 2021/0082717 A1, the entire contents of which are hereby incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 17244463 | Apr 2021 | US |
| Child | 18071318 | US | |
| Parent | 16908928 | Jun 2020 | US |
| Child | 17244463 | US |
