Patent Application
20230124284
This application claims priority to Korean Patent Application No. 10-2021-0137355, filed on Oct. 15, 2021, and all the benefits accruing therefrom under 35 U.S.C. §119, the content of which in its entirety is herein incorporated by reference.
Embodiments relate to a laser crystallization device, a laser crystallization method and a method of manufacturing a display device. More particularly, embodiments relate to a laser crystallization device, a laser crystallization method and a method of manufacturing a display device that perform solid-state laser crystallization.
A display device may include a driving element and a light emitting element to emit light. The driving element may include a transistor and a capacitor. The light emitting element may include an organic light emitting element and an inorganic light emitting element. The light emitting element may be connected to the driving element to receive a signal. The transistor may include silicon. Silicon may include amorphous silicon and polycrystalline silicon. Amorphous silicon may be crystallized into polycrystalline silicon by a laser.
In such a display device, the luminous efficiency of the display device may vary according to the degree of crystallization of polycrystalline silicon. Accordingly, research is being conducted to increase the crystallinity of polycrystalline silicon.
Embodiments may provide a laser crystalline device for generating a high-quality laser.
Embodiments may provide a laser crystalline method using a high-quality laser.
Embodiments may provide a method of manufacturing a display device using the laser crystalline device.
An embodiment of a laser device includes a first solid-state laser generator which generates a first solid-state laser having a first energy intensity, a second solid-state laser generator which generates a second solid-state laser having a second energy intensity lower than the first energy intensity and a third solid-state laser generator which generates a third solid-state laser having a third energy intensity lower than the first energy intensity.
In an embodiment, the second energy intensity may be in a range of about 48 percent to about 54 percent of the first energy intensity.
In an embodiment, the third energy intensity may be in a range of about 54 percent to about 60 percent of the first energy intensity.
In an embodiment, the second energy intensity may be in a range of about 48 percent to about 54 percent of the first energy intensity, and the third energy intensity may be in a range of about 54 percent to about 60 percent of the first energy intensity.
In an embodiment, the second solid-state laser generator may radiate the second solid-state laser about 5 nanoseconds to about 30 nanoseconds after the first solid-state laser generator radiates the first solid-state laser, and the third solid-state laser generator may radiate the third solid-state laser about 30 nanoseconds to about 95 nanoseconds after the first solid-state laser generator radiates the first solid-state laser.
In an embodiment, each of the first to third solid-state laser generators may include a solid-state laser medium.
In an embodiment, a full width at half maximum of each of the first to third solid-state lasers may be in a range of about 12 nanoseconds to about 17 nanoseconds.
An embodiment of a laser crystallization method may include generating a first solid-state laser having a first energy intensity, generating a second solid-state laser having a second energy intensity lower than the first energy intensity, generating a third solid-state laser having a third energy intensity lower than the first energy intensity and radiating the first solid-state laser, the second solid-state laser, and the third solid-state laser sequentially on a stage.
In an embodiment, the second energy intensity may be in a range of about 48 percent to about 54 percent of the first energy intensity.
In an embodiment, the third energy intensity may be in a range of about 54 percent to about 60 percent of the first energy intensity.
In an embodiment, the second energy intensity may be in a range of about 48 percent to about 54 percent of the first energy intensity, and the third energy intensity may be in a range of about 54 percent to about 60 percent of the first energy intensity.
In an embodiment, the second solid-state laser may be radiated about 5 nanoseconds to about 30 nanoseconds after the first solid-state laser is radiated, and the third solid-state laser may be radiated about 30 nanoseconds to about 95 nanoseconds after the first solid-state laser is radiated.
In an embodiment, a full width at half maximum of each of the first to third solid-state lasers may be in a range of about 12 nanoseconds to about 17 nanoseconds.
In an embodiment, each of the first to third solid-state laser generators may include a solid-state laser medium.
An embodiment of a method of manufacturing a display device includes providing a preliminary active layer on a substrate, first crystallizing the preliminary active layer by radiating a first solid-state laser having a first energy intensity onto the preliminary active layer, second crystallizing of the preliminary active layer by radiating a second solid-state laser having a second energy intensity lower than the first energy intensity onto the preliminary active layer and third crystallizing of the preliminary active layer by radiating a third solid-state laser having a third energy intensity lower than the first energy intensity onto the preliminary active layer.
In an embodiment, the second energy intensity may be in a range of about 48 percent to about 54 percent of the first energy intensity.
In an embodiment, the third energy intensity may be in a range of about 54 percent to about 60 percent of the first energy intensity.
In an embodiment, the second energy intensity may be in a range of about 48 percent to about 54 percent of the first energy intensity, and the third energy intensity may be in a range of about 54 percent to about 60 percent of the first energy intensity.
In an embodiment, the second solid-state laser may be radiated about 5 nanoseconds to about 30 nanoseconds after the first solid-state laser is radiated, and the third solid-state laser may be radiated about 30 nanoseconds to about 95 nanoseconds after the first solid-state laser is radiated.
In an embodiment, a full width at half maximum of the first to third solid-state lasers may be in a range of about 12 nanoseconds to about 17 nanoseconds, respectively.
In an embodiment, the second energy intensity may be in a range of about 48 percent to about 54 percent of the first energy intensity, the third energy intensity may be in a range of about 54 percent to about 60 percent of the first energy intensity, the second solid-state laser may be radiated about 5 nanoseconds to about 30 nanoseconds after the first solid-state laser is radiated, and the third solid-state laser may be radiated about 30 nanoseconds to about 95 nanoseconds after the first solid-state laser is radiated.
In an embodiment, each of the first to third solid-state lasers may be generated using a solid-state laser medium.
Embodiments of a laser crystallization device according to the invention may include a first solid-state laser generator which generates a first solid-state laser having a first energy intensity, a second solid-state laser generator which generates a second solid-state laser having a second energy intensity lower than the first energy intensity, and a third solid-state laser generator which generates a third solid-state laser having a third energy intensity lower than the first energy intensity. In addition, in an embodiment of a laser crystallization method according to the invention, the preliminary active layer may be crystallized using the laser crystallization device.
In such embodiments, the three solid-state lasers are generated with different intensities at different timings by using three solid-state laser generators, thereby increasing the melting time and solidification time in the process of crystallizing the preliminary active layer. Accordingly, in such embodiments, the crystallinity of the active layer in which the preliminary active layer is crystallized may be improved, and display performance of the display device may be improved.
The above and other features of the invention will become more apparent by describing in further detail embodiments thereof with reference to the accompanying drawings, in which:
The invention now will be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments are shown. This invention may, however, be embodied in many different forms, and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals refer to like elements throughout.
It will be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
It will be understood that, although the terms “first,” “second,” “third” etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, “a first element,” “component,” “region,” “layer” or “section” discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, “a”, “an,” “the,” and “at least one” do not denote a limitation of quantity, and are intended to include both the singular and plural, unless the context clearly indicates otherwise. For example, “an element” has the same meaning as “at least one element,” unless the context clearly indicates otherwise. “At least one” is not to be construed as limiting “a” or “an.” “Or” means “and/or.” As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top,” may be used herein to describe one element’s relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The term “lower,” can therefore, encompasses both an orientation of “lower” and “upper,” depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The terms “below” or “beneath” can, therefore, encompass both an orientation of above and below.
“About” or “approximately” as used herein is inclusive of the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, considering the measurement in question and the error associated with measurement of the particular quantity (i.e., the limitations of the measurement system). For example, “about” can mean within one or more standard deviations, or within ± 30%, 20%, 10% or 5% of the stated value.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Embodiments are described herein with reference to cross section illustrations that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated or described as flat may, typically, have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the claims.
Hereinafter, embodiments of the disclosure will be described in detail with reference to the accompanying drawings.
Referring to
A plurality of pixels P may be disposed in the display area DA. Each of the plurality of pixels P may include a driving element and a light emitting element. The light emitting element may be connected to the driving element. The light emitting element may emit light by receiving a signal from the driving element. The driving element may include a transistor and a capacitor. The light emitting element may include an organic light emitting diode or an inorganic light emitting diode. As the plurality of pixels P emit light, the display device DD may display an image in the display area DA. The plurality of pixels P may be entirely arranged in the display area DA. In an embodiment, for example, the plurality of pixels P may be arranged in a matrix form in the display area DA, for example, but not being limited thereto. Alternatively, the plurality of pixels P may be generally disposed in the display area DA in various ways.
Drivers for driving the plurality of pixels P may be disposed in the non-display area NDA. The drivers may include a data driver, a gate driver, a light emitting driver, a power voltage generator, a timing controller, and the like. The drivers may be connected to a plurality of pixels P. The plurality of pixels P may emit light based on signals received from the drivers.
Referring to
The driving element TFT may include a first transistor TFT1, a second transistor TFT2, and a third transistor TFT3. The light emitting element ED may include a first light emitting element ED1, a second light emitting element ED2, and a third light emitting element ED3.
The first transistor TFT1 may include a first active layer ACT1, a first gate electrode GAT1, a first source electrode SE1, and a first drain electrode DE1. The second transistor TFT2 may include a second active layer ACT2, a second gate electrode GAT2, a second source electrode SE2, and a second drain electrode DE2. The third transistor TFT3 may include a third active layer ACT3, a third gate electrode GAT3, a third source electrode SE3, and a third drain electrode DE3. The active layer ACT may include a first active layer ACT1, a second active layer ACT2, and a third active layer ACT3. The gate electrode GAT may include a first gate electrode GAT1, a second gate electrode GAT2, and a third gate electrode GAT3. The source electrode SE may include a first source electrode SE1, a second source electrode SE2, and a third source electrode SE3. The drain electrode DE may include a first drain electrode DE1, a second drain electrode DE2, and a third drain electrode DE3.
The first light emitting element ED1 may include a first anode electrode ANO1, a first intermediate layer ML1, and a first cathode electrode CATH1. The second light emitting element ED2 may include a second anode electrode ANO2, a second intermediate layer ML2, and a second cathode electrode CATH2. The third light emitting element ED3 may include a third anode electrode ANO3, a third intermediate layer ML3, and a third cathode electrode CATH3. The anode electrode ANO may include a first anode electrode ANO1, a second anode electrode ANO2, and a third anode electrode ANO3. The intermediate layer ML may include a first intermediate layer ML1, a second intermediate layer ML2, and a third intermediate layer ML3. The cathode electrode CATH may include a first cathode electrode CATH1, a second cathode electrode CATH2, and a third cathode electrode CATH3. The cathode electrode CATH (e.g., the first cathode electrode CATH1, the second cathode electrode CATH2, and the third cathode electrode CATH3) may be integrally formed as single unitary unit.
The thin film encapsulation layer may include a first inorganic layer IL1, an organic layer OL, and a second inorganic layer IL2. In an embodiment, as shown in
The substrate SUB may include a flexible material or a rigid material. In an embodiment, for example, the substrate SUB may include a polymer material such as polyimide, such that the substrate SUB may have a flexible characteristic. Alternatively, for example, the substrate SUB may include a material such as glass, and in this case, the substrate SUB may have a rigid characteristic.
The buffer layer BUF may be disposed on the substrate SUB. The buffer layer BUF may include an inorganic insulating material. In an embodiment, for example, the buffer layer BUF include at least one selected from silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiON), and the like. These may be used alone or in combination with each other. The buffer layer BUF may prevent metal atoms or impurities from diffusing into the active layer ACT. In such an embodiment, the buffer layer BUF controls the speed of heat provided to the active layer ACT during the crystallization process for forming the active layer ACT.
The active layer ACT may be disposed on the buffer layer BUF. In an embodiment, the active layer ACT may include a silicon semiconductor. In such an embodiment, the silicon semiconductor include amorphous silicon, polycrystalline silicon, or the like, for example.
The amorphous silicon may have a low electron mobility of about 1 square centimeter per volt second (cm2/Vs) or less. The polycrystalline silicon may have an electron mobility greater than that of the amorphous silicon. Accordingly, in an embodiment, the active layer ACT may include the polycrystalline silicon.
The polycrystalline silicon may be formed by radiating a laser to the amorphous silicon. When a laser is radiated to the amorphous silicon, the amorphous silicon may be crystallized into polycrystalline silicon.
The light emitting performance of the display device DD may vary according to the degree of crystallization of the polycrystalline silicon. In an embodiment, where the polycrystalline silicon is formed by radiating a laser to the amorphous silicon, if the polycrystalline silicon is not sufficiently crystallized, light emitted from the light emitting element may be stained. Therefore, in an embodiment of the invention, a laser may be radiated to the amorphous silicon in a way such that such defects are effectively prevented.
The gate insulating layer GI may be disposed on the buffer layer BUF. The gate insulating layer GI may be disposed to cover the active layer ACT. The gate insulating layer GI may include an inorganic insulating material.
The gate electrode GAT may be disposed on the gate insulating layer GI. The gate electrode GAT may partially overlap the active layer ACT. In response to a gate signal provided to the gate electrode GAT, a signal and/or a voltage may flow through the active layer ACT. In an embodiment, the gate electrode GAT may include a metal, a metal oxide, or a metal nitride. In an embodiment, where the gate electrode GAT includes a metal, the metal include at least one selected from silver (Ag), molybdenum (Mo), aluminum (Al), tungsten (W), copper (Cu), nickel (Ni), chromium (Cr), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), and the like, for example. These may be used alone or in combination with each other. In an embodiment, where the gate electrode GAT includes a metal oxide, the metal oxide include at least one selected from indium tin oxide (“ITO”), indium zinc oxide (“IZO”), and the like, for example. These may be used alone or in combination with each other. In an embodiment, where the gate electrode GAT includes a metal nitride, the metal nitride include at least one selected from aluminum nitride (AlN), tungsten nitride (WN), and chromium nitride (CrN), for example. These may be used alone or in combination with each other.
The interlayer insulating layer ILD may be disposed on the gate insulating layer GI. The interlayer insulating layer ILD may be disposed to cover the gate electrode GAT. The interlayer insulating layer ILD may include an inorganic insulating material.
The source electrode SE and the drain electrode DE may be disposed on the interlayer insulating layer ILD. The first source electrode SE1 and the first drain electrode DE1 may be respectively connected to the first active layer ACT1 through a contact hole defined through the gate insulating layer GI and the interlayer insulating layer ILD. The second source electrode SE2 and the second drain electrode DE2 may be respectively connected to the second active layer ACT2 through a contact hole defined through the gate insulating layer GI and the interlayer insulating layer ILD. The third source electrode SE3 and the third drain electrode DE3 may be respectively connected to the third active layer ACT3 through a contact hole defined through the gate insulating layer GI and the interlayer insulating layer ILD. Each of the source electrode SE and the drain electrode DE may include a metal, a metal oxide, a metal nitride, or the like, for example.
The via insulating layer VIA may be disposed on the interlayer insulating layer ILD. The via insulating layer VIA may be disposed to cover the source electrode SE and the drain electrode DE. The via insulating layer VIA may have a substantially flat top surface. In an embodiment, the via insulating layer VIA may include an organic insulating material. In such an embodiment, the organic insulating material include at least one selected from polyacrylic resins, polyimide resins, and acrylic resins, for example. These may be used alone or in combination with each other.
The anode electrode ANO may be disposed on the via insulating layer VIA. The anode electrode ANO may be connected to the drain electrode DE through a contact hole defined through the via insulating layer VIA. The anode electrode ANO may include a metal, a metal oxide, or a metal nitride.
The pixel defining layer PDL may be disposed on the via insulating layer VIA. An opening exposing each of the first to third anode electrodes ANO1, ANO2, and ANO3 may be defined or formed in the pixel defining layer PDL. The pixel defining layer PDL may include an organic insulating material.
The intermediate layer ML may be disposed on the anode electrode ANO. The intermediate layer ML may include an organic material that emits light of a preset color. The intermediate layer ML may emit the light based on a potential difference between the anode electrode ANO and the cathode electrode CATH. The intermediate layer ML may include an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer, for example.
The first to third light emitting elements ED1, ED2, ED3 may emit light having a same color as each other. In an embodiment, for example, all of the first to third light emitting elements ED1, ED2, and ED3 may emit blue light. Alternatively, the first to third light emitting elements ED1, ED2, ED3 may emit light of different colors from each other. In an embodiment, for example, the first to third light emitting elements ED1, ED2, ED3 may respectively emit red light, green light, and blue light.
The cathode electrode CATH may be disposed on the light emitting element ED. The cathode electrode CATH may include a metal, a metal oxide, or a metal nitride.
The thin film encapsulation layer may be disposed on the cathode electrode CATH. The thin film encapsulation layer may serve to protect the light emitting element ED from external moisture, heat, impact, and the like. The thin film encapsulation layer may have a structure in which a first inorganic thin film encapsulation layer IL1, an organic thin film encapsulation layer OL, and a second inorganic thin film encapsulation layer IL2 are stacked one on another. The organic thin film encapsulation layer OL may have a relatively thick thickness and a flat top surface compared to the first and second inorganic thin film encapsulation layers IL1 and IL2.
Referring to
The laser crystallization device LD may radiate the integrated solid-state laser LS onto the amorphous silicon thin film NCA on the stage ST. The integrated solid-state laser LS may refer to a laser in which a plurality of solid-state lasers are combined with each other. In an embodiment, for example, the integrated solid-state laser LS may be radiated while the laser crystallization device LD moves in the second direction DR2. Alternatively, the stage ST may move in a direction opposite to the second direction DR2, and the laser crystallization device LD may radiate the integrated solid-state laser LS in a fixed state. In an embodiment, the integrated solid-state laser LS may be a solid-state laser that generates a laser using a solid-state laser medium.
The amorphous silicon thin film NCA may be crystallized into a polycrystalline silicon thin film CA by the laser LS. The polysilicon thin film CA may correspond to the active layer ACT and may be referred to as the active layer ACT. That is, the active layer ACT may include polycrystalline silicon.
The integrated solid-state laser LS may be radiated in the form of a line beam extending in one direction. In an embodiment, for example, the line beam may extend in a first direction DR1 perpendicular to a second direction DR2 that is a moving direction of the laser crystallization device LD. In
Referring to
The solid-state laser generator LET may generate a solid-state laser using a solid-state laser medium therein. In an embodiment, the first solid-state laser generator LE1, the second solid-state laser generator LE2, and the third solid-state laser generator LE3 may each include a same solid-state laser medium or may include different solid-state laser media. The solid-state laser medium may include a material in which active atoms or active molecules are uniformly distributed. In an embodiment, for example, solid-state laser medium may include at least one selected from ruby (“Cr:Al2O3”), neodymium yag (“Nd:YAG”), ytterbium yag (“Yb:YAG”), neodymium yttrium (“Nd:YVO4”), neodymium yttrium lithium fluoride (“Nd:YLiF4”), and the like, and the wavelength of the solid-state laser output may be determined based on the material of each medium, for example, but not being limited thereto. Alternatively, the solid-state laser medium may include various materials capable of generating a solid-state laser.
The first solid-state laser generator LE1, the second solid-state laser generator LE2, and the third solid-state laser generator LE3 may generate solid-state lasers having different energy intensities, respectively. A first solid-state laser L1 generated by the first solid-state laser generator LE1 may have a higher energy intensity than the second solid-state laser L2 generated by the second solid-state laser generator LE2. In an embodiment, for example, the second solid-state laser L2 may have an energy intensity in a range of about 48 percent to about 54 percent of an energy intensity of the first solid-state laser L1. The first solid-state laser L1 generated by the first solid-state laser generator LE1 may have a higher energy intensity than the third solid-state laser L3 generated by the third solid-state laser generator LE3. In an embodiment, for example, the third solid-state laser L3 may have an energy intensity in a range of about 54 percent to about 60 percent of the energy intensity of the first solid-state laser.
The first to third solid-state lasers L1, L2, L3 may be radiated with a time difference, respectively. In an embodiment, for example,, the second solid-state laser generator LE2 may radiate the second solid-state laser L2 about 5 to about 30 nanoseconds after the first solid-state laser generator LE1 radiates the first solid-state laser L1. The third solid-state laser generator LE3 may radiate the third solid-state laser L3 about 30 to about 95 nanoseconds after the first solid-state laser generator LE1 radiates the first solid-state laser L1.
When crystallizing amorphous silicon into polycrystalline silicon, a laser crystallization device LD melts the amorphous silicon and then solidifies to obtain polycrystalline silicon. The first solid-state laser L1 and the second solid-state laser L2 may affect a melting time, which is a time taken when the amorphous silicon is melted. The third solid-state laser L3 may affect a solidification time, which is a time taken for the molten amorphous silicon to solidify. When crystallizing amorphous silicon into polycrystalline silicon using a laser crystallization device, it is desired to increase the melting time and solidification time of amorphous silicon to improve the crystallization arrangement. Accordingly, an embodiment of the laser crystallization device LD may increase the melting time and solidification time of amorphous silicon by radiating a plurality of solid-state lasers L1, L2, L3 with a time difference rather than radiating a single solid-state laser.
The lens-mirror array LMS may control a path along which the first to third solid-state lasers L1, L2, L3 travel by using a lens and a mirror. Also, the lens-mirror array LMS may improve the homogeneity of the first to third solid-state lasers L1, L2, L3 using a lens and a mirror.
The first to third solid-state lasers L1, L2, L3 passes through the lens-mirror array LMS may be radiated onto the stage ST as an integrated solid-state laser LS. The integrated solid-state laser LS may be a laser in which the first to third solid-state lasers L1, L2, L3 are combined with each other. The integrated solid-state laser LS may have peaks representing various energy intensities. Each of the peaks may have a size corresponding to the energy intensity of a corresponding one of the first to third solid-state lasers L1, L2, L3.
Various configurations may be further provided or disposed on the stage ST. In an embodiment, for example, a preliminary active layer may be disposed on the stage ST. The integrated solid-state laser LS may be radiated to the preliminary active layer to crystallize the preliminary active layer into an active layer.
Referring to
In order for the integrated solid-state laser LS to crystallize the preliminary active layer into an active layer, it is desired to have energy of a certain intensity or more. In an embodiment, for example, the energy intensity of the integrated solid-state laser LS may be in a range of about 260 millijoule per square centimeter (mJ/cm2) to about 300 mJ/cm2. In such an embodiment, the energy intensity of the integrated solid-state laser LS may mean the sum of the energy intensity of each of the first to third solid-state lasers L1, L2, L3. The energy intensity of the second solid-state laser L2 may be in a range of in a range of about 48 percent to about 54 percent of the energy intensity of the first solid-state laser L1. The energy intensity of the third solid-state laser L3 may be in a range of about 54 percent to about 60 percent of the energy intensity of the first solid-state laser L1. In such an embodiment, the energy intensity of the third solid-state laser L3 may be greater than that of the second solid-state laser L2.
However, in
In an embodiment, for example, the energy intensity of the integrated solid-state laser LS may be about 280 mJ/cm2. In such an embodiment, the energy intensity of the first solid-state laser L1 is about 138.6 mJ/ cm2, and the energy intensity of the second solid-state laser L2 is about 66.5 mJ/cm2, which is about 48 percent of the energy intensity of the first solid-state laser L1, and the energy intensity of the third solid-state laser L3 may be about 74.8 mJ/ cm2, which is about 54 percent of the energy intensity of the first solid-state laser L1.
A full width at half maximum of each of the first to third solid-state lasers L1, L2, L3 may be in a range of about 12 nanoseconds to about 17 nanoseconds. The full width at half maximum may mean the width of a spectrum having an energy intensity corresponding to half of the maximum energy intensity of the solid-state laser.
Since the first solid-state laser L1 and the second solid-state laser L2 are separately generated by dividing the timing, the melting time of the preliminary active layer to which the first solid-state laser L1 and the second solid-state laser L2 is radiated may increase. When the temperature of the preliminary active layer melted by the first solid-state laser L1 starts to decrease, the preliminary active layer may be melted again by further radiating the second solid-state laser L2.
Since the third solid-state laser L3 is generated separately from the first solid-state laser L1 and the second solid-state laser L2 and is radiated to the preliminary active layer, the temperature of the preliminary active layer in which solidification is in progress may be increased. Accordingly, the time for the preliminary active layer to be solidified may increase, such that the laser crystallization device LD may increase the crystallinity of the active layer.
Referring to
Thereafter, when the second solid-state laser L2 is radiated to the preliminary active layer, the temperature of the preliminary active layer is raised to about 1500° C. in about 45 to about 50 nanoseconds by the second solid-state laser L2. As described above, by separately generating the first solid-state laser L1 and the second solid-state laser L2 to irradiate a same preliminary active layer, the melting time of the preliminary active layer may be increased. After that, the temperature of the preliminary active layer may be lowered and the preliminary active layer may be solidified.
After the second solid-state laser L2 is radiated, when the third solid-state laser L3 is radiated to the preliminary active layer, the preliminary active layer is irradiated in about 105 to about 115 nanoseconds by the third solid-state laser L3. The temperature of the active layer rises again to about 1500° C. by radiating the third solid-state laser L3 to the preliminary active layer. In this case, since the solidified preliminary active layer is melted again, the total time for solidification of the preliminary active layer may be increased.
Referring to
Referring to
Referring to
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The invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of the invention to those skilled in the art.
While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit or scope of the invention as defined by the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2021-0137355 | Oct 2021 | KR | national |
