This invention relates to light emitting diodes (LED or LEDs) and in particular to LED packages having an LED embedded within the package.
Light emitting diodes (LED or LEDs) are solid state devices that convert electric energy to light and generally comprise one or more active layers of semiconductor material sandwiched between oppositely doped layers. When a bias is applied across the doped layers, holes and electrons are injected into the active layer where they recombine to generate light. Light is emitted from the active layer and from all surfaces of the LED.
In order to use an LED in a circuit or other arrangement, it is known to enclose an LED in a light emitting array to provide environmental and/or mechanical protection, color selection, focusing and the like. A light emitting array also includes electrical leads, contacts or traces, for electrically connecting the LEDs. The LED is traditionally mounted upon the carrier, submount, or substrate of the light emitting array. As illustrated in
A second conventional LED package 120 is shown in
In LED package design, two challenges are thermal management and size. It is known that thermal management is a concern with electronic packages, whether containing integrated circuits or discrete components such as diodes or power transistors. It is also known that excessive heat may cause LED failures. Thus, one of the considerations for designing LED packages is effective thermal management. One of the objectives of effective thermal management in the design of electronic packaging is to maintain the operating temperature of the LEDs and other active circuit components at an appropriately low enough temperature to prevent premature component failure. Various cooling strategies including conduction heat transfer are in common use. However, high intensity LEDs that emit light principally in the visible part of the electromagnetic spectrum can generate significant amounts of heat that is difficult to dissipate using conventional techniques. In conventional LED packages, heat from the LEDs mounted to a submount may pass into the submount below the LED, but may not efficiently spread laterally from below the LED. This increased heat can result in reduced lifetime or failure of the package.
There is also a continuous drive to reduce the size of LED packages to facilitate more widespread use of LEDs. With conventional LED packages, where LED arrays are formed from LEDs mounted to the surface of a submount, spacing between each individual LED in an array is dictated by the presence of the wire bond, which limits how close together the LEDs may be. In addition, these conventional LED packages provide for extended non-light emitting “dead space” between adjacent LEDs in an array. The LED package may also require additional optics or components, which may also increase the size of a LED array. The design considerations of reducing the size of an LED package and maintaining a relatively low operating temperature are to some extent competitive with each other. It is desirable to develop an LED package that addresses these design considerations.
In an aspect of the present invention, a light emitting array comprises a submount having a top surface and a bottom surface and at least one LED at least partially embedded within the submount. The at least one LED may be embedded in the submount such that the top surface of the submount is in contact with a side surface of the at least one LED. In a further feature of the aspect, the at least one LED is completely embedded within the submount. The submount may comprise many different materials, with a preferred material being electrically insulating. The submount may comprise ceramic materials, organic insulators, epoxy resin, or pre-preg. In a feature of the aspect, the submount comprises transparent optic pre-preg. Examples of suitable pre-preg materials include FR-4 (Woven glass and epoxy), FR-5 (Woven glass and epoxy), FR-6 (Matte glass and polyester), G-10 (Woven glass and epoxy), CEM-3 (Woven glass and epoxy), CEM-4 (Woven glass and epoxy), and CEM-5 (Woven glass and polyester). The submount may include additional components embedded therein. The component may comprise drive circuitry.
In a further aspect, the submount of the light emitting array comprises one or more parallel layers. In a feature of the aspect, the one or more parallel layers may be disposed above and below the at least one LED. In a further feature of the aspect, electrically conductive planes are disposed between the one or more parallel layers of the light emitting array. The electrically conductive planes may be separated by layers of dielectric material, which may provide a plurality of electrical contacts for the light emitting array. In some aspects, the electrically conductive planes may also be embedded within the submount of the light emitting array. In a further feature of the aspect, the electrically conductive planes may comprise electrically conductive traces.
In another aspect, micro vias are disposed between the one or more parallel layers of the light emitting array. The micro vias may be used to facilitate electrical connection with the at least one LED. The micro vias may also be used to help with heat dissipation within the light emitting array. The micro vias may be disposed in a linear configuration or a non-linear configuration.
In a further aspect, one or more optical layers may cover the at least one LED in such a way that light emitted from the at least one LED passes through the one or more optical layers. The one or more optical layers may be disposed above or below the at least one LED. The one or more optical layers may comprise a transparent material, such as plastic, silicon, glass, epoxy-resin, and pre-preg materials. In some embodiments, the one or more optical layers may comprise transparent epoxy-resin. In other embodiments, the one or more optical layers may comprise transparent pre-preg.
In a feature of the aspect, the one or more optical layers may comprise one or more phosphor layers. The one or more phosphor layers may comprise particles embedded in the light emitting array or in a separate medium forming a layer in the light emitting array. Suitable phosphor materials include, but are not limited to, YAG, TAG, BOSE, and CaSrAlSiN3. In another feature of the aspect, the one or more optical layers may comprise one or more luminescent layers comprising a transparent material having luminescent material dispersed therein. Suitable luminescent material may include phosphors, scintillators, day glow tapes and inks that glow in the visible spectrum upon illumination with ultraviolet light. In a further feature of the aspect, the one or more optical layers may comprise a luminescent layer comprising transparent pre-preg having phosphor dispersed therein. In another feature of the aspect, the one or more optical layers may include additional layers, including a filter layer, a spacer layer, a diffusion layer, and/or reflecting layers.
In another aspect, the light emitting array further comprises a conductive structure, such as a ground plane. The ground plane may provide the ground connections required by the light emitting array, and may also aid with heat dissipation. The ground plane may comprise suitable materials such as copper.
In a further aspect, a light emitting array comprises a base layer, at least one LED disposed on the base layer, one or more optical layers, and a substrate layer disposed below and in contact with the base layer in the array. The one or more optical layers cover the at least one LED and the base layer in such a way that light emitted from the at least one LED passes through the one or more optical layers. In another feature of the aspect, the light emitting array comprises a glue layer bonding the at least one LED to the base layer, wherein the glue layer overlies the base layer. The glue layer may comprise a reflective material. The base layer may comprise copper foil. A reflective layer may be disposed below the glue layer and the base layer. The reflective layer may have many different thicknesses and may comprise different reflective materials, with suitable materials including silver, aluminum, and gold, or any other reflective material such as barium sulfate and titanium dioxide. The at least one LED may be at least partially embedded within the substrate layer of the light emitting array. In another feature of the aspect, the at least one LED may comprise an array of LEDs. In some embodiments, the array of LEDs may be positioned in a planar arrangement within a single layer of the light emitting array. In alternative embodiments, the array of LEDs may be positioned within separate layers of the light emitting array.
In another aspect, spacing between the LEDs in the array is between about 40 microns to about 100 microns. In a further aspect, a surface effect resides on a surface of the one or more optical layers such that the array produces a predetermined light output. The surface effect may comprise a roughened surface region. The surface effect may comprise a surface pattern. In a feature of the aspect, the surface of the one or more optical layers may be finished, patterned, or processed. In another feature, the effect may be added to other layers within the light emitting array under the surface of the one or more optical layers.
In a further aspect, the light emitting array comprises a printed circuit board having at least one LED embedded therein. The printed circuit board may comprise multiple layers including a base layer, one or more substrate layers, one or more optical layers, and a ground plane. Additional components may be embedded within the multiple layers of the printed circuit board and/or mounted on outer surfaces of the printed circuit board. Electrical components may be packaged singly, such as resistors, capacitors, and transistors, or in groups, such as in amplifiers, oscillators, and integrated circuits. The electronic components may be mounted on the printed circuit board using surface mounted technology. The printed circuit board may include a positive voltage terminal and a negative voltage terminal.
In another aspect of the invention, a process for manufacturing a light emitting array comprises providing a submount having a top surface and a bottom surface and at least partially embedding at least one LED within the submount. The at least one LED may be embedded in the submount such that the top surface of the submount touches at least a side surface of the LED. In a further feature of the aspect, the at least one LED may be completely embedded within the submount. The light emitting array may comprise one or more layers. One or more components may be embedded within the light emitting array. The component may comprise driver circuitry.
In a feature of this aspect, the process further comprises drilling at least one conductive micro via in the submount. In another feature of this aspect, the process further comprises surrounding the at least partially embedded LED chip with one or more optical layers. In yet another feature, the light emitting array comprises a printed circuit board having at least one LED embedded therein.
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application. The drawings illustrate certain embodiment(s) of the invention. In the drawings:
a is a sectional view of an embodiment of a prior art LED package.
b is a sectional view of an alternative embodiment of a prior art LED package.
Embodiments of the present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout. Optional elements are illustrated by dashed lines in the figures.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element such as a layer, region or substrate is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there are no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present.
Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer or region to another element, and/or layer or region as illustrated in the figures. It will be understood that these terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises”, “comprising,” “includes” and/or “including” when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of skill in the art to which this invention belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Reference is now made to
The optical layer 10 may comprise one or more layers, such as a luminescent layer, a filter layer, a spacer layer and/or reflecting layers. In some embodiments, the optical layer 10 may comprise a luminescent layer having particles of a phosphor or multiple phosphors. In alternative embodiments, the optical layer 10 may comprise scattering particles, such as titanium dioxide. In additional embodiments, the optical layer 10 may comprise both phosphor and scattering particles. In other embodiments, the array 2 may comprise multiple optical layers 10. Additional layers, such as spacing layers and thermal paths may be added between, in, on, above or below the optical layers 10 in the array 2. One of skill in the art will understand that additional planes of electrical traces may be added to the array 2 to provide electrical connections to additional electrical circuitry on and/or embedded in the array 2.
As shown in
The base layer 4 of the array 2 may be constructed from a conductive metallic material. For example, the base layer 4 may be constructed from aluminum, iron, gold, or copper (e.g., copper foil). The conductivity of the base layer 4 facilitates heat dissipation from the array 2. The base layer 4 may have a thickness of about 0.0005 inches to about 0.0010 inches. For example, the base layer 4 may be about 0.0007 inches in thickness. An exemplary base layer may be half ounce copper foil.
A non-conductive layer of glue or paste 14 may be used to bond the LED 6 to the base layer 4. The glue layer 14 overlies the base layer 4 and thus is interposed between the base layer 4 and the LED 6. The glue layer 14 may include a reflective material to aide in light emission. In alternative embodiments, the light emitting array 2 may also include a reflective layer disposed below the base layer 4 and the glue layer 14. In such embodiments, the glue layer 14 may comprise an optically clear adhesive, such as silicone, in order to allow for light emitted by the LEDs 6 to be reflected by the reflective layer. The reflective layer may have many different thicknesses and may comprise many different reflective materials, with suitable materials including silver, gold, aluminum, microcellular polyethylene terephthalate (“MCPET”), and diffused light reflector (“DLR”). One of skill in the art will understand that various materials are available for use as an adhesive glue or paste. In another exemplary embodiment, the LED 6 may have bonding pads for adhering the LED 6 to the base layer 4.
In
As will be explained in greater detail below, LEDs 6 in the LED array 8 may be arranged very close to one another on the base layer 4. The close proximity of the LEDs 6 is possible because wire bonding (which is used in surface mount LED applications) is not needed to provide electrical connection to the LEDs 6. Rather, the LEDs 6 may be electrically connected using internal traces making up the LED array 2. As such, the LEDs 6 may be arranged in a near abutting relationship on the base layer 4. For example, the LEDs 6 may be arranged such that about 40 micron (μm) to about 100 micron spacing is present between the LEDs 6. In another example, spacing between the LEDs 6 may be between about 40 μm to about 80 μm, about 50 μm to about 75 μm, about 50 μm to about 70 μm, or about 60 μm to about 70 μm. Close spacing enables more light to be emitted from a relatively smaller sized LED package. One of skill in the art would understand that the internal traces may comprise any suitable material, including copper.
In
The thickness of the optical layer 10 may vary, depending on the height of components, such as LEDs, being embedded therein. In an exemplary embodiment, the optical layer 10 may have a thickness of about 0.5 mm to about 1 mm. For example, the optical layer 10 may have a thickness of about 0.5 mm to about 0.75 mm or of about 0.6 mm to about 0.7 mm.
The luminescent material 12 may be dispersed throughout the transparent material 18 of the optical layer 10, such that the luminescent material 12 does not directly coat the LED 6 as a layer of luminescent material. The absence of direct coating of the luminescent material 12 aids in heat dissipation and thermal management for the array 2. The transparent material 18 and luminescent material 12 do not form a composite, but rather the luminescent material 12 is dispersed throughout the transparent material 18. In exemplary embodiments, the luminescent material 12 may be uniformly dispersed throughout the transparent material 18.
The luminescent material 12 may be any desired luminescent material. Persons skilled in the art are familiar with, and have ready access to, a wide variety of luminescent materials. For example, a phosphor is a luminescent material that emits a responsive radiation (e.g., visible light) when excited by a source of exciting radiation. In many instances, the responsive radiation has a wavelength that is different from the wavelength of the exciting radiation. Suitable phosphor materials include, but are not limited to, YAG, TAG, BOSE, and CaSrAlSiN3. Other examples of luminescent materials include scintillators, day glow tapes and inks that glow in the visible spectrum upon illumination with ultraviolet light.
Luminescent materials can be categorized as being down-converting (i.e., a material which converts photons to a lower energy level (longer wavelength)) or up-converting (i.e., a material which converts photons to a higher energy level (shorter wavelength)). Additionally, in exemplary embodiments, the optical layer 10 may further comprise any of a number of well-known additives (e.g., diffusers, scatterers, tints, etc.).
As detailed in U.S. Pat. No. 7,213,940, hereby incorporated by reference, the combination of LEDs and phosphor may be used to produce a high efficiency white light source that provides an acceptable color temperature, good color rendering index, and a wide gamut. Additionally, it will be appreciated by one of skill in the art that the color of the LEDs, and the color and type of the luminescent materials may be selected to provide the desired light output intensity and color.
The surface 20 of the optical layer 10 may be finished, roughened, patterned, processed, or a surface effect 22 formed therein to aid in obtaining a predetermined light output and improved light extraction. For example, a surface pattern or a region of the surface that is roughened may reside in the surface of the optical layer 10. While such effect is described on the surface of the optical layer 10, the effect 22 may be added to other layers within the array 2 under the surface of the optical layer 10.
Reference is now made to
The substrate layer 24 may comprise ceramic materials, organic insulators, epoxy resin, or pre-preg. In a feature of the aspect, the substrate layer 24 comprises pre-preg material, such as FR-4, FR-5, FR-6, G-10, CEM-3, CEM-4, and CEM-5. In some embodiments, the substrate layer 24 and the optical layer 10 are comprised of the same material. For example, the substrate layer 24 and the optical layer 10 may both be comprised of transparent FR-4 pre-preg material. It will be understood by the skilled person that additional substrate layers may be included in the array depending on the design purposes of the array.
Embedding of additional components into the light emitting array 2 further reduces the size needed for the LED package. Reduction of the total footprint of the LED package is particularly beneficial for smaller form factor applications, such as conventionally-sized light bulbs.
The ground plane 26 may be added to the light emitting array 2 as a thermal management tool. The ground plane 26 size may be adjusted to meet the thermal requirements of the light emitting array 2. The ground plane 26 may comprise a metal foil, such as copper foil. It will be recognized that while the ground plane 26 is in contact with the substrate layer 24 in
Micro vias 28 may be formed in the base layer 4 to electrically connect the embedded components, including LEDs 6, to a power source. For example, the vias 28 may be formed in positions that correspond to the bumps or studs 16 formed on the LEDs 6. The vias 28 may be formed by drilling (e.g., using laser or mechanical drilling). The presence of the vias 28 for electrical connection facilitates the absence of wire bonding for providing electrical connection for the LEDs 6. As such, the vias 28 enable closer spacing of the LEDs 6 and thus the ability to have a smaller LED package without sacrificing light output. While
In an exemplary embodiment, the light emitting array 2 is a printed circuit board (PCB) with an LED embedded therein. The printed circuit board may be a single sided printed circuit board or a double sided printed circuit board. The printed circuit board may comprise one or more parallel layers. The printed circuit board may include additional electrical components embedded within the printed circuit board and/or mounted to an outer surface of the printed circuit board. Electrical components may be packaged singly, such as resistors, capacitors, and transistors, or in groups, such as in amplifiers, oscillators, and integrated circuits. In some embodiments, all of the electrical components are embedded within the printed circuit board. In other embodiments, some of the electrical components, such as the drive circuitry, resistors, inductors and capacitors, are embedded within the printed circuit board, while other electrical components are mounted to an outer surface of the printed circuit board. Electronic components may be mounted on an outer surface of the printed circuit board using surface mount technology (SMT). The printed circuit board may be used in a variety of different applications, including, but not limited to, consumer electronics (i.e. televisions, cellular phones, cable television converter boxes, etc.), dedicated service electronics, and high reliability electronics.
Reference is now made to
In the exemplary process, a base layer 4 is provided and an LED 6 is provided. In
Although not illustrated in
The cut panels can then be stacked in layers, alternating with layers of adhesive-backed copper foil. In the present invention, the optical layer is stacked on the LED array and the base layer (as shown in the center figure in
The following steps can be used to drill and plate holes or micro vias. Several panels of substrate or optical layer/base layer, each large enough to make several printed circuit boards, are stacked on top of each other and pinned together to keep them from moving. The stacked panels are placed in a CNC machine, and the holes are drilled according to the pattern determined when the boards were laid out. The holes are then deburred to remove any excess material clinging to the edges of the holes. The inside surfaces of the holes that are designed to provide a conductive circuit from one side of the board to the other are plated with copper. Non-conducting holes are plugged to keep them from being plated or are drilled after the individual boards are cut from the larger panel.
The following steps may be used to create a printed circuit pattern on the optical layer/base layer composite. The printed circuit pattern may be created by an “additive” process or a “subtractive” process. In the additive process, copper is plated, or added, onto the surface of the substrate in the desired pattern, leaving the rest of the surface unplated. In the subtractive process, the entire surface of the substrate is first plated, and then the areas that are not part of the desired pattern are etched away, or subtracted.
The following steps may be used for the additive process. The copper foil surface of the substrate or the optical layer/base layer composite is degreased. The panels pass through a vacuum chamber where a layer of positive photoresist material is pressed firmly onto the entire surface of the foil. A positive photoresist material is a polymer that has the property of becoming more soluble when exposed to ultraviolet light. The vacuum ensures that no air bubbles are trapped between the foil and the photoresist. The printed circuit pattern mask is laid on top of the photoresist and the panels are exposed to an intense ultraviolet light. Because the mask is clear in the areas of the printed circuit pattern, the photoresist in those areas is irradiated and becomes soluble. The mask is removed, and the surface of the panels is sprayed with an alkaline developer that dissolves the irradiated photoresist in the areas of the printed circuit pattern, leaving the copper foil exposed on the surface of the substrate. The panels are then electroplated with copper. The foil on the surface of the substrate acts as the cathode in this process, and the copper is plated in the exposed foil areas to a thickness of about 0.001-0.002 inches (0.025-0.050 mm). The areas still covered with photoresist cannot act as a cathode and are not plated. Tin-lead or another protective coating is plated on top of the copper plating to prevent the copper from oxidizing and as a resist for the next manufacturing step. The photoresist is stripped from the boards with a solvent to expose the substrate's copper foil between the plated printed circuit pattern. The boards are sprayed with an acid solution that eats away the copper foil. The copper plating on the printed circuit pattern is protected by the tin-lead coating and is unaffected by the acid.
Additionally, the surface 20 of the optical layer 10 may be finished to obtain a predetermined light output. Surface finishing may include providing surface patterns or providing a roughened area in a portion of the surface. It will be understood by one of skill in the art that in alternative embodiments, other layers within the array 2 may be the finished, roughened, patterned, and/or processed to provide an effect under the surface of the optical layer 10.
If more layers are desired, additional substrate layers may be added to the optical layer/base layer composite in the manner described above. For example, the above-described composite may be flipped over for application of a substrate layer onto the base layer and/or for drilling of micro vias in the base layer to enable electrical connection to the LED array 8 and other components. One of skill in the art will understand how to build layers as desired. Additional components (e.g., driver circuitry) may be embedded in the substrate layer 24. A ground plane 26 may also be applied to the substrate layer 24. The size of the ground plane 26 is variable and may be adjusted based on the thermal requirements.
Reference is now made to
The optical layer 38 comprises a transparent material 44 having luminescent material 46 disposed therein. In some embodiments, the transparent material 44 may be a transparent epoxy resin or pre-preg material. The luminescent material 46 may comprise any suitable material, including phosphor. The surface of the optical layer 38 may be finished or a surface effect 48 formed therein to aid in obtaining a predetermined light output and diffusing light. For example, a surface pattern or a region of the surface that is roughened may reside on the surface of the optical layer.
As shown, the optical layer 38 is separate from the embedded LED array 36. The optical layer 38 may be separated from the embedded LED array 36 in order to control the amount of heat produced by the luminescent material 46 and the LED array 36. For example, in embodiments where the luminescent material 46 is phosphor, the phosphor may produce greater amounts of heat than the LEDs 34. The light emitting array 30 includes a copper panel 54, or trace, disposed between the optical layer 38 and the embedded LED array 36 within the first substrate layer 52. The copper panel 54 may be used as a means to dissipate heat generated by the optical layer 38 during use of the light emitting array 30. The copper panel 54 is disposed over the first substrate layer 52 and includes openings 55 to allow light emitted by the LEDs 34 of the LED array 36 to pass through the first substrate layer 52 and into the optical layer 38. Thermal paths 58 may be drilled through the copper panel 54 and the first substrate layer 52 to the ground plane 50 to help with heat dissipation. As shown, a portion of the copper panel 54 is not covered by the optical layer 38. This portion of the copper panel 54 may also be used to aid heat dissipation from the optical layer 38. Additional heat sinks 62, 64 are disposed on the light emitting array 30 in contact with the ground plane 50. The heat sinks 62, 64 may be made from material having high thermal conductivity such as aluminum, copper, ceramics, plastics, composites, or a combination of these materials. In other embodiments, additional ground planes may also be included in the light emitting array 30 in order to better facilitate heat dissipation.
A third substrate layer 60 is disposed below the ground plane 50. The third substrate layer 60 enables a higher level of integration in the light emitting array 30 by providing layers that may have additional components embedded therein. As shown, components 66, such as the ASIC, are embedded in the third substrate layer 60. Additional components, including supporting components such as resistors, inductors, and capacitors may also be embedded within the third substrate layer 60. It will be understood by the skilled person that multiple ground planes and substrate layers may be included in the array depending on the design purposes of the array.
Reference is now made to
The optical layer 78 comprises a transparent material 79. In some embodiments, the transparent material 79 may be an epoxy resin or pre-preg material. As shown in
The light emitting array 70 includes a first substrate layer 92, a second substrate layer 94, and a third substrate layer 96. The first substrate layer 92, the second substrate layer 94, and the third substrate layer 96 may comprise a transparent material, such as transparent epoxy resin or pre-preg. The first substrate layer 92 is disposed below the base layer 72 and is in contact with the ground plane 90. The second substrate layer 94 is disposed beneath the ground plane 90 and the third substrate layer 96 is disposed beneath the second substrate layer 94. The first substrate layer 92, the second substrate layer 92, and the third substrate layer 96 enable a higher level of integration in the light emitting array 70 by providing layers that may have additional components embedded therein. While the embodiment shown in
The light emitting array 70 may also include optional electrical components 93, 95, and 97 (as indicated by dashed lines). As shown, electrical components 93 and 95 are embedded within the first substrate layer 92 and the second substrate layer 94, respectively. Components 93 and 95 may comprise the driver level circuitry, including the ASIC, or other active components for operation of the light emitting array 70. In addition, supporting components, such as resistors, capacitors, and inductors, may also be embedded within the light emitting array 70. Components 97 are mounted to outer surfaces of the light emitting array 70. Components 97 may comprise active components and passive components for operation of the array 70, as well as, as components such as transistors, oscillators, or additional LEDS may be mounted to the outer surfaces of the light emitting array 70. Components 97 may be mounted to the outer surfaces of the light emitting array 70 using surface mount technology. One of skill will understand that optional components 93, 95, and 97 may be disposed within the light emitting array in all of the places indicated in
In the drawings and specification, there have been disclosed typical embodiments of the invention and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention being set forth in the following claims.
This application is a continuation-in-part of U.S. Utility patent application Ser. No. 13/088,693, filed Apr. 18, 2011 and entitled “LED Array Having Embedded LED and Method Therefor”, which is incorporated herein by reference in its entirety.
Number | Date | Country | |
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Parent | 13088693 | Apr 2011 | US |
Child | 13417972 | US |