1. Field of the Invention
This invention relates generally to an LED structure and method of manufacturing the same, and more particularly to an LED structure for flip-chip package and method of manufacturing the same.
2. Description of the Prior Art
Concurrently, the method for packaging LED is mainly performed by wire bonding method. A schematic of wire bonding package structure for LED is shown in
However, such packaging method encounters several problems. First, the p-contact on LED needs a current distributing layer to increase current distributing area on LED, as shown in
Besides, the material used of package substrate in
Except for the aforesaid disadvantages, the height of metal line in
In view of the aforementioned, another packaging structure is needed to overcome the above drawbacks.
The main purpose of the present invention is to provide a LED structure for flip-chip packaging and the manufacturing method of the same. The advantages of flip-chip are that they are small in volume, thin in thickness, light in weight, and include large emitting area. Besides, the LED structure of the present invention is suitable for flip-chip package and improves the yield.
Another purpose of the present invention is to increase the contact area of LED and metal, not only for better heat dissipation effect, but also provides reflection effect.
The other purpose of the present invention is to utilize the light emitting area more efficiently.
The further purpose of the present invention is to make ohmic contact layer without the need of using transparent conductor layer for current spreading.
Another purpose of the present invention is that passivation layer is not necessarily transparent, thus the selection of materials can be less restricted.
According to the aforementioned purposes, the present invention provides a method for manufacturing LED, comprising: forming a conduction enhancing layer on a LED structure, and electrically connected to p-contact and n-contact of LED. Afterward, forming a bumping area definition layer, wherein two electrode areas are formed within bumping area definition layer. Then, forming two bumping pads on two electrode areas, and electrically connecting to conduction enhancing layer. Then, removing the bumping definition layer, and removing selectively the exposed conduction enhancing layer such that the two bumping pads are isolated electrically.
The present invention also provides a method for manufacturing LED, comprising: forming a passivation layer on a LED structure and expose p-contact and n-contact of LED. Afterward, forming a temporary layer on the passivation layer and exposing two bumping areas, wherein p-contact and n-contact are formed underneath the bumping area separately. Then, a conduction enhancing layer is formed on the temporary layer, p-contact and n-contact. Then a bumping area definition layer is formed on the conduction enhancing layer and overlapped with the temporary layer. Afterward, two bumping pads are formed on two bumping areas. Then, removing the bumping area definition layer, and removing selectively exposed conduction enhancing layer, and removing exposed conduction enhancing layer selectively.
The present provides a LED structure for flip-chip package, comprising: a substrate, and a LED structure. The LED structure is formed on the substrate, which comprising a semiconductor layer of n-type conductive semiconductor layer and a semiconductor of p-type conductor. The p-type conductive semiconductor and n-type conductive semiconductor comprise a p-contact and an n-contact separately. Besides, a passivation layer is formed on the p-type conductive semiconductor layer and the exposed n-type conductive semiconductor, and exposed p-contact and n-contact. A conduction enhancing layer is formed on p-contact and n-contact, and connected electrically to p-contact and n-contact. The two bumping pads are formed on the conduction enhancing layer, and connected electrically to p-contact and n-contact. The two bumping pads includes gold, silver, copper, nickel gold, solder bump, gold bump, silver bump, copper bump, silver epoxy or solder paste. And the substrate includes transparent material.
The above objects, and other features and advantages of the present invention will become more apparent after reading the following detailed description when taken in conjunction with the drawings, in which:
Method and structure of LED structure for flip-chip package is described below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, and the scope of the present invention is expressly not limited expect as specified in the accompanying claims.
The components of the different elements are not shown to scale. Some dimensions of the related components are exaggerated and meaningless portions are not drawn to provide clearer description and comprehension of the present invention.
The present invention is related to a method for making LEDs ready for flip-chip packaging. First, forming a conduction enhancing layer on a LED structure, and connected electrically to p-contact and n-contact of the LED structure. The LED structure is formed on a transparent substrate, and comprises a passivation layer residing on a LED structure. Afterward, forming a bumping area definition layer on a conduction enhancing layer, wherein two electrode areas are formed within bumping area definition layers. Then, forming two bumping pads on the two electrode areas, and electrically connected to conduction enhancing layer. The methods of forming bumping pads including: plating, spraying, spin coating or printing, and bumping pads can be solder bump, gold bump, silver bump, copper bump, or others such as: solder paste or silver epoxy, or metals such as: copper, gold, silver, platinum, molybdenum, titanium, nickel, palladium or their alloy. Then, the bumping area definition layer is removed, and the exposed conduction enhancing layer is removed selectively, such that electrically isolating is formed between two bump pads. The method for removing conduction enhancing layer can be etching or peeling method. The usage of peeling method needs to form an additional layer on LED structure and overlap with bumping area definition layer conduction enhancing layer before forming conduction enhancing layer.
According to the feature of the present invention, the detail steps of the present invention are described in block diagram of
In the last step, except for using the etching process, peeling method can also be used. To use peeling method, the prior step must be adjusted. The total steps are showed as
First, LED structure is formed in step 41. Then, passivation layer is formed on LED for protecting LED structure in step 42. Afterwards, a temporary layer is formed in step 43, on which the conduction enhancing layer which must be removed in the last process. Then, a field conduction enhancing layer is formed in step 44, The purpose of this layer is not only to increase electrical characteristic between p-contact and n-contact of metal bumping pads and LED, but also to be used as a metal electrode of plating when bumping pads are formed by plating. Afterward, bumping area definition layer is formed and exposed area on conduction enhancing layer, p-contact and n-contact of LED are resided underneath the area in step 45. This step includes deposing bumping area definition layer and defining bumping area with photolithography, wherein p-contact and n-contact are underneath the bumping area. Then, bumping pads are formed on the exposed areas by means of deposition, printing or plating method in bumping area definition area in step 46. Then, the bumping area definition layer is removed in step 47, wherein the simple etching can be used for removing method. Afterward, the temporary layer is lift-off to remove exposed conduction enhancing layer in step 48.
Two embodiment of the present invention are described in
A LED structure 120 is formed as shown in
As show in
As shown in
As shown in
Bumping pads 136 are formed on p-contact 126 and n-contact 125 as shown in
Removing bumping area definition layer 134, the method can be done simply by photolithography or etching. When bumping area definition layer 134 is selected as high selection ration material, wet etching method can be used for removing bumping definition layer 134.
The exposed conduction enhancing layer 132 is removed as shown in
The peeling method can be used to removing conduction enhancing layer in another embodiment of the present invention. Similar to the last embodiment of the present invention, a LED 220 is included in
The following process is similar to the embodiment of the present invention, until the bumping pads 236 is formed as shown in
The advantage of the present invention is mainly that the packaged LED is compact in size. On the other hand, in the flip-chip packaging, the p-contact and n-contact are contacted with the metal bumping pads, the contact area with metal is large thus the thermal dissipations effect is better. If the transparent materials are used for current distributing layer and passivation layer, the metal bumping pads and the following flip-chip packaged substrate can provides the reflection effect of the light of LED. The light emitting area of the flip-chip package is toward the transparent substrate of the LED, and there is no p-contact and n-contact covering the light therefore the light emitting area is larger, which can more efficiently using the light emitting area. In addition, the present invention does not need transparent conductive layer for contact conductor layer of current distribution, and does not need transparent passivation layer for protection, therefore the selection of material can be more flexible.
Although specific embodiments have been illustrated and described, it will be obvious to those skilled in the art that various modifications may be made without departing from what is intended to be limited solely by the appended claims.
Number | Date | Country | Kind |
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094120605 | Jun 2005 | TW | national |
This application is a divisional application of pending U.S. patent application Ser. No. 11/471,482, filed Jun. 21, 2006 (of which the entire disclosure of the pending, prior application is hereby incorporated by reference).
Number | Date | Country | |
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Parent | 11471482 | Jun 2006 | US |
Child | 12292716 | US |