Patent Application
20220199882
The present invention relates to a chip scale package in which a pad size of a light emitting diode chip is increased, and a method for manufacturing the same.
Light Emitting Diodes (LEDs) are attracting attention as they have a longer lifecycle, less power consumption, excellent brightness, and are not harmful to a human body compared to incandescent lamps. In particular, as it becomes possible to produce a light emitting diode emitting white light through a chip scale package, the light emitting diode is in the spotlight.
In general, a light emitting diode chip emitting blue light is used in such a light emitting diode chip scale package. In order to convert a blue light of the light emitting diode chip into any one of white light, red light, and green light, a silicon phosphor film 20 is disposed on a surface of the light emitting diode chip 10 as shown in
However, in this conventional light emitting diode chip scale package 30, a pad 40 of the light emitting diode chip 10 which is electrically connected to an external object is very small. Therefore, in the process of electrically connecting a substrate and the light emitting diode chip 10 using a surface mounting technology, there is a problem in that defects such as open/short circuit occurs. This problem becomes more highlighted as a critical problem as the size of the light emitting diode chip 10 decreases. More specifically, in the case of the conventional light emitting diode chip 10, as shown in
Accordingly, there is a need for a new light emitting diode chip scale package capable of solving the problems of the conventional light emitting diode chip scale package, and a method for manufacturing the same.
The present invention has been made in order to solve the above problem, and an object of the present invention is to provide a light emitting diode chip scale package and a method for manufacturing the same, by expanding an area of a pad formed on the light emitting diode chip which is electrically connected to a substrate, thereby solving electrical problems occurring during the connection process of the light emitting diode chip scale package to the substrate.
A light emitting diode chip scale package according to the present invention for achieving the object as described above, comprises: a light emitting diode chip 100 on one surface of which a pad 110 electrically connected to an external object is formed; a phosphor silicon film 200 surrounding the light emitting diode chip 100 so that a bonding surface 111 of the pad 110 is exposed to outside; and a metal layer 300 connected to the bonding surface 111 and expanding a surface area of the pad 110.
In addition, the pad 110 includes a pair of pad units 110A spaced apart from each other, and the metal layer 300 includes a pair of metal layer units 300A connected to each of the pad units 110A. A separation distance L2 between the metal layer units 300A is larger than or equal to a separation distance L1 between the pad units 110A.
A method for manufacturing a light emitting diode chip scale package according to the present invention for achieving the above object, comprises: a package forming step S100 of wrapping a light emitting diode chip 100 with a phosphor silicon film 200 and exposing a bonding surface 111 of a pad 110 to an outside; and a pad expanding step S200 of expanding the pad 110 by bonding a metal layer 300 to the bonding surface 111.
Further, the package forming step (S100) comprises: a frame coupling step S110 of coupling vertical frames 500 to a substrate 400 to form a hole 600; a diode arranging step S120 of arranging the light emitting diode chip 100 on the hole 600; a liquid injection step S130 of injecting a mixed solution 200A on the hole 600; a film forming step S140 of processing the mixed solution 200A injected on the hole 300 to convert the mixed solution 200A into a phosphor silicone film 200; and a substrate removing step S150 of removing the substrate 400 to form a package plate 700 in which the pad 110 is exposed to an outside.
The mixed solution 200A is a mixture of a phosphor and silicon.
The pad expanding step S200 comprises: a shadow mask combining step S210 of combining a shadow mask 800 to one surface of the vertical frame 700 and one surface of the phosphor silicon film 200 positioned in the groove 112 formed between the pads which are exposed by removing the substrate 400 at the substrate removing step S150.
The pad expanding step S200 comprises: a metal deposition step S220 of depositing a metal on one surface of the package plate 700 to which the pad 110 is exposed.
In the metal deposition step S220, the deposition of a metal is performed by any one of a vacuum deposition method (E-beam) and a sputtering method.
The pad expanding step S200 comprises: a shadow mask removing step S230 of removing the shadow mask 800 combined to the package plate 700; and a frame removing step S240 of removing the vertical frame 500.
The light emitting diode chip scale package manufactured using the method of manufacturing the light emitting diode chip scale package in accordance with the present invention can expand an area of a pad formed on the light emitting diode by using a metal layer, and thus since the size of the pad can be small, thereby minimizing electrical defects.
Further, since a metal layer is bonded on the lower surface of the light emitting diode chip scale package, surface area of the LED chip scale package is expanded, a heat arising from the LED chip can be dissipated more easily.
Further, in the case of a light emitted by a lower surface of the LED chip, because the light inputted to the metal layer is reflected to an upper or side surface, the present invention is beneficial that light efficiency of the LED can be maximized.
Advantages and features of embodiments of the present invention, and methods of achieving them, will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention cannot be construed as being limited to the embodiments set forth herein, and may be embodied in many different forms as well. And, the present embodiments are only for fully disclosing the present invention. In addition, the present embodiments are provided to completely disclose the scope of the present invention to those of ordinary skill in the art to which the present invention pertains. The invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout.
In describing the embodiments of the present invention, if it is determined that a detailed description of a well-known function or configuration may unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted. And, the terms to be described later are terms defined in consideration of the functions in the embodiment of the present invention, which may vary according to the intention or custom of the user or operator. Therefore, the definition should be made based on the content throughout this specification.
Hereinafter, a light emitting diode chip scale package 1000 according to the present invention will be described with reference to the accompanying drawings.
With reference to
More specifically, as described with reference to
In this case, the pad 110 may be comprised of a pair of pad units 110A. The metal layer 300 may include a pair of metal layer units 300A connected to each of the pad units 110A. In order to expand the surface area of the pad unit 110A which is exposed to the outside, the width direction length R2 of the metal unit 300A is preferably to be formed longer than the width direction length R1 of the pad unit 110A. It is preferable that the separation distance L2 of the metal layer units 300A be larger than the separation distance L1 of the pad units 110A in order to increase the distance between the conductive wires which are connected to the pads.
In other words, by making the width direction length R2 of the metal layer unit 300A longer than the width direction length R1 of the pad unit 110A, the metal layer unit 300A can be electrically connected to the substrate more smoothly. By making the separation distance L2 between the metal layer units 300A larger than the separation distance L1 between the pad units 110, when a current flow through the metal layer unit 300A, the current flowing through the metal layer unit 300A is prevented from flowing out of the original flow route due to unnecessary contact thereby generating short circuit.
In addition, in the light emitting diode chip scale package 1000 according to the present invention, as described above, the metal layer 300 electrically connected to the pad 110 is formed on the lower surface, so that the problem of electrical failure can be solved as well as the metal layer 300 acts as a heat sink and a reflector, thereby improving a heat dissipation efficiency and a light efficiency. More specifically, when the metal layer 300 is formed on a lower surface, a surface area of the metal layer 300 is larger than the sum of a bonding surface 111 of the pad 110 on which the metal layer 300 is bonded and a surface area of the phosphor silicon film 200, and the heat dissipation efficiency is increased. In addition, among the light emitted from the light emitting diode chip 100, the light emitted to the lower surface, which had been scattered or absorbed on the surface of the substrate to which the light emitting diode chip scale package is bonded and thereby being wasted, is reflected by the metal layer 300 to the upper or side surface and the light efficiency also increases.
Hereinafter, with reference to the drawings, a method of manufacturing the light emitting diode chip scale package 1000 described above will be described.
Referring to
The package forming step S100 comprises: a frame coupling step S110 of coupling vertical frames 500 to a substrate 400 to form a hole 600; a diode arranging step S120 of arranging the light emitting diode chip 100 on the hole 600; a liquid injection step S130 of injecting a mixed solution 200A on the hole 600; a film forming step S140 of processing the mixed solution 200A injected on the hole 300 to convert the mixed solution 200A into a phosphor silicone film 200; and a substrate removing step S150 of removing the substrate 400 to form a package plate 700 in which the pad 110 is exposed to an outside.
The pad expanding step S200 comprises: a shadow mask combining step S210 of combining a shadow mask 800 to restrict a position to which a metal is deposited; a metal deposition step S220 of depositing a metal on one surface of the package plate 700 to which the shadow mask 800 is combined; a shadow mask removing step S230 of removing the shadow mask 800 after the deposition of the metal; and a frame removing step S240 of removing the vertical frame 500.
Hereinafter, the method is described more specifically with reference to the process diagrams of
In the frame coupling step S110, as illustrated in
Then, in the diode arranging step S120, as illustrated in
Then, in the fluid injection step S130, as shown in
Then, in the film forming step S140, by applying heat or light to the liquid mixed solution 200A, the mixed solution 200A is solidified and converted into a phosphor silicon film 200.
Then, in the substrate removing step S150, as shown in
Then, in the shadow mask combining step S210, as shown in
Then, in the metal deposition step S220, as shown in
Then, in the shadow mask removing step S230, as illustrated in
Then, in the frame removing step S240, as shown in
In addition, since the metal layer should be formed very thin during the metal deposition conducted during the metal deposition step S220, it can preferably be used one of methods of a so-called Vacuum Evaporation (Vacuum Evaporation Coating, Vacuum Deposition) method in which evaporating molecules are attached to one surface of a low-temperature package plate thereby forming the metal layer 300 or a so-called sputtering method in which ionized gas atoms collide with one surface of a package plate thereby forming the metal layer 300 on a substrate. The metal layer 300 may be Cr/Au or a Cr/AuSu alloy.
The present invention is not limited to the above-described embodiments, and any person having ordinary skill in the art may perform various modifications without departing from the gist of the present invention claimed in the claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2019-0037650 | Apr 2019 | KR | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/KR2020/004091 | 3/26/2020 | WO | 00 |
