Patent Application
20180182343
The present invention relates to a technology of liquid crystal display, and more particularly, to a liquid crystal display and a data driver thereof.
With the evolution of optoelectronic and semiconductor technology, and development of flat panel display becomes more and more popular. In many types of flat panel displays, Liquid Crystal Display (LCD) has been applied to all aspects of life because of it's a lot of superior characteristics such as high space efficiency, low power consumption, no radiation low electromagnetic interference, etc.
Currently, a LCD with a display type of vertical alignment has a problem of color shift in a large angle of view. In order to solve the problem of color shift, a low color shift (LCS) is designed for the display type of vertical alignment, but it will reduce the LCD transmittance. In order to solve the problem of reducing LCD transmittance, a single color LCS is further designed for LCD, i.e., the LCS is designed for one color sub-pixel of R sub-pixel, G sub-pixel and B sub-pixel in the LCD. Thus, LCD transmittance of LCS designed for one color sub-pixel is higher than LCD transmittance of LCS designed for all three color of sub-pixels, and also provide LCS effect.
However, color shift phenomenon will be occurred in low grayscale in this LCD. Let us take a LCD incorporated with a LCS design with B-sub-pixel as an example, design of B sub-pixel is different to design of R sub-pixel and design of G sub-pixel, so as their capacitive coupling effects are also different. Thus, B sub-pixel will be shift toward brighter or dimmer in the same grayscale, so as problem of color shift occurred when the LCD displays.
In order to solve deficiencies of prior art, the purpose of the present invention is to provide a data driver of a LCD, which comprises: a digital-to-analog converter module; the digital-to-analog converter module receives data from a clock controller of LCD, and converts to generate pixel grayscale reference voltages; the digital-to-analog converter module receives first and second gamma voltages from a gamma circuit of the LCD, and generates the pixel grayscale voltages supplied to data lines of LCD in accordance with the pixel grayscale reference voltages and the first and second gamma voltages, and wherein the first and second gamma voltages can be regulated respectively.
Further, the LCD comprises: a plurality of color sub-pixels is arranged in m-by-n array; the color sub-pixels are red or green or blue sub-pixels; in the row direction, the red sub-pixel, the green sub-pixel and the blue sub-pixel are arranged sequentially and repeatedly, in the column direction, common color sub-pixels are arranged repeatedly; any two of the red sub-pixel, the green sub-pixel and the blue sub-pixel are four-domain sub-pixels, and the rest one is an eight-domain sub-pixel; the plurality (n) data lines are arranged along the column direction, and color sub-pixels arranged in each column connected to a corresponding data line; wherein the data lines connected to four-domain sub-pixels receive the pixel grayscale voltages generated by the digital-to-analog converter module in accordance with the pixel grayscale reference voltages and the first gamma voltages, and the data lines connected to eight-domain sub-pixels receive the pixel grayscale voltages generated by the digital-to-analog converter module in accordance with the pixel grayscale reference voltages and the second gamma voltages.
Further, the LCD comprises: a plurality of color sub-pixels is arranged in m-by-n array; the color sub-pixels are red or green or blue sub-pixels; in the row direction, the red sub-pixel, the green sub-pixel and the blue sub-pixel are arranged sequentially and repeatedly, in the column direction, common color sub-pixels are arranged repeatedly, any two of the red sub-pixel, the green sub-pixel and the blue sub-pixel are four-domain sub-pixels, and the rest one is an eight-domain sub-pixel; the plurality (n) data lines are arranged along the column direction, and color sub-pixels are arranged in each column connected to two corresponding and adjacent data lines alternately, wherein a data line only to be connected to four-domain sub-pixels is a first data line and a data line connected to four-domain sub-pixels and eight-domain sub-pixels is a second data line; the first data lines receive the pixel grayscale voltages generated by the digital-to-analog converter module in accordance with the pixel grayscale reference voltages and the first gamma voltages; and the second data lines receive the pixel grayscale voltages from the digital-to-analog converter module and which is generated from the pixel grayscale reference voltage and the first or second gamma voltage, based on whether the second data line connected to the four-domain pixels or the eight-domain pixels.
Further, when the second data lines supply pixel grayscale voltages to the four-domain sub-pixels connected to thereof, the second data lines receive the pixel grayscale voltages generated by the digital-to-analog converter module in accordance with the pixel grayscale reference voltages and the first gamma voltages; when the second data lines supply pixel grayscale voltages to the eight-domain sub-pixels connected to thereof, the second data lines receive the pixel grayscale voltages generated by the digital-to-analog converter module in accordance with the pixel grayscale reference voltages and the second gamma voltages.
Further, the data driver further comprises: a switching signal generating module is used to generate a switching signal to switch the first and second gamma voltages, when the second data lines supply pixel grayscale voltages to the four or eight-domain sub-pixels; wherein when the second data lines supply pixel grayscale voltages to the four-domain sub-pixels connected to thereof, the switching signal generating module generates a switching signal to switch the second gamma voltages to the first gamma voltages, the digital-to-analog converter module receives the first gamma voltages and generate pixel grayscale voltages in accordance with the pixel grayscale reference voltages and the first gamma voltages; and wherein when the second data lines supply pixel grayscale voltages to the eight-domain sub-pixels connected to thereof, the switching signal generating module generates a switching signal to switch the first gamma voltages to the second gamma voltages, the digital-to-analog converter module receives the second gamma voltages and generate pixel grayscale voltages in accordance with the pixel grayscale reference voltages and the second gamma voltages.
Another purpose of the present invention is to provide a data driver of a LCD, which comprises: a plurality (n) data lines is arranged along the column direction; a plurality of color sub-pixels is arranged in m-by-n array, and which arranged in each column are connected to a corresponding data line; a data driver, which comprises a digital-to-analog converter module, the digital-to-analog converter module receives data from a clock controller of LCD, and converts to generate pixel grayscale reference voltages, the digital-to-analog converter module receives first and second gamma voltages from a gamma circuit of the LCD, and generates the pixel grayscale voltages supplied to data lines of LCD in accordance with the pixel grayscale reference voltages and the first and second gamma voltages, and the first and second gamma voltages can be regulated respectively.
Advantages of the present invention: pixel grayscale voltages supplied to four-domain sub-pixels and eight-domain sub-pixels can be regulated respectively by arranging two gamma voltages which can be regulated respectively, so as to resolve the problem of color shift occurred when the LCD displays.
Technical implementation will be described below clearly and fully by combining with drawings made in accordance with an embodiment in the present invention.
Technical implementation will be described below clearly and fully by combining with drawings made in accordance with an embodiment in the present invention. Obviously, the described embodiments are merely part of embodiment of the present invention, not at all. Based on the embodiments of the present invention, on the premise of embodiments in the absence of creative work, all other embodiments are in the scope of protection in the present invention.
Referring
The LCD panel component 300 comprises a plurality of display signal lines and a plurality of color sub-pixels is arranged in m-by-n array which is connected to the display signal lines, i.e., the total number of the color sub-pixels is to multiply m by n. The LCD panel component 300 can comprise: a lower display panel and an upper display panel opposite to each other, both are not shown in figure, and a liquid crystal layer is inserted between the lower display panel and the upper display panel, which is not shown in figure. Herebelow, the color sub-pixels can be red sub-pixels R, blue sub-pixels B or green sub-pixels G, but it shall not be construed as a limitation to the present invention.
Display data lines can be arranged on the lower display panel, which can comprise a plurality of gate lines G1 to Gm for transmitting gate signals and a plurality of data lines D1 to Dn for transmitting data signals. The gate lines G1 to Gm are arranged extending to the row direction, and which are substantially parallel to each other. The data lines D1 to Dn are arranged extending to the column direction, and which are substantially parallel to each other.
Each color sub-pixel comprises: a switching device connected to the corresponding gate lines and data lines; and a liquid crystal capacitor connected to the switching device. If necessary, each color sub-pixel can also comprise a storage capacitor connected to the liquid crystal capacitor in parallel.
Each switching device of color sub-pixel is a three-terminal device, therefore it has a controlling terminal connected to the corresponding gate line, an input connected to the corresponding data line and an output connected to the corresponding liquid crystal capacitor.
The gate driver 400 is connected to the gate lines G1 to Gm, and supplies gate signals to the gate lines G1 to Gm. The gate signal is a combination of a gate-on voltage V0 and a cut-off voltage Voff supplied to the gate driver 400 from an external source. Referring to
The data driver 500 is connected to the data lines D1 to Dn of the LCD panel component 300 and supplies pixel grayscale voltages to the color sub-pixels. A clock controller 600 controls to operate the gate driver 400 and data driver 500.
The clock controller 600 receives input image signals from an external graphics controller (not shown in figure) and a plurality of input controlling signals used to control the input image signals to display. The clock controller 600 processes the input image signals appropriately in accordance with the controlling signals, so as to generate data DAT which are meet to operating conditions of the LCD panel component 300 to generate pixel grayscale reference voltages. Then the clock controller 600 generates gate controlling signals and data controlling signals, and transmits the gate controlling signals to each of the gate driver 400, and transmits the data controlling signals and the data DAT which generates the pixel grayscale reference voltages to the data driver 500.
The gate control signal CONT1 may comprise: scan start signals for operating the gate driver 400, i.e., a scanning operation; and at least one of pixel clock signal for controlling when to output the gate-on voltage V0. The gate control signals CONT1 may also comprise outputting an enable signal for regulating duration of the gate-on voltage V0.
The data controlling signal CONT2 may comprise: a horizontal sync start signal for indicating transmission the data DAT which generates the pixel grayscale reference voltages; a load signal for requesting to supply pixel grayscale voltages corresponding to the data DAT which generates the pixel grayscale reference voltages to the gate lines G1 to Gm; and a data clock signal. The data controlling signal CONT2 may also comprise an inverted signal for inverting the polarity of the pixel grayscale voltages with respect to common voltages Vcom.
The data driver 500 comprises: a digital-to-analog converter module 510. The digital-to-analog converter module 510 receives the data DAT from the clock controller 600 in response to the data controlling signal CONT2, and converts the data DAT which generates the pixel grayscale reference voltages to the pixel grayscale reference voltages. The data driver 500 receives the first and second gamma voltages from the gamma circuit 200 in response to the data controlling signal CONT2, and generates the pixel grayscale voltages in accordance with the pixel grayscale reference voltages and the first and second gamma voltages. Then the data driver 500 supplies data voltages to the data lines D1 to Dn.
The arrangement of the liquid crystal molecules varies depending on magnitude of pixel grayscale voltages, because of the polarity of light transmitted through a liquid crystal layer can also vary, resulting in the changes of the transmittance of the liquid crystal layer
Illustration and elaboration will be given herebelow in view of how the interconnections between different color sub-pixels and the data lines supply the pixel grayscale voltages to the data lines in accordance with the data driver 500 made according to the present invention.
Referring to
In the row direction, the red sub-pixel R, the green sub-pixel G and the blue sub-pixel B are arranged sequentially and repeatedly; in the column direction, common color sub-pixels are arranged repeatedly, i.e., common color sub-pixel can be the red sub-pixel R, the blue sub-pixel B and the green sub-pixel G.
Any two of the red sub-pixel R, the green sub-pixel G and the blue sub-pixel B are four-domain sub-pixels, and the rest one is an eight-domain sub-pixel. In the embodiment of the present invention, the red sub-pixel R and the green sub-pixel G are four-domain sub-pixels and the blue sub-pixel B is an eight-domain sub-pixel.
The interconnections between the m-by-n array sub-pixels and the D1 to Dn data lines are facilitated by normal pixel configuration, i.e., common colors in each column are interconnected to the corresponding data line Dj, wherein 1«j«n.
The data lines D1, D2, D4, D5, . . . , Dn−2, Dn−1 connected to four-domain sub-pixels (i.e., the red sub-pixel R and the green sub-pixel G) receive the pixel grayscale voltages generated by the digital-to-analog converter module 510 in accordance with the pixel grayscale reference voltages and the first gamma voltages; and the data lines D3, D6, . . . , Dn connected to eight-domain sub-pixels (i.e., the blue sub-pixel B) receive the pixel grayscale voltages generated by the digital-to-analog converter module 510 in accordance with the pixel grayscale reference voltages and the second gamma voltages.
Referring to
In the row direction, the red sub-pixel R, the green sub-pixel G and the blue sub-pixel B are arranged sequentially and repeatedly; in the column direction, the same color sub-pixels are arranged repeatedly, i.e., the same color sub-pixel can be the red sub-pixel R, the blue sub-pixel B and the green sub-pixel G.
Any two of the red sub-pixel R, the green sub-pixel G and the blue sub-pixel B are four-domain sub-pixels, and the rest one is an eight-domain sub-pixel. In the embodiment of the present invention, the red sub-pixel R and the green sub-pixel G are four-domain sub-pixels and the blue sub-pixel B is an eight-domain sub-pixel.
The interconnections between the m-by-n array sub-pixels and the D1 to Dn data lines are facilitated by flip pixel configuration, i.e., common colors in each column are interconnected to two of the corresponding and adjacent data line Dj−1 and Dj, wherein 1«j«n.
Data lines only to be connected to four-domain sub-pixels (i.e., the red sub-pixel R and/or the green sub-pixel G) are data lines D1, D4, D7, . . . , Dn−2, and the data lines D1, D4, D7, . . . , Dn−2 receive the pixel grayscale voltages generated by the digital-to-analog converter module 510 in accordance with the pixel grayscale reference voltages and the first gamma voltages.
Data lines connected to four-domain sub-pixels and eight-domain sub-pixels (i.e., a data line is connected to the red sub-pixel R and the blue sub-pixel B, and a data line is connected to the green sub-pixel G and the blue sub-pixel B) are data lines D2, D3, D5, D6, . . . , Dn−1, Dn, and the data lines D2, D3, D5, D6, . . . , Dn−1, Dn receive the pixel grayscale voltages from the digital-to-analog converter module 510 and which is generated from the pixel grayscale reference voltage and the first or second gamma voltage, based on whether the second data line connected to the four-domain pixels or the eight-domain pixels.
Specifically, when the data lines D2, D3, D5, D6, . . . , Dn−1, Dn supply pixel grayscale voltages to the four-domain sub-pixels connected to thereof, the data lines D2, D3, D5, D6, . . . , Dn−1, Dn receive the pixel grayscale voltages generated by the digital-to-analog converter module 510 in accordance with the pixel grayscale reference voltages and the first gamma voltages; when the data lines D2, D3, D5, D6, . . . , Dn−1, Dn supply pixel grayscale voltages to the eight-domain sub-pixels connected to thereof, the data lines D2, D3, D5, D6, . . . , Dn−1, Dn receive the pixel grayscale voltages generated by the digital-to-analog converter module in accordance with the pixel grayscale reference voltages and the second gamma voltages.
In order to achieve switching between the first and the second gamma voltages, referring to
Referring to
In connection with the data lines D2, D5, D8, . . . , Dn−1, when the data lines D2, D5, D8, . . . , Dn−1 supply the pixel grayscale reference voltages to color sub-pixels of odd-rows, the switching signal generating module 520 generates a switching signal to switch the second gamma voltages to the first gamma voltages, the data lines D2, D5, D8, . . . , Dn−1 receive the pixel grayscale voltages generated by the digital-to-analog converter module 510 in accordance with the pixel grayscale reference voltages and the first gamma voltages and the generated pixel grayscale voltages is supplied to the red sub-pixel G; when the data lines D2, D5, D8, . . . , Dn−1 supply the pixel grayscale reference voltages to color sub-pixels of even-rows, the switching signal generating module 520 generates a switching signal to switch the first gamma voltages to the second gamma voltages, the data lines D2, D5, D8, . . . , Dn−1 receive the pixel grayscale voltages generated by the digital-to-analog converter module 510 in accordance with the pixel grayscale reference voltages and the first gamma voltages and the generated pixel grayscale voltages is supplied to the red sub-pixel B.
In connection with the data lines D3, D6, D9, . . . , Dn, when the data lines D3, D6, D9, . . . , Dn supply the pixel grayscale reference voltages to color sub-pixels of odd-rows, the switching signal generating module 520 generates a switching signal to switch the second gamma voltages to the first gamma voltages, the data lines D3, D6, D9, . . . , Dn receive the pixel grayscale voltages generated by the digital-to-analog converter module 510 in accordance with the pixel grayscale reference voltages and the first gamma voltages and the generated pixel grayscale voltages is supplied to the red sub-pixel B; when the data lines D3, D6, D9, . . . , Dn supply the pixel grayscale reference voltages to color sub-pixels of even-rows, the switching signal generating module 520 generates a switching signal to switch the first gamma voltages to the second gamma voltages, the data lines data lines D3, D6, D9, . . . , Dn receive the pixel grayscale voltages generated by the digital-to-analog converter module 510 in accordance with the pixel grayscale reference voltages and the first gamma voltages and the generated pixel grayscale voltages is supplied to the red sub-pixel R.
In summary, pixel grayscale voltages supplied to four-domain sub-pixels and eight-domain sub-pixels can be regulated respectively by arranging two gamma voltages which can be regulated respectively, so as to resolve the problem of color shift occurred when the LCD displays.
Embodiments of the present invention have been described, but not intending to impose any unduly constraint to the appended claims. Any modification of equivalent structure or equivalent process made according to the disclosure and drawings of the present invention, or any application thereof, directly or indirectly, to other related fields of technique, is considered encompassed in the scope of protection defined by the claims of the present invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201610495221.X | Jun 2016 | CN | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2016/099509 | 9/21/2016 | WO | 00 |
