Liquid crystal TV set and liquid crystal display unit

Abstract
Disclosed are a liquid crystal display unit and a liquid crystal TV set, each of which has a sequence circuit 13 that includes first, second, and third voltage output units. The sequence circuit 13, upon the turning-on of the power to the liquid crystal display unit 11, supplies the first, second, and third output voltages to a liquid crystal display panel 11c in this order and stops supply of the third, second, and first output voltages in this order upon the turning-off of the power to the liquid crystal display unit 11. Consequently, the display screen is prevented from the noise that is otherwise generated on the screen.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

It is to be understood that the drawings are to be used for the purposes of exemplary illustration only and not as a definition of the limits of the invention. Throughout the disclosure, the word “exemplary” is used exclusively to mean “serving as an example, instance, or illustration.” Any embodiment described as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.


Referring to the drawings in which like reference character(s) present corresponding parts throughout:



FIG. 1 is a schematic block diagram of a configuration of a liquid crystal TV set in a first embodiment of the present invention;



FIG. 2 is a diagram of a sequence circuit in the first embodiment of the present invention;



FIG. 3 is a diagram of a conventional sequence circuit; and



FIG. 4 is a block diagram of a configuration of the sequence circuit in the first embodiment of the present invention.





DETAILED DESCRIPTION OF THE INVENTION

Hereunder, a preferred embodiment of the present invention will be described in the following order.


(1) Configuration of liquid crystal TV set
(2) Sequence circuit
(3) Conclusion
(1) Configuration of Liquid Crystal TV Set

Hereunder, an embodiment of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows a schematic block diagram of a configuration of a liquid crystal TV set of the present invention.


In FIG. 1, the liquid crystal TV set 11 includes a microcomputer 11a for controlling the operation of the whole body; a tuner 11b for extracting TV broadcasting signals of a selected channel from TV broadcasting signals received through an antenna and outputting the extracted signals; a picture processor 11d for displaying pictures on a liquid crystal display panel 11c according to the TV broadcasting signals output from the tuner 11b; a voice processor 11f for outputting voices from a speaker 11e according to the TV broadcasting signals output from the tuner 11b; a remote control receiver 11h for receiving operation commands sent from a remote controller 11g; and a power supply circuit 12 for supplying a supply voltage to each unit of the liquid crystal TV set 11.


The micro computer 11a controls each unit of the liquid crystal TV set by outputting such control signals as P-ON-H (a first power-on-signal) and P-25V-ON (a second power-on-signal) according to control commands received by the remote control receiver 11h.


The power supply circuit 12 is supplied an external commercial power (e.g. AC100V) and converts the supplied voltage to various types of voltages to be supplied to each unit of the liquid crystal TV set 11 as operation powers. Particularly, the liquid crystal display panel 11c is supplied a supply voltage from the power supply circuit 12 through the sequence circuit 13. The sequence circuit 13 generates plural types of voltages on the basis of the plurality types of voltages supplied from the power supply circuit 12 upon the turning-on of the liquid crystal TV set and supplies those voltages to the liquid crystal display panel 11c in a predetermined sequence. Upon the turning-off of the liquid crystal TV set, the sequence circuit stops the voltage supply to the liquid crystal display panel in a predetermined sequence. The power supply circuit 12 is supplied an external power (e.g., AC100V).


(2) Sequence Circuit


FIG. 2 shows a sequence circuit 13 for supplying plural types of voltages to the liquid crystal display panel 11c in this embodiment in a predetermined sequence and stops the voltage supply. The sequence circuit 13 generates plural types of voltages from plural types of voltages supplied from the power supply circuit 12 and supplies the generated voltages to the liquid crystal display panel 11c and stops the voltage supply in a predetermined sequence respectively. In FIG. 2, units and parts unnecessary for sequence controlling are omitted.


In FIG. 2, the sequence circuit 13 includes transistors Q513, Q517, Q509, Q505, Q505′, Q511, Q502, and Q501, resistors R520, R516, R517, R518, R513, R511, R512, R508, R534, R509, R522, R552, R532, R527, R510, R505, R504, and R528, and Zener diodes D507, D519, D503, and D502. The sequence circuit 13 is supplied 3.3V, 21V, −8V, 13V, and 40V through 3.3V, 21V, −8V, 13V, and 40V lines respectively.


The 3.3V line inputs 3.3V and outputs the 3.3V as is to the liquid crystal display panel 11c.


The transistor Q513 is an NPN type one and its base is grounded through a capacitor C508 and its base is connected to its emitter through the resistor R520. The transistor Q513 is self-biased and turned on with −8V inputted to its emitter through the −8V line. The transistor Q513 functions as the first transistor and the 3.3V is equivalent to the first input voltage and the 3.3V line functions as the first voltage output part.


The transistor Q507 (model No.: KRC103M) is an epitaxial planar NPN type transistor. Its emitter is grounded. The Q507 is turned on with a high level P-ON-H signal inputted to its base through the resistor R513. The transistor Q507 functions as the second transistor. The P-ON-H signal is a control signal that enters the high level (predetermined voltage) upon the turning-on of the liquid crystal TV set and enters the low level (0V) upon the turning-off of the liquid crystal TV set. The signal is output from the microcomputer 11a.


The Zener diode D519 (model No.: MTZJ-36B) has an anode connected to the collector of the transistor Q513 through the resistor R517 and a cathode connected to the collector of the transistor Q507 through the resistors R518 and R511. This Zener diode D519 is broken down, for example, at 36V. While this sequence circuit is active, about 48V is applied to the resistors R512 and R518, the Zener diode D519, the resistor R517, and the emitter-collector line of the transistor Q513 respectively, so that about 40V is applied to the Zener diode D519. Upon the stop of the supply of about 40V, the Zener diode D519 begins discharging in the inverted direction (e.g., through the Zener diode D507). At this time, however, the breakdown stops at 36V, so that the base of the transistor Q509 comes to be disconnected from the ground electrically at the time of discharging equivalent to a voltage drop of a little under 4V. In other words, after the supply voltage from the 40V line to the transistor Q509 is stopped, the transistor Q509 can be turned off quickly. This “quickly” means that the time is shorter than a time required to lower the 40V to a voltage for turning off the transistor Q509. The Zener diode D519 functions as the first Zener diode.


The transistor Q509 is a PNP type transistor and its base is connected to the cathode of the Zener diode D519 and its emitter is connected to its base through the resistor R512. The emitter is supplied 40V through the 40V line. The transistor Q509 functions as the third transistor.


The transistor Q505 is an NPN type transistor and its base is connected to the collector of the transistor Q509 through the resistor R508 and its emitter is grounded through the resistor R522, and its collector is supplied 13V and 21 V in parallel through the resistors R509 and R534 respectively. The transistor Q505 functions as the fourth transistor and the 13V and 21V supplied in parallel are converted to the second input voltage.


The transistor Q505′ is an NPN type transistor and its base is connected to the collector of the transistor Q509 through the resistor R508, its emitter is grounded through the resistor R522, and its collector is supplied 13V and 21V in parallel through the resistors R509 and R534 respectively The transistor Q505 functions as the fifth transistor. The collectors of the transistors Q505 and Q505′ are connected to each other to output 10.8V to the liquid crystal display panel in parallel to the resistor R522. Consequently, the 10.8V becomes equivalent to the second output voltage and the transistors Q513, Q507, Q509, Q505, and Q505′, the resistors R516, R520, R517, R518, R511, R513, R512, R518, R509, R534, and R522, the Zener diodes D519, D503, and D507 are combined to form the second voltage output unit.


The Zener diode D503 has a cathode connected to the bases of the transistors Q505 and Q505′ and a grounded anode. The Zener diode D503 has a Zener voltage for controlling so that the voltage applied to the bases of the transistors Q505 and Q505′ do not exceed a predetermined value.


The transistor Q511 is an epitaxial planar NPN type transistor and its emitter is grounded. The Q511 is turned on with a high level P-25V-ON signal inputted to its base. The P-25V-ON signal is a control signal that enters the high level (predetermined voltage) upon the turning-on of the power to the liquid crystal TV set 11 and enters the low level (0V) upon the turning-off of the power. The control signal is output from the microcomputer 11a later than the P-ON-H signal. The transistor Q511 functions as the sixth transistor.


The transistor Q502 is a PNP type transistor and its base is connected to the collector of the transistor Q511 and its emitter is connected to its base through the resistor R527. The emitter is supplied 40V from the 40V line through the resistor R552. The transistor Q502 functions as the seventh transistor.


The transistor Q501 is an NPN type transistor and its collector is connected to the emitter of the transistor Q502 through the resistor R505 and its base is connected to the collector of the transistor Q501 through the resistor R504, and its emitter is grounded through the resistor R528 and outputs 25V to the liquid crystal display panel 11c in parallel to the resistor R528. The transistor Q501 functions as the eighth transistor.


The Zener diode D502 has a cathode connected to the base of the transistor Q501 and a grounded anode. The Zener diode D502 has a Zener voltage for controlling so as to fix the voltage applied to the base of the transistor Q501. The Zener diode D502 functions as the third Zener diode. Consequently, the 40V is equivalent to the third input voltage and the 25V is equivalent to the third output voltage. The transistors Q511, Q502, and Q501, the resistors R552, R527, R510, R505, R504, and R528, the Zener diodes D502 are combined to form the third voltage output unit.


Next, a description will be made for the operation of the sequence circuit upon the turning-on of the liquid crystal TV set 11 and the beginning of the voltage supply from the power supply circuit 12. In FIG. 2, upon the turning-on of the liquid crystal TV set 11 and the beginning of the voltage supply from the power supply circuit 12, the voltages 3.3V, 21V, −8V, 13V, and 40V are supplied to the sequence circuit 13.


The inputted 3.3V is output to the liquid crystal display panel 11c as is (sequence 101). Then, the −8V is applied to the emitter of the transistor Q513 and the transistor Q513 is self-biased and turned on (sequence 102). Consequently, −8V is supplied to the resistor through the emitter-collector line of the Q513 and −6V is supplied to the liquid crystal display panel 11c through the resistor R517.


The −8V is also supplied to the base of the transistor Q509 through the resistor R517, the Zener diode D519, and the resistor R518. At that time, the emitter of the transistor Q509 is also supplied 40V from the power supply circuit 12.


Here, the collector of the transistor Q507 is connected to the other terminal of the R511 connected to the base of the transistor Q509 in parallel to the resistor R518 and the emitter of the transistor Q507 is grounded. And the base of the transistor Q507 inputs the P-ON-H signal.


Then, the transistor Q509 is turned on (sequence 103) and a voltage is supplied to the bases of the transistors Q505 and Q505′ through the resistor R508 from the 40V line respectively. At this time, the Zener diode D503 breaks down, thereby the voltage applied to the bases of the transistors Q505 and Q505′ is lowered to a predetermined voltage. In other words, this Zener diode D503 controls so that the base voltages of both the transistors Q505 and Q505′ do not exceed a voltage over the transistor resistance, thereby transistor choices are increased and the cost is reduced.


Upon applying a voltage to the transistors Q505 and Q505′, the transistor Q505 is turned on (sequence 104), then the transistor Q505′ is also turned on (sequence 105). Then, the voltages supplied through the 13V and 21V lines are lowered to 10.8V through the resistors R509 and R534 respectively and the 10.8V is output to the liquid crystal display panel 11c.


On the other hand, the transistor Q502 of which emitter is applied 40V through the resistor R552 is self-biased through the resistor R527, thereby it is turned on (sequence 106). Then, 40V is supplied to the resistor R505 through the emitter-collector line of the transistor Q502 and a voltage is applied to the base of the transistor Q501, thereby the transistor Q501 is turned on. Then, the 25V is output to the liquid crystal display panel 11c through the emitter-collector line of the transistor Q501. At this time, a voltage matching with the transistor resistance is applied to the base of the transistor Q501 through the Zener diode D502 just like the transistors Q505 and Q505′.


Next, a description will be made for the operation of the sequence circuit upon the turning-off of the liquid crystal display unit. In FIG. 3, upon the turning-off of the liquid crystal display unit and the stop of the voltage supply from the power supply, the voltage supply to the liquid crystal display panel is stopped in the following sequence.


Upon the stop of the voltage supply, at first the base of the transistor Q511 enters the low level (0V) with the P-25V-ON signal, so that the transistor Q511 is turned off. Consequently, the transistors Q502 and Q501 are turned off (sequence 111). Thus the supply of 25V to the liquid crystal display panel is stopped.


Then, the P-ON-H signal applied to the base of the transistor Q507 enters the low level (0V) and the transistor Q507 is turned off. After that, a current is kept flowing to the ground through the resistor R518 and the Zener diode D519. While the current flows, the transistor Q509 is kept on, thereby the transistors Q505 and Q505′ are also kept on and 10.8V is kept output.


At this time, upon the stop of the voltage supply from the power supply circuit, discharging of the 40V that has been applied begins. Then, the 40V is lowered to 36V, so that the Zener diode D519 is not broken down any more and no potential difference is generated in the resistor R512 through which the transistor Q519 is self-biased. Thus the transistor Q519 is turned off. Then, the transistors Q505 and Q505′ are also turned off to stop the 10.8V output (sequence 112). The time until the 10.8V output is stopped is short as described above and the time can be adjusted so as to stop the 10.8V output later than the 25V stop and earlier than the −6V stop by selecting the breakdown voltage of the Zener diode D519 properly.


The timing for generating this sequence 112 can be changed as needed by adjusting the breakdown voltage of the Zener diode D519. To set this sequence 112 earlier than the sequence 113 to be described later, it is just needed to change the breakdown voltage from 36V to a value closer to 40V. Such way, it is possible to connect the cathode of the Zener diode having a grounded anode to the base of a transistor to be turned off later than a desired timing.


Then, upon the stop of the voltage supply including 3.3V from the power supply circuit, the transistor Q510 is turned off, then the transistor Q513 is turned off and the −6V output is stopped (sequence 13). After that, due to the inserted diode D519, the 10.8V supply is stopped (sequence 112) earlier than the −6V supply stop (sequence 113), thereby the charge remaining problem of the circuit for supplying supply voltages to the liquid crystal display panel is eliminated and the supply of supply voltages is stopped in a normal sequence. In other words, the screen of the liquid crystal display panel is prevented from the noise that is otherwise generated upon the stop of the supply voltages.


The 3.3V corresponds to the first input voltage, the −8V corresponds to the second input voltage, the 30V corresponds to the third input voltage, the 13V and the 21V correspond to the fourth input voltage, the 3.3V corresponds to the first output voltage, the −6V corresponds to the second output voltage, the 10.8V corresponds to the third output voltage, the 25V corresponds to the fourth output voltage.


The first resistor corresponds to the R520, the second resistor corresponds to the R518, the third resistor corresponds to the R511, the fourth resistor corresponds to the R512, the fifth resistor corresponds to the R508, the sixth resistor corresponds to the R522 or a set of R501, R502 and R503, the seventh resistor corresponds to the R509, the eighth resistor corresponds to the R527, the ninth resistor corresponds to the R504, the tenth resistor corresponds to the R505, the eleventh resistor corresponds to the R528, the first Zener diode corresponds to the D505, the second Zener diode corresponds to the D503 and the third Zener diode corresponds to the D502.


(3) Conclusion

As described above, the liquid crystal TV set 11 includes the first voltage output unit for inputting 3.3V from the power supply circuit 12 and outputting the 3.3V; the second voltage output unit for inputting 13V and 21V in parallel from the power supply circuit 12 and outputting 10.8V; and the third voltage output unit for inputting 40V from the power supply circuit 12 and outputting 25V And upon the turning-on of the TV set, 3.3V, 10.8V, and 25V are inputted to the liquid crystal display panel 11c in this order. Upon the turning-off of the liquid crystal TV set 11, the supply of 25V, 10.8V, and 3.3V is stopped in this order.


While the preferred embodiment of the present invention has been described, it is to be understood that modifications will be apparent to those skilled in the art without departing from the spirit of the invention. However, the following cases will also be included in the embodiment described above:

    • An invention achieved by changing any combination of the mutually replaceable units, parts, and configurations disclosed in the above embodiment as the occasion may demand
    • An invention achieved by replacing the units, parts, and configurations that are mutually replaceable with those disclosed in the above embodiment, as well as changing any combination of those, although they are not disclosed in the above embodiment, but included in known techniques as the occasion may demand
    • An invention achieved by replacing the units, parts, and configurations disclosed in the above embodiment with the units, parts, and configurations that are supposed as substitutes of those or changing any combination of those according to a known technique that is not disclosed in the above embodiment


The detailed description set forth below in connection with the appended drawings is intended as a description of presently preferred embodiments of the invention and is not intended to represent the only forms in which the present invention can be constructed and or utilized.


Although the invention has been described in considerable detail in language specific to structural features and or method acts, it is to be understood that the invention defined in the appended claims is not necessarily limited to the specific features or acts described. Rather, the specific features and acts are disclosed as preferred forms of implementing the claimed invention. Therefore, while exemplary illustrative embodiments of the invention have been described, numerous variations and alternative embodiments will occur to those skilled in the art.


In addition, reference to “first,” “second,” “third,” and etc. members throughout the disclosure (and in particular, claims) is not used to show a serial or numerical limitation but instead is used to distinguish or identify the various members of the group.

Claims
  • 1. A liquid crystal TV set, comprising: a tuner that receives a TV broadcast and extracts a TV broadcasting signal from the TV broadcast, and that output the TV broadcasting signal;a picture processor for displaying a picture on a liquid crystal display panel according to the TV broadcasting signal output from the tuner;a voice processor for outputting a voice from a speaker according to the TV broadcasting signal output from the tuner;a power supply circuit for supplying various types of supply voltages;a microcomputer for controlling an operation of the TV set;the TV set includes a sequence circuit for generating various types of voltages on the basis of various types of voltages output from the power supply circuit and supplying the generated voltages to the liquid crystal display panel in a predetermined sequence;
  • 2. A liquid crystal display unit for inputting a supply voltage from a power supply circuit and displaying a picture on a liquid crystal display panel according to an inputted picture signal; comprising the display unit includes a sequence circuit that generates various levels of voltages using various levels voltages output from the power supply circuit and supplies the generated voltages to the liquid crystal display panel in a predetermined sequence;
  • 3. The liquid crystal display unit according to claim 2;
  • 4. The liquid crystal display unit according to claim 3;
Priority Claims (1)
Number Date Country Kind
JP2006-110108 Apr 2006 JP national