Patent Application
20190213953
This U.S. non-provisional patent application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2018-0001883, filed on Jan. 5, 2018, the contents of which are hereby incorporated by reference in its entirety.
The present disclosure relates to display devices capable of controlling a luminance of a display image.
An organic light emitting diode display (OLED) device is a self-emissive flat panel display device. An OLED device may have advantages of wide viewing angle and superior contrast ratio when compared with a liquid crystal display device. In addition, the OLED device may have advantages of thin thickness, light weight, and low power consumption.
In a case that the OLED device displays a specific pattern, i.e., a still image without motion (a freeze image), for a long time, the still image acts as a stress pattern, and as a result, an organic light emitting diode or a thin film transistor is easily deteriorated. The deterioration of the organic light emitting diode or the thin film transistor causes a stain like a DC afterimage and reduces a display quality and a lifespan of the OLED device.
According to an aspect of the embodiments of the present invention, there is provided a luminance control circuit including a target luminance gain calculator calculating a target luminance gain based on an average luminance of a first image signal when the first image signal is determined to be a still image, an output luminance gain calculator calculating an output luminance gain based on a previous output luminance gain of a previous frame and the target luminance gain of a present frame, and a luminance scaler outputting a second image signal obtained by changing a luminance of the first image signal based on the output luminance gain.
The target luminance gain calculator outputs the target luminance gain that lineally depends upon the average luminance.
The target luminance gain (TLG) is obtained based on equation TLG=MRR+(1−APL)×MRR. The “APL” denotes the average luminance and the “MRR” denotes a luminance reduction coefficient. The “MRR” and the “APL” satisfy respectively the relations of MRR≤1 and APL≤1.
The luminance control circuit further includes a still image determination unit determining whether the first image signal is the still image and outputting a still image flag signal.
The luminance control circuit further includes an average luminance calculator calculating the average luminance of the first image signal when the still image flag signal is transited to a second level from a first level and maintains the target luminance gain while the still image flag signal is maintained at the second level.
The luminance control circuit further includes a luminance gain storage unit to store the previous output luminance gain.
The output luminance gain (OLG) is obtained based on equation OLG=decay weight (DW)×TLG−(1−DW)×PLG, and the decay weight (DW) is obtained based on equation DW=|PLG−TLG|×DR+DB. The “PLG” denotes the previous output luminance gain, the “TLG” denotes the target luminance gain, the “DR” denotes a decay rate, and the “DB” denotes a decay bias. The “PLG”, the “TLG”, the “DR”, and the “DB” satisfy respectively relations of PLG≤1, TLG≤1, DR<1, and DB<1.
The second image signal (RGB2) is obtained based on equation RGB2=RGB1×OLG. The “RGB1” denotes the first image signal.
The target luminance gain calculator calculates the target luminance gain based on the average luminance of the first image signal when the first image signal is determined to be the still image.
According to an aspect of the embodiments of the present invention, there is provided a display device including a display panel including a plurality of pixels and a driving circuit receiving an input image signal, providing a data signal corresponding to an output image signal to the pixels, and controlling the pixels to display an image. The driving circuit includes an image signal processing circuit converting the input image signal to the output image signal. The image signal processing circuit includes a gamma converter converting the input image signal to a first image signal, a target luminance gain calculator calculating a target luminance gain based on an average luminance of the first image signal when the first image signal is determined to be a still image, an output luminance gain calculator calculating an output luminance gain based on a previous output luminance gain of a previous frame and the target luminance gain of a present frame, a luminance scaler outputting a second image signal obtained by changing a luminance of the first image signal based on the output luminance gain, and a gamma inverse converter converting the second image signal to the output image signal.
The target luminance gain calculator outputs the target luminance gain in proportion to the average luminance such that a luminance of the second image signal is lower than the luminance of the first image signal when the first image signal is determined to be a still image.
The target luminance gain (TLG) is obtained based on equation TLG=MRR+(1−APL)×MRR. The “APL” denotes the average luminance and the “MRR” denotes a luminance reduction coefficient. The “MRR” and the “APL” satisfy respectively the relations of MRR≤1 and APL≤1.
The display device further includes a still image determination unit determining whether the first image signal is the still image and outputting a still image flag signal.
The display device further includes an average luminance calculator calculating the average luminance of the first image signal. The target luminance gain calculator calculates the target luminance gain based on the average luminance when the still image flag signal has a first level.
The display device further includes a luminance gain storage unit to store the previous output luminance gain.
The second image signal (RGB2) is obtained based on equation RGB2=RGB1×OLG. The “RGB1” denotes the first image signal, and the “OLG” denotes the output luminance gain.
According to an aspect of the embodiments of the present invention, there is provided a display device including a display panel including a plurality of pixels, a backlight unit supplying a light to the display panel in response to a backlight control signal, and a driving circuit receiving an input image signal, providing a data signal corresponding to an output image signal to the pixels to display an image through the pixels, and outputting the backlight control signal in response to the input image signal. The driving circuit includes a backlight control circuit outputting the backlight control signal to control the light output from the backlight unit. The backlight control circuit includes a gamma converter converting the input image signal to a first image signal, a target luminance gain calculator calculating a target luminance gain based on an average luminance of the first image signal when the first image signal is determined to be a still image, an output luminance gain calculator calculating an output luminance gain based on a previous output luminance gain of a previous frame and the target luminance gain of a present frame, and a backlight luminance calculator outputting the backlight control signal based on the output luminance gain to control the light output from the backlight unit.
The backlight luminance calculator outputs the backlight control signal to allow the backlight unit to output the light having a luminance in proportion to the output luminance gain.
The display device further includes a still image determination unit determining whether the first image signal is the still image and outputting a still image flag signal.
The display device further includes an average luminance calculator calculating the average luminance of the first image signal. The target luminance gain calculator calculates the target luminance gain based on the average luminance when the still image flag signal has a first level.
According to the above, the display device changes the luminance of the image signal gradually when the display image is determined to be a still image. Image burn-in and deteriorating of the display device may be reduced, while the user's perception with respect to the change of the luminance of the display image is reduced.
Illustrative, non-limiting example embodiments will be more clearly understood from the following detailed description in conjunction with the accompanying drawings.
Hereinafter, exemplary embodiments of the present disclosure will be explained in detail with reference to the accompanying drawings.
Referring to
The display panel 110 may be one of various display panels, such as a liquid crystal display panel, an organic light emitting display panel, an electrophoretic display panel, an electrowetting display panel, etc. In a case that the liquid crystal display is employed as the display panel 110, the display device 100 further includes a backlight unit to supply a light to the display panel 110.
The display panel 110 includes a plurality of gate lines GL1 to GLn extending in a first direction DR1, a plurality of data lines DL1 to DLm extending in a second direction DR2, and a plurality of pixels PX arranged in areas defined by the gate lines GL1 to GLn and the data lines DL1 to DLm that crosses the gate lines GL1 to GLn. The data lines DL1 to DLm are insulated from the gate lines GL1 to GLn while crossing the gate lines GL1 to GLn. Each of the pixels is connected to a corresponding gate line of the gate lines GL1 to GLn and a corresponding data line of the data lines DL1 to DLm.
The driving circuit 105 receives an input image signal RGB and provides data signals corresponding to an output image signal RGB′ to the pixels PX through the data lines DL1 to DLm of the display panel 110 to display an image through the pixels PX.
The driving circuit 105 includes a timing controller 120, a gate driver 130, and a data driver 140. The timing controller 120 receives the input image signal RGB and controls signals CTRL from an external source (not shown). The control signals CTRL include, for example, a vertical synchronization signal, a horizontal synchronization signal, a main clock signal, a data enable signal, etc. The timing controller 120 applies the output image signal RGB′ and a first control signal CONT1 to the data driver 140. The timing controller 120 applies a second control signal CONT2 to the gate driver 130. The output image signal RGB′ is obtained by processing the input image signal RGB by taking into account an operating condition of the display panel 110 based on the control signals CTRL. The first control signal CONT1 includes a horizontal synchronization start signal, a clock signal, and a line latch signal. The second control signal CONT2 includes a vertical synchronization start signal, an output enable signal, and a gate pulse signal. The timing controller 120 may convert and output the output image signal RGB′ in various ways depending on the alignment of the pixels PX and a display frequency of the display panel 110.
The gate driver 130 drives the gate lines GL1 to GLn in response to the second control signal CONT2 from the timing controller 120. The gate driver 130 includes a gate driving integrated circuit. In some embodiments, the gate driver 130 may be implemented in a circuit with an oxide semiconductor, an amorphous semiconductor, a crystalline semiconductor, a polycrystalline semiconductor, or the like. The gate driver 130 may be formed in a predetermined area of the display panel 110; in this case, the gate driver 130 may be substantially simultaneously formed with the pixels PX through a thin film process.
The data driver 140 drives the data lines DL1 to DLm in response to the output image signal RGB′ and the first control signal CONT1 received from the timing controller 120.
Referring to
The image signal processing circuit 210 outputs the output image signal RGB′ based on the input image signal RGB provided from the external source (not shown). The control signal generating circuit 220 outputs the first control signal CONT1 and the second control signal CONT2 based on the control signals CTRL provided from the external source (not shown). The first control signal CONT1 includes the horizontal synchronization start signal, the clock signal, and the line latch signal. The second control signal CONT2 includes the vertical synchronization start signal, the output enable signal, and the gate pulse signal.
When the display panel 110 is an organic light emitting display panel, the quality of the images displayed on the display panel 110 may be influenced by the deterioration of the organic light emitting diodes and/or the thin film transistors in the display panel 110. For example, when an OLED display devices displays a still image (e.g., an image without motion, which is also known as a freeze image) for a long time, the organic light emitting diodes and/or the thin film transistors in some of the pixels may experience higher stress than those in other pixels. As a result, the stressed organic light emitting diodes and/or the thin film transistors may get deteriorated faster than others and may have noticeably different electrical properties and/or optical properties. One consequence of such uneven change among different pixels is that a DC afterimage (in the form of a stress pattern similar to a still image) may appear in the display panel. The stress caused by the still image may reduce a display quality and a lifespan of the OLED display device. In some exemplary embodiments of the present disclosure, the driving circuit 105 can be implemented to gradually decrease a luminance of the display image while the input image signal RGB is determined to be a still image.
In one exemplary embodiment as shown in
Referring to
The input image signal RGB includes red grayscale data, green grayscale data, and blue grayscale data. The gamma converter 310 linearizes the input image signal RGB having non-linear characteristics and outputs a first image signal RGB1. In some embodiments, the gamma converter 310 linearizes the input image signal RGB based on a gamma look-up table (not shown) to output the first image signal RGB1. The gamma look-up table can be implemented to store luminance data that depends on a reference gamma value. As an example, the reference gamma value may be about 2.2.
The luminance control circuit 320 outputs a second image signal RGB2 obtained by controlling a luminance of the first image signal RGB1 when the first image signal RGB1 is determined to be a still image. The luminance control circuit 320 includes a target luminance gain calculator 322, an output luminance gain calculator 324, and a luminance scaler 326. The target luminance gain calculator 322 is implemented to calculate a target luminance gain TLG based on an average luminance of the first image signal RGB1 when the first image signal RGB1 is determined to be a still image. The output luminance gain calculator 324 is implemented to calculate an output luminance gain OLG based on a previous output luminance gain PLG of a previous frame and a target luminance gain TLG of a present frame. The luminance scaler 326 is implemented to output the second image signal RGB2 obtained by changing the luminance of the first image signal RGB1 based on the output luminance gain OLG.
The luminance control circuit 320 further includes a still image determination unit 321, an average luminance calculation unit 323, and a luminance gain storage unit 325.
The still image determination unit 321 is implemented to determine whether the first image signal RGB1 is a still image and to output a still image flag signal S accordingly. In one embodiment, the still image determination unit 321 compares the first image signal RGB1 of the previous frame with the first image signal RGB1 of the present frame and determines that the first image signal RGB1 of the present frame is a still image when a difference between the first image signal RGB1 of the previous frame and the first image signal RGB1 of the present frame is equal to or smaller than a predetermined value. According to another embodiment, the still image determination unit 321 compares a portion of the first image signal RGB1 of the previous frame with the same portion of the first image signal RGB1 of the present frame (which correspond to a predetermined area of the display panel 110 as shown in
When it is determined that the first image signal RGB1 of the present frame is a still image, the still image determination unit 321 outputs the still image flag signal S at a first level (e.g., a high level).
The average luminance calculation unit 323 receives the first image signal RGB1 and calculates an average luminance APL of one frame. The average luminance APL of one frame may be calculated by the following Equation 1.
In Equation 1, one first image signal RGB1 includes a red signal, a green signal, and a blue signal, and R, G, and B respectively correspond to the red signal, the green signal, and the blue signal of the first image signal RGB1. “N” denotes the number of the first image signals RGB1 included in one frame.
The average luminance APL calculated by the average luminance calculation unit 323 is provided to the target luminance gain calculator 322.
The target luminance gain calculator 322 calculates the target luminance gain TLG that is used to determine the amount of reduction on the luminance of the first image signal RGB1 based on the average luminance APL when the still image flag signal S from the still image determination unit 321 is at the first level. As the average luminance APL becomes higher (i.e., as the luminance of the display image becomes higher), the thin film transistors in the display panel 110 may be subjected to higher level of stress. Accordingly, the target luminance gain calculator 322 is implemented to calculate the target luminance gain TLG such that the amount of luminance reduction increases as the average luminance APL becomes higher.
The target luminance gain TLG calculated by the target luminance gain calculator 322 may be obtained by the following Equation 2.
TLG=MRR+(1−APL)*MRR Equation 2
In Equation 2, “MRR” denotes a luminance reduction coefficient provided from the external source (not shown) (or stored in a memory (not shown) of the luminance control circuit 320. “APL” denotes the average luminance calculated by the average luminance calculation unit 323.
In a first example, when the luminance reduction coefficient MRR is about 0.5 and the average luminance APL is about 1 (e.g., the highest grayscale), the target luminance gain TLG is about 0.5. In a second example, when the luminance reduction coefficient MRR is about 0.5 and the average luminance APL is about 0.5 (e.g., an intermediate grayscale), the target luminance gain TLG is about 0.75. As demonstrated by the results of the target luminance gain TLG in the above two examples, when the average luminance APL increases from 0.5 to 1.0, the target luminance gain TLG decreases from 0.75 to 0.5, which represents an increase in the amount of luminance reduction.
The output luminance gain calculator 324 calculates the output luminance gain OLG based on a previous output luminance gain PLG of the previous frame and the target luminance gain TLG of the present frame.
The luminance gain storage unit 325 stores the target luminance gain TLG of the present frame and provides the previous output luminance gain PLG of the previous frame to the output luminance gain calculator 324.
In the previously described examples, when the luminance reduction coefficient MRR is about 0.5 and the average luminance APL is about 1, the target luminance gain TLG obtained by the target luminance gain calculator 322 is about 0.5. In this example, the luminance of the image displayed through the display panel 110 can be reduced by up to about 50% of the luminance of the first image signal RGB1.
When the luminance of the still image is rapidly changed while the still image is displayed through the display panel 110, the user may perceive a sudden change of the luminance. Accordingly, to prevent such sudden change of the luminance, the output luminance gain calculator 324 calculates the output luminance gain OLG by taking into account not only the target luminance gain TLG of the present frame but also the previous output luminance gain PLG of the previous frame.
The output luminance gain calculator 324 calculates the output luminance gain OLG by the following Equation 3.
DW=|(PLG−TLG)|*DR+DB
OLG=DW*TLG−(1−DW)*PLG Equation 3
In Equation 3, “DW” denotes a decay weight, “DR” denotes a decay rate, and “DB” denotes a decay bias.
The decay rate DR and the decay bias DB may be values provided from the external source (not shown) or stored in the memory (not shown) of the luminance control circuit 320.
As represented by Equation 3, the output luminance gain OLG is determined based on the decay weight DW, the target luminance gain TLG of the present frame, and the previous output luminance gain PLG of the previous frame.
The luminance scaler 326 outputs the second image signal RGB2 obtained by changing the luminance of the first image signal RGB1 based on the output luminance gain OLG
The luminance scaler 326 calculates the second image signal RGB2 by the following Equation 4.
RGB2=RGB1*OLG Equation 4
Accordingly, when the first image signal RGB1 is determined to be a still image, the luminance control circuit 320 may output the second image signal RGB2 that has luminance decreasing gradually over several frames.
The gamma inverse converter 330 non-linearizes the second image signal RGB2 based on an output gamma look-up table (not shown) calculated using an inverse gamma function of the gamma look-up table (not shown) to output the output image signal RGB′. As an example, in a case that the gamma look-up table of the gamma converter 310 is formed by the gamma function having the gamma value of about 2.2, the output gamma look-up table of the gamma inverse converter 330 may be formed by the inverse gamma function corresponding to the gamma value of about 2.2. The output gamma look-up table may store grayscale data calculated by the inverse gamma function of the gamma look-up table.
Referring to
The output luminance gain calculator 324 calculates the output luminance gain OLG by taking into account not only the target luminance gain TLG of the present frame but also the previous output luminance gain PLG of the previous frame. Accordingly, the output luminance gain calculator 324 outputs the output luminance gain OLG such that the luminance of the second image signal RGB2 gradually changes (e.g., in a decay shape) from the luminance of the first image signal RGB1 to the luminance corresponding to the target luminance gain TLG.
When the still image flag signal S is transited to the second level (e.g., the low level) from the first level (e.g., the high level), the target luminance gain calculator 322 outputs “1” as the target luminance gain TLG. Since the change in the target luminance gain TLG is large when the first image signal RGB1 has changed from a still image to a moving image, the output luminance gain calculator 324 is implemented to gradually change the output luminance gain OLG
Since the output luminance gain calculator 324 calculates the output luminance gain OLG by taking into account not only the target luminance gain TLG of the present frame but also the previous output luminance gain PLG of the previous frame, the luminance of the image displayed through the display panel 110 may be prevented from being rapidly changed even though the first image signal RGB1 has changed from a still image to a moving image.
Referring to
A timing controller 420 of the driving circuit 405 applies a backlight control signal CONT3 to the backlight unit 450 to control the backlight unit 450. The backlight unit 450 supplies a light to the display panel 410 in response to the backlight control signal CONT3.
In some embodiments, when an input image signal RGB is determined to be a still image, the timing controller 420 outputs the backlight control signal CONT3 that gradually decreases a luminance of the light output from the backlight unit 450. Accordingly, the luminance of the display image decreases while the still image is displayed through the display panel 410, and thus power consumption may be reduced.
Referring to
The image signal processing circuit 510 converts the input image signal RGB from an external source (not shown) to an output image signal RGB′ appropriate to the display panel 410 (refer to
The backlight control circuit 520 outputs the backlight control signal CONT3 to gradually decrease (becomes darker) the luminance of the light provided from the backlight unit 450 when the input image signal RGB from the external source is determined to be a still image. The backlight control circuit 520 outputs the backlight control signal CONT3 to the backlight unit 450 to make the luminance of the light provided from the backlight unit 450 gradually increase (becomes brighter) when the input image signal RGB is changed to the video image from the still image.
The control signal generating circuit 530 outputs a first control signal CONT1 and a second control signal CONT2 based on control signals CTRL provided from the external source.
Referring to
The gamma converter 610 linearizes the input image signal RGB based on a gamma look-up table (not shown) to output a first image signal RGB1.
The luminance control circuit 620 outputs an output luminance gain OLG used to control the luminance of the backlight unit 450 (refer to
The luminance control circuit 620 further includes a still image determination unit 621, an average luminance calculation unit 623, and a luminance gain storage unit 625.
The still image determination unit 621 determines whether the first image signal RGB1 is a still image and outputs a still image flag signal S accordingly. In one embodiment, the still image determination unit 621 compares the first image signal RGB1 of the previous frame with the first image signal RGB1 of the present frame and determines that the first image signal RGB1 of the present frame is a still image when a difference between the first image signal RGB1 of the previous frame and the first image signal RGB1 of the present frame is equal to or smaller than a predetermined value. According to another embodiment, the still image determination unit 621 compares a portion of the first image signal RGB1 of the previous frame with a portion of the first image signal RGB1 of the present frame (which correspond to a predetermined area of the display panel 410 as shown in
The average luminance calculation unit 623 receives the first image signal RGB1 and calculates the average luminance APL of one frame. The average luminance APL of one frame may be calculated by the above-mentioned Equation 1.
The average luminance APL calculated by the average luminance calculation unit 623 is applied to the target luminance gain calculator 622.
The target luminance gain calculator 622 calculates the target luminance gain TLG based on the average luminance APL when the still image flag signal S from the still image determination unit 621 has the first level. As the average luminance APL becomes higher (i.e., as the luminance of the display image becomes higher), the power consumption in the display device 400 increases. Accordingly, the target luminance gain calculator 622 is implemented to calculate the target luminance gain TLG such that an amount of luminance reduction increases as the average luminance APL becomes higher.
The target luminance gain TLG calculated by the target luminance gain calculator 622 may be obtained by the above-described Equation 2.
The output luminance gain calculator 624 calculates the output luminance gain OLG based on the previous output luminance gain PLG of the previous frame and the target luminance gain TLG of the present frame.
The luminance gain storage unit 625 stores the target luminance gain TLG of the present frame and provides the previous output luminance gain PLG of the previous frame to the output luminance gain calculator 624.
When the luminance of the still image is rapidly changed while the still image is displayed through the display panel 410, the user may perceive a sudden change of the luminance. Accordingly, to prevent such sudden change of the luminance, the output luminance gain calculator 624 calculates the output luminance gain OLG by taking into account not only the target luminance gain TLG of the present frame but also the previous output luminance gain PLG of the previous frame.
The output luminance gain calculator 624 calculates the output luminance gain OLG using the above-described Equation 3.
The backlight luminance calculator 630 outputs the backlight control signal CONT3 based on the output luminance gain OLG to control the luminance of the backlight unit 450.
Accordingly, when the first image signal RGB1 is determined to be a still image, the backlight luminance calculator 630 outputs the backlight control signal CONT3 such that the luminance of the light generated by the backlight unit 450 gradually decreases over several frames.
Additionally, when the first image signal RGB1 is determined to be changed to a moving image from a still image, the backlight control circuit 520 outputs the backlight control signal CONT3 such that the luminance of the light generated by the backlight unit 450 gradually increases, to minimize the user's perception on the luminance change in the displayed images.
Although the exemplary embodiments of the present invention have been described, it is understood that the present invention should not be limited to these exemplary embodiments but various changes and modifications can be made by one ordinary skilled in the art within the spirit and scope of the present invention as hereinafter claimed.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2018-0001883 | Jan 2018 | KR | national |
