1. Field of the Invention
The field of the invention relates to microelectromechanical systems (MEMS).
2. Description of the Related Art
Microelectromechanical systems (MEMS) include micro mechanical elements, actuators, and electronics. Micromechanical elements may be created using deposition, etching, and or other micromachining processes that etch away parts of substrates and/or deposited material layers or that add layers to form electrical and electromechanical devices. One type of MEMS device is called an interferometric modulator. As used herein, the term interferometric modulator or interferometric light modulator refers to a device that selectively absorbs and/or reflects light using the principles of optical interference. In certain embodiments, an interferometric modulator may comprise a pair of conductive plates, one or both of which may be transparent and/or reflective in whole or part and capable of relative motion upon application of an appropriate electrical signal. In a particular embodiment, one plate may comprise a stationary layer deposited on a substrate and the other plate may comprise a metallic membrane separated from the stationary layer by an air gap. As described herein in more detail, the position of one plate in relation to another can change the optical interference of light incident on the interferometric modulator. Such devices have a wide range of applications, and it would be beneficial in the art to utilize and/or modify the characteristics of these types of devices so that their features can be exploited in improving existing products and creating new products that have not yet been developed.
The system, method, and devices of the invention each have several aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope of this invention, its more prominent features will now be discussed briefly. After considering this discussion, and particularly after reading the section entitled “Detailed Description of Certain Embodiments” one will understand how the features of this invention provide advantages over other display devices.
One embodiment disclosed herein includes a method of estimating power consumption by a display, comprising measuring capacitance of one or more pixels in the display and determining power consumed by the one or more pixels based on the measured capacitance.
Another embodiment disclosed herein includes a method of estimating power consumption by a display comprising a plurality of interferometric modulators, the method including determining if one or more of the interferometric modulators are in an actuated state or an unactuated state, applying a voltage stimulus to the one or more interferometric modulators, and measuring current to the one or more interferometric modulators that results from the voltage stimulus.
Another embodiment disclosed herein includes a computer-implemented method of modeling power consumed by a display depicting an image, including providing the image as input and determining power consumed by the display while the image is displayed by modeling each pixel with a capacitor, wherein pixels that are off are assigned a different capacitance than pixels that are on.
Another embodiment disclosed herein includes a system for modeling power consumed by a display depicting an image, including a processor and a computer readable medium coupled to the processor and comprising instructions for modeling power consumed by a display by modeling pixels in the display with capacitors, wherein pixels that are off are assigned a different capacitance than pixels that are on.
Another embodiment disclosed herein includes a system for estimating power consumption by a display, including means for measuring a capacitance of at least one pixel in the display and means for predicting power consumed by the display when an image is displayed using the capacitance.
Another embodiment disclosed herein includes a display manufactured by a process that includes forming a plurality of interferometric modulators on a substrate, forming electrical connections to the interferometric modulators, and connecting one or more of the electrical connections to a current sense circuit.
Another embodiment disclosed herein includes a system for measuring power consumed by a display, including an image driver adapted to drive pixels in the display such that a series of images are displayed by the display, a timer adapted to control the amount of time that each image in the series of images is displayed, a voltage sense circuit adapted to measure the voltages applied to the display during display of each image, a current sense circuit adapted to measure the current flowing to or from the display during display of each image, and a power computation module adapted to determine the power consumed by the display while each image is displayed.
Another embodiment disclosed herein includes a method for measuring power consumed by a display, including displaying a series of images on the display and determining power consumed by the display during display of the series of images.
Another embodiment disclosed herein includes a computer-readable medium storing instructions that when executed perform the method the includes reading an image and determining power consumed by a display while the image is displayed on the display by modeling each pixel in the display with a capacitor, wherein pixels that are off are assigned a different capacitance than pixels that are on.
The following detailed description is directed to certain specific embodiments of the invention. However, the invention can be embodied in a multitude of different ways. In this description, reference is made to the drawings wherein like parts are designated with like numerals throughout. As will be apparent from the following description, the embodiments may be implemented in any device that is configured to display an image, whether in motion (e.g., video) or stationary (e.g., still image), and whether textual or pictorial. More particularly, it is contemplated that the embodiments may be implemented in or associated with a variety of electronic devices such as, but not limited to, mobile telephones, wireless devices, personal data assistants (PDAs), hand-held or portable computers, GPS receivers/navigators, cameras, MP3 players, camcorders, game consoles, wrist watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and/or displays, display of camera views (e.g., display of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry). MEMS devices of similar structure to those described herein can also be used in non-display applications such as in electronic switching devices.
As use of displays in mobile devices become more widespread and such devices have increasing functionality, it is desirable to have displays that have low power consumption. Furthermore, it is desirable to estimate the power consumed by such displays during display of various images so that the power requirements of the mobile devices can be accurately understood and accommodated. Accordingly, methods are provided for determining the power consumed by a given display, including power consumed by pixels that are on or off and of different colors. A system is provided for accurately measuring the power. Furthermore, methods and systems are provided that model the power consumed by a given image displayed on the display.
One interferometric modulator display embodiment comprising an interferometric MEMS display element is illustrated in
The depicted portion of the pixel array in
The optical stacks 16a and 16b (collectively referred to as optical stack 16), as referenced herein, typically comprise of several fused layers, which can include an electrode layer, such as indium tin oxide (ITO), a partially reflective layer, such as chromium, and a transparent dielectric. The optical stack 16 is thus electrically conductive, partially transparent and partially reflective, and may be fabricated, for example, by depositing one or more of the above layers onto a transparent substrate 20. In some embodiments, the layers are patterned into parallel strips, and may form row electrodes in a display device as described further below. The movable reflective layers 14a, 14b may be formed as a series of parallel strips of a deposited metal layer or layers (orthogonal to the row electrodes of 16a, 16b) deposited on top of posts 18 and an intervening sacrificial material deposited between the posts 18. When the sacrificial material is etched away, the movable reflective layers 14a, 14b are separated from the optical stacks 16a, 16b by a defined gap 19. A highly conductive and reflective material such as aluminum may be used for the reflective layers 14, and these strips may form column electrodes in a display device.
With no applied voltage, the cavity 19 remains between the movable reflective layer 14a and optical stack 16a, with the movable reflective layer 14a in a mechanically relaxed state, as illustrated by the pixel 12a in
In one embodiment, the processor 21 is also configured to communicate with an array driver 22. In one embodiment, the array driver 22 includes a row driver circuit 24 and a column driver circuit 26 that provide signals to a panel or display array (display) 30. The cross section of the array illustrated in
In typical applications, a display frame may be created by asserting the set of column electrodes in accordance with the desired set of actuated pixels in the first row. A row pulse is then applied to the row 1 electrode, actuating the pixels corresponding to the asserted column lines. The asserted set of column electrodes is then changed to correspond to the desired set of actuated pixels in the second row. A pulse is then applied to the row 2 electrode, actuating the appropriate pixels in row 2 in accordance with the asserted column electrodes. The row 1 pixels are unaffected by the row 2 pulse, and remain in the state they were set to during the row 1 pulse. This may be repeated for the entire series of rows in a sequential fashion to produce the frame. Generally, the frames are refreshed and/or updated with new display data by continually repeating this process at some desired number of frames per second. A wide variety of protocols for driving row and column electrodes of pixel arrays to produce display frames are also well known and may be used in conjunction with the present invention.
In the
The display device 40 includes a housing 41, a display 30, an antenna 43, a speaker 45, an input device 48, and a microphone 46. The housing 41 is generally formed from any of a variety of manufacturing processes as are well known to those of skill in the art, including injection molding, and vacuum forming. In addition, the housing 41 may be made from any of a variety of materials, including but not limited to plastic, metal, glass, rubber, and ceramic, or a combination thereof. In one embodiment the housing 41 includes removable portions (not shown) that may be interchanged with other removable portions of different color, or containing different logos, pictures, or symbols.
The display 30 of exemplary display device 40 may be any of a variety of displays, including a bi-stable display, as described herein. In other embodiments, the display 30 includes a flat-panel display, such as plasma, EL, OLED, STN LCD, or TFT LCD as described above, or a non-flat-panel display, such as a CRT or other tube device, as is well known to those of skill in the art. However, for purposes of describing the present embodiment, the display 30 includes an interferometric modulator display, as described herein.
The components of one embodiment of exemplary display device 40 are schematically illustrated in
The network interface 27 includes the antenna 43 and the transceiver 47 so that the exemplary display device 40 can communicate with one ore more devices over a network. In one embodiment the network interface 27 may also have some processing capabilities to relieve requirements of the processor 21. The antenna 43 is any antenna known to those of skill in the art for transmitting and receiving signals. In one embodiment, the antenna transmits and receives RF signals according to the IEEE 802.11 standard, including IEEE 802.11(a), (b), or (g). In another embodiment, the antenna transmits and receives RF signals according to the BLUETOOTH standard. In the case of a cellular telephone, the antenna is designed to receive CDMA, GSM, AMPS or other known signals that are used to communicate within a wireless cell phone network. The transceiver 47 pre-processes the signals received from the antenna 43 so that they may be received by and further manipulated by the processor 21. The transceiver 47 also processes signals received from the processor 21 so that they may be transmitted from the exemplary display device 40 via the antenna 43.
In an alternative embodiment, the transceiver 47 can be replaced by a receiver. In yet another alternative embodiment, network interface 27 can be replaced by an image source, which can store or generate image data to be sent to the processor 21. For example, the image source can be a digital video disc (DVD) or a hard-disc drive that contains image data, or a software module that generates image data.
Processor 21 generally controls the overall operation of the exemplary display device 40. The processor 21 receives data, such as compressed image data from the network interface 27 or an image source, and processes the data into raw image data or into a format that is readily processed into raw image data. The processor 21 then sends the processed data to the driver controller 29 or to frame buffer 28 for storage. Raw data typically refers to the information that identifies the image characteristics at each location within an image. For example, such image characteristics can include color, saturation, and gray-scale level.
In one embodiment, the processor 21 includes a microcontroller, CPU, or logic unit to control operation of the exemplary display device 40. Conditioning hardware 52 generally includes amplifiers and filters for transmitting signals to the speaker 45, and for receiving signals from the microphone 46. Conditioning hardware 52 may be discrete components within the exemplary display device 40, or may be incorporated within the processor 21 or other components.
The driver controller 29 takes the raw image data generated by the processor 21 either directly from the processor 21 or from the frame buffer 28 and reformats the raw image data appropriately for high speed transmission to the array driver 22. Specifically, the driver controller 29 reformats the raw image data into a data flow having a raster-like format, such that it has a time order suitable for scanning across the display array 30. Then the driver controller 29 sends the formatted information to the array driver 22. Although a driver controller 29, such as a LCD controller, is often associated with the system processor 21 as a stand-alone Integrated Circuit (IC), such controllers may be implemented in many ways. They may be embedded in the processor 21 as hardware, embedded in the processor 21 as software, or fully integrated in hardware with the array driver 22.
Typically, the array driver 22 receives the formatted information from the driver controller 29 and reformats the video data into a parallel set of waveforms that are applied many times per second to the hundreds and sometimes thousands of leads coming from the display's x-y matrix of pixels.
In one embodiment, the driver controller 29, array driver 22, and display array 30 are appropriate for any of the types of displays described herein. For example, in one embodiment, driver controller 29 is a conventional display controller or a bi-stable display controller (e.g., an interferometric modulator controller). In another embodiment, array driver 22 is a conventional driver or a bi-stable display driver (e.g., an interferometric modulator display). In one embodiment, a driver controller 29 is integrated with the array driver 22. Such an embodiment is common in highly integrated systems such as cellular phones, watches, and other small area displays. In yet another embodiment, display array 30 is a typical display array or a bi-stable display array (e.g., a display including an array of interferometric modulators).
The input device 48 allows a user to control the operation of the exemplary display device 40. In one embodiment, input device 48 includes a keypad, such as a QWERTY keyboard or a telephone keypad, a button, a switch, a touch-sensitive screen, a pressure- or heat-sensitive membrane. In one embodiment, the microphone 46 is an input device for the exemplary display device 40. When the microphone 46 is used to input data to the device, voice commands may be provided by a user for controlling operations of the exemplary display device 40.
Power supply 50 can include a variety of energy storage devices as are well known in the art. For example, in one embodiment, power supply 50 is a rechargeable battery, such as a nickel-cadmium battery or a lithium ion battery. In another embodiment, power supply 50 is a renewable energy source, a capacitor, or a solar cell, including a plastic solar cell, and solar-cell paint. In another embodiment, power supply 50 is configured to receive power from a wall outlet.
In some implementations control programmability resides, as described above, in a driver controller which can be located in several places in the electronic display system. In some cases control programmability resides in the array driver 22. Those of skill in the art will recognize that the above-described optimization may be implemented in any number of hardware and/or software components and in various configurations.
The details of the structure of interferometric modulators that operate in accordance with the principles set forth above may vary widely. For example,
In embodiments such as those shown in
Power Consumption in Interferometric Modulator Displays
With reference to
where C is the capacitance, ε is the permittivity of the material between the two conductive plates, A is the area of the plates, and D is the distance between the plates. In the unactuated interferometric modulators, the conductive mirror 14a is separated from conductor 16a by a gap that is larger than the gap between conductive mirror 14b and conductor 16b in actuated interferometric modulators. Accordingly, the capacitance of actuated interferometric modulators is larger than unactuated interferometric modulators.
In one embodiment, a significant source of power consumption in an interferometric modulator display is from capacitive charging of the actuated and unactuated interferometric modulators. Because the capacitance of actuated and unactuated interferometric modulators is different, power consumption in an interferometric modulator will vary depending upon the image displayed in a given frame. As discussed further below, the frame content difference in power consumption is due both to the numbers of actuated and unactuated interferometric modulators as well as the location of the respective pixels within the image.
In one embodiment, power consumed by pixels in an on state is determined separately from power consumed by pixels in an off state. In one embodiment, power consumed by on or off pixels is determined by measuring power consumed by a single on or off pixel. In another embodiment, power consumed by an entire row or column of on or off pixels is measured in order to determine the average power consumed by a single on or off pixel. In one embodiment, power consumed by all the pixels in a display being on or off are measured in order to determine the average power consumed by a single on or off pixel. In one embodiment, the power consumed by one or more pixels is measured by applying a voltage step to the pixels and measuring the resulting current. In one embodiment, the resulting current is measured over a period of time. Integrating the current and multiplying by the value of the voltage step will provide the power consumed according to the following:
P=Vs∫T0i(t)dt
where Vs is the magnitude of the voltage step (assuming a constant voltage), i(t) is the resulting current as a function of time, and T is the period of time over which the power is determined. In some embodiments of an interferometric modulator display, Vs is 2Vbias. As described in more detail below, the most significant contribution to power consumption in interferometric modulator displays is voltage switching on the column lines, which typically are transitions from +Vbias to −Vbias and vice versa. Accordingly, using a test voltage step of 2Vbias will provide a measure of the power consumed by pixels exposed to typical voltage switching on the column lines.
In another embodiment, the pixels are assumed to behave like an ideal capacitor. Accordingly, two or more current values may be obtained at different times and then fit to the expected response for an ideal capacitor to determine the capacitance and/or power consumed by the pixels. For example, in one embodiment, the current peak is measured after application of the voltage step and then a second current value is recorded after an amount of elapsed of time. The current response observed after application of a voltage step is depicted in
P=Vsipeak∫T0e−t/τdt=Vsipeakτ(1−e−T/τ)
where Vs is the magnitude of the voltage step, ipeak is the value of the peak current after the current step, T is a time period over which the power is desired, and τ is the relaxation time. Those of skill in the art will appreciate that power and capacitance values may be determined by applying any number of voltage or current stimuli and then measuring the resulting current or voltage, respectively.
In one embodiment, current resulting from applying a voltage stimulus may be determined using a current sense amplifier. An example of a circuit for implementing a current sense amplifier is depicted in
In an alternative embodiment, the current sense amplifier may be placed between the line selectors 102 and 106 and the display. In this embodiment, the current sense amplifier may be simultaneously coupled to all rows and/or columns. However, current will only flow through the rows and/or columns that are selected by line selectors 102 and 106. In one embodiment, multiple current sense amplifier circuits are provided between the line selectors 102 and 106 and the display. Thus, for example, a current sense amplifier may be provided for each row and/or column.
In embodiments where the display includes subpixels having different colors, capacitance and/or power values may be determined for the on and off states of each color subpixel. For example, in some interferometric modulator displays, the number of interferometric modulators for each color subpixel will differ from other color subpixels in order to provide a desired color balance. Accordingly, each color subpixel will have different capacitance values from other color subpixels in the same state due to the increase area of the conductive surfaces. Furthermore, the gap in unactuated interferometric modulators will differ for different colors resulting in different capacitance values.
In one embodiment, prior to determining the capacitance and/or power consumption of one or more pixels, the state of the pixels are determined so that it is known what state is being probed. Accordingly, as depicted in the flow chart in
In one embodiment, the systems and methods discussed above are used to test a display wafer prior to packaging into a system to determine whether the wafer is suitable for use as a display or not. If the measured power characteristics are not as desired, the wafer can be discarded prior to incurring the expense of incorporating the wafer into a system. In one embodiment, devices are manufactured on the wafer to facilitate testing. For example, the line selectors 102 and 106 may be manufactured on the display wafer. In one embodiment, the line selectors 102 and 106 include buss bars connecting multiple leads to test pads for contact with testing electronics. In one embodiment, a current sense circuit, such as depicted in
In another embodiment, the systems and methods described above may be implemented into a display system to test the power consumption of the display while the device is in use. Such an implementation may be used to indicate problems with the display as well as to provide an indication of the power needs of the display to facilitate power distribution within the device.
Determining Power Consumption during Display of Images
In one embodiment, power consumed by images being displayed on a display is determined. In one embodiment, a series of images are displayed on the display. Power consumption may be determined during display of each image. In one embodiment, instantaneous power consumption at any time during display of the image is determined. In another embodiment, power consumed during display of each frame of each image is determined. In another embodiment, average power consumption during display of each image is determined. In another embodiment, average power consumption during display of the entire series of images in determined. In one embodiment, determining power consumption includes measuring current flow to or from the display during display of the images. Any suitable current sense circuit may be used. For example, the current sense amplifier described above may be used. In one embodiment, the voltages applied to the display during display of the images are also measured and the measured voltage and current is used to compute power consumption. Alternatively, the voltages applied to the display may be determined from the voltages applied by an image driver used to drive the display. In one embodiment, the amount of time that each image is displayed during display of the series of images is varied.
The above-described method for determining power consumption is advantageously used to determine power consumption by an interferometric modulator display. As discussed in more detail below, power consumption by an interferometric modulator display is highly image content dependent. Therefore, applying a series of images provides a more accurate estimation of power consumption during use of the display than measuring power consumption during display of a single image.
Modeling Power Consumption in Displays
In one embodiment, power consumption in a display is modeled by representing each pixel as a capacitor, where pixels that are on (e.g., unactuated interferometric modulators) and pixels that are off (e.g., actuated interferometric modulators) have different capacitance values. Capacitance values of on and off pixels may be determined as discussed above or by any suitable method known to those of skill in the art. An image containing information of the state of each pixel may then be provided and an estimate of power consumption during display of the image for one or more frames determined based on the capacitance of each pixel and the voltage driving scheme applied to the pixels.
As discussed above with reference to
In general, power consumed by voltage switching on a given column (e.g., the j-th column) may be determined from:
where i identifies a particular row, j identifies a particular column, NS is the number of voltage switches on the column line during a frame, T is the time period for display of the frame, Cij is the capacitance of the column during the i-th voltage switching, and VS is the magnitude of the voltage switching. The capacitance Cij may be determined from:
Cij=Nup ijCup+Ndown ijCdown
where Nup ij is the number of pixels in the j-th column that are in the up state during the i-th voltage switching, Ndown ij is the number of pixels in the down state during the i-th voltage switching, Cup is the capacitance of pixels in the up state, and Cdown is the capacitance of pixels in the down state. Cup and Cdown may be determined by any suitable method, such as the voltage step methods described above or calculated based on the properties of the materials in the pixel. As noted earlier, in some embodiments, Vs will be 2Vbias (i.e., the magnitude of voltage switching from +Vbias to −Vbias or vice versa).
In some embodiments, particularly where the image does not change significantly between frames, the power of a column may be approximated by:
where Cj is the capacitance of the j-th column and NSj is the number of voltage switching events on the j-th column during the frame. In this expression, the capacitance of the j-th column is given by:
Cj=Nup jCup+Ndown jCdown
which assumes that the content of the column (i.e., as determined by Nup j and Ndown j) does not change from one switching event to the next.
The power consumed by the entire display during one frame may be determined by summing over all of the columns:
where Ncol is the number of columns in the display.
It will be appreciated that the power consumed by any given column depends significantly on the content of the column (e.g., as determined by Nup j and Ndown j) as well as the content of other parts of the image which affects the number of voltage switches required on the column (e.g., NS j). Accordingly, in one embodiment, a computer-implemented method is provided for estimating power consumed by a display, such as an interferometric modulator display, where the method includes providing an image or a series of images as input and then determining the power consumed during one or more frames by the display. In some embodiments, the algorithms for determining the power models pixels and/or subpixels in the display with capacitors, where pixels and/or subpixels that are on are assigned a different capacitance value than pixels that are off. In some embodiments, the algorithm calculates power consumed be each column in the display. In some embodiments, the algorithm calculates power consumed by each column during each voltage switch on the column. In some embodiments, power is determined while less than the entire image is updated during a frame refresh. In some embodiments, the algorithm includes instructions for reading and processing images or a series of images.
To implement the above described algorithms, a processor or graphics processor may be provided coupled to a computer readable medium that stores instructions for executing the algorithm. The processor may be part of a general purpose computer or be significantly dedicated to executing the algorithms. For example, a processor may be incorporated within a display package for calculating power consumption and then making decisions regarding management of frame refreshes. In some embodiments, different rows are updated at different rates in order to reduce power consumption. In other embodiments, the display resolution can be coarsened to reduce the power by reducing the number of columns that need to be voltage switched. The system and methods described above may be used to estimate the power consumption required for the next image or series of images to be displayed and then decide whether to reduce power consumption by updating only portions of the display or by changing the frequency of updating various rows or the frequency of frame refreshes in general. In some embodiments, the display may be switched to different power consumption modes based on the predicted future power requirements for images displayed on the display and the power available from a power source. Various modes useful for reducing power in interferometric modulator displays are disclosed in co-pending U.S. application Ser. No. 11/097,827, filed on Apr. 1, 2005, which is incorporated herein by reference in its entirety. In one embodiment, the time to drainage of the power source may be displayed to the user based on the power consumption predicted using the above methods and systems.
One example of a method for estimating future power consumption and adjusting the power consumption mode accordingly is depicted in
The computer readable medium may be any suitable medium such as magnetic media, optical media, or semiconductor media. In various embodiments, the computer readable media is a disk drive, a compact disk, or RAM. In some embodiments, a user interface is provided that facilitates a user providing images to the algorithm and that can display results of the power calculations to the user. Furthermore, in some embodiments, the user interface enables the user to provide display parameters such as the number of rows in the display, the number of columns in the display, the capacitance of bright and dark state pixels, the voltage scheme employed by the display, the frame rate, etc. In various embodiments, the user interface includes both software and hardware components such as a keyboard, mouse, monitor, printer, and graphical interface. Such embodiments allow a developer to use a computer to predict power consumption needs during development of a display device.
To demonstrate the effect of image content on power consumption, power consumption was predicted for various images displayed on a 160 pixel×160 pixel monochrome interferometric modulator display. The bright state (unactuated) pixels were modeled as capacitors having a capacitance of 0.71 pF. The dark state (actuated) pixels were modeled as capacitors having a capacitance of 10.8 pF. The frame rate used was 1 s per frame. Vbias was 5 volts (e.g., the switching voltage on the columns was 10 volts).
As depicted in
As can be seen in
As depicted in
As can be seen in
The updating of a 4×4 checkerboard image as an Example 1 to the new image depicted in
The capacitance of columns 1-40 and 81-160 is the same as that for the columns in Examples 1 and 2 (C=80 pixels×0.71 pF+80 pixels×10.8 pF=921 pF). In contrast, the capacitance for columns 41-80 is determined by C=120 pixels×0.71 pF+40 pixels+10.8 pF=517.2 pF (i.e., 120 pixels in a bright state (unactuated) and 40 pixels in a dark state (actuated)). As noted above, the number of voltage switches for each column was one (i.e., NS=1) and the amplitude of the voltage switching was 10 V. Accordingly, using the formulas described above, the power consumed during one frame with the indicated partial updating was calculated to be 6.6 μW, which is significantly less than the 22.1 μW for a total frame refresh calculated in Example 1. Accordingly, modeling can be used to determine power savings for partial display refresh during certain image content transitions.
Although the invention has been described with reference to embodiments and examples, it should be understood that numerous and various modifications can be made without departing from the spirit of the invention. Accordingly, the invention is limited only by the following claims.
This application claims priority to U.S. Provisional Application No. 60/613,537, filed on Sep. 27, 2004, which is incorporated herein by reference in its entirety.
Number | Date | Country | |
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60613537 | Sep 2004 | US |