Semiconductor device geometries have dramatically decreased in size since their introduction several decades ago. Modern semiconductor fabrication equipment routinely produces devices with 45 nm, 32 nm, and 28 nm feature sizes, and new equipment is developed and implemented to make devices with even smaller geometries. The decreased feature sizes result in structural features on the device having decreased spatial dimensions.
The widths of gaps (or trenches) on the device narrow, and therefore the aspect ratio of gap depth to its width is high, which results in a difficulty in filling the gaps with a material (e.g. a dielectric material) deposited on the device. The deposited material is prone to clog at the top of the gaps, which produces voids in the gaps.
For a more complete understanding of the embodiments, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings.
The making and using of the embodiments of the disclosure are discussed in detail below. It should be appreciated, however, that the embodiments can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative, and do not limit the scope of the disclosure.
It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. Moreover, the performance of a first process before a second process in the description that follows may include embodiments in which the second process is performed immediately after the first process, and may also include embodiments in which additional processes may be performed between the first and second processes. Various features may be arbitrarily drawn in different scales for the sake of simplicity and clarity. Furthermore, the formation of a first feature over or on a second feature in the description that follows include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact.
Some variations of the embodiments are described. Throughout the various views and illustrative embodiments, like reference numbers are used to designate like elements.
In some embodiments, various methods are developed to avoid having a material (e.g. a dielectric material) clogging the top of a gap, or to “heal” the void or seam that has been formed. One method includes forming highly flowable precursor materials (in a liquid phase) to a spinning substrate surface. These flowable precursors can flow into and fill very small substrate gaps without forming voids. The method is described in detail below.
The plasma source 110 is positioned on a lid (or a conductive top portion) 170 to connect an inlet opening 172 of the lid 170 so as to connect the chamber plasma region 120 in the lid 170. The plasma source 110 is configured to provide plasma to the chamber plasma region 120. The flow directions of the plasma are shown as arrows P in
The diffuser 150 is disposed in the chamber plasma region 120 close to the inlet opening 172 to diffuse the plasma from the plasma source 110 uniformly. The lid 170 may be above the showerhead 140. An insulating ring 180 may be disposed between the lid 170 and the showerhead 140 to insulate the lid 170 from the showerhead 140.
The showerhead 140 is between the chamber plasma region 120 and the substrate processing region 130 beneath the showerhead 140. The showerhead 140 allows the plasma to travel from the chamber plasma region 120 into the substrate processing region 130 via through holes 142 of the showerhead 140 so as to limit the flow of the plasma. Therefore, the showerhead 140 is able to prevent the plasma present in the chamber plasma region 120 from directly exciting gases in the substrate processing region 130.
The hollow volume 144a may be filled with a precursor in the form of a vapor or gas (such as a silicon-containing precursor), and the precursor may pass through the holes 144 into the substrate processing region 130. The silicon-containing precursor may include silyl-amines such as N(SiH3)3 (i.e., TSA), HN(SiH3)2 (i.e., DSA), H2N(SiH3), or other silyl-amines. The flow directions of the precursor are shown as arrows T in
The pedestal 160 is positioned in the substrate processing region 130 to support a substrate 10 prepared to be deposited. In the substrate processing region 130, the flows of the plasmas (e.g. the nitrogen plasma and the oxygen plasma) from the chamber plasma region 120 mix and react with the precursor (e.g. the silicon-containing precursor) to deposit a silicon, oxygen, and nitrogen-containing film 12 on the substrate 10.
The silicon, oxygen, and nitrogen-containing film 12 has flowable characteristics, which allows the silicon, oxygen, and nitrogen-containing film 12 to flow into narrow gaps, trenches or other structures (not shown) on the deposition surface of the substrate 10. The silicon, oxygen, and nitrogen-containing film 12 may have a polysilazane network. The deposition process includes, for example, a flowable chemical vapor deposition (FCVD) process. In some embodiments, the pedestal 160 spins during the deposition process.
In some embodiments, there are fin structures 10a on the top surface 10 of the substrate 10, and the fin structures 10a are formed for forming fin field effect transistors (FinFETs). The fin structures 10a are spaced from each other, and the silicon, oxygen, and nitrogen-containing film 12 covers the fin structures 10a and fills the gaps G between the fin structures 10a.
Afterwards, the silicon, oxygen, and nitrogen-containing film 12 may be converted into a silicon oxide film 12a, as shown in
As shown in
In some embodiments, the plasma is sucked into suction holes 192 of a chamber wall 190 surrounding the substrate processing region 130. The suction holes 192 are connected to a suction pump (not shown). Since the plasma flows toward the suction holes 192, the peripheral portion 12p of the silicon, oxygen, and nitrogen-containing film 12 in the zone Z4 is thicker than the portion 12e of the silicon, oxygen, and nitrogen-containing film 12 in the zone Z3.
Therefore, the uniformity of the thickness of the silicon, oxygen, and nitrogen-containing film 12 is low, which results in a large stress in the subsequent processes (e.g. the annealing process and the CMP process). The large stress may damage the fin structures 10a (hereinafter referred to as a stress issue), and therefore it is desirable to find alternative mechanisms for controlling the deposition process to form a uniform film.
The electrodes 210 are embedded in the pedestal 160 and are separated from each other by the pedestal 160, in accordance with some embodiments. The electrodes 210 are configured to provide different bias voltage to the substrate 10 above different zones of the pedestal 160 so as to control the deposition rates in different zones. The electrodes 210 may include a first electrode 210a, a second electrode 210b, a third electrode 210c and a fourth electrode 210d in the zones Z1, Z2, Z3 and Z4, respectively. In some embodiments, the first electrode 210a is under (or right under) the diffuser 150.
The DC bias system 220 is configured to provide different voltages to the electrodes 210 so as to provide different bias voltage to the substrate 210 in different zones independently. The DC bias system 220 may have variable voltage sources 222, 224, 226 and 228. The variable voltage sources 222, 224, 226 and 228 are coupled to (or electrically connected to) the first electrode 210a, the second electrode 210b, the third electrode 210c and the fourth electrode 210d, respectively.
Therefore, the electrodes 222, 224, 226 and 228 are provided with DC voltages independently by the variable voltage sources 222, 224, 226 and 228. The DC bias system 220 and a chamber wall 190 surrounding the substrate processing region 130 may be grounded together. The DC voltages provided by the variable voltage sources 222, 224, 226 and 228 may range from about −10 V to about 10 V.
In some embodiments, the plasma includes positively ionized gases (e.g. NHx* including, for example, NH4+, NH2+, NH+, etc.), and the variable voltage sources 222 and 226 provide a negative voltage to the first and the third electrodes 210a and 210c to attract the positively ionized gases to the portions of the substrate 10 above the zones Z1 and Z3. Therefore, the deposition rate over the portions of the substrate 10 above the zones Z1 and Z3 is increased. Thereby, a silicon, oxygen, and nitrogen-containing film 12′ formed on the substrate 10 has a relatively uniform thickness compared to that of the silicon, oxygen, and nitrogen-containing film 12 of
Since the present embodiments may provide different bias voltages to the substrate 10 above different zones of the pedestal 160, the silicon, oxygen, and nitrogen-containing film 12′ may have a uniform thickness. Therefore, the uniformity of the silicon, oxygen, and nitrogen-containing film 12′ is increased, which avoids the stress issue in the subsequent processes (e.g. the annealing process and the CMP process). Thereby, the yield is improved.
In some embodiments, the plasma includes positively ionized gases, and the variable voltage sources 224 and 228 provide a positive voltage to the second and the fourth electrodes 210b and 210d to repel the positively ionized gases away from the portions of the substrate 10 above the zones Z2 and Z4. Therefore, the deposition rate of the silicon, oxygen, and nitrogen-containing film 12′ above the zones Z2 and Z4 is decreased. Thereby, the silicon, oxygen, and nitrogen-containing film 12′ formed on the substrate 10 has a uniform thickness.
In some embodiments, the plasma includes positively ionized gases. The variable voltage sources 224 and 228 may provide a positive voltage to the second and the fourth electrodes 210b and 210d, and the variable voltage sources 222 and 226 may provide a negative voltage to the first and the third electrodes 210a and 210c according to requirements.
In some embodiments, the plasma includes negatively ionized gases, and the variable voltage sources 222 and 226 provide a positive voltage to the first and the third electrodes 210a and 210c to attract the negatively ionized gases to the portions of the substrate 10 above the zones Z1 and Z3. Therefore, the deposition rate of the silicon, oxygen, and nitrogen-containing film 12′ above the zones Z1 and Z3 is increased. Thereby, the silicon, oxygen, and nitrogen-containing film 12′ formed on the substrate 10 has a uniform thickness.
In some embodiments, the plasma includes negatively ionized gases, and the variable voltage sources 224 and 228 provide a negative voltage to the second and the fourth electrodes 210b and 210d to repel the negatively ionized gases away from the portions of the substrate 10 above the zones Z2 and Z4. Therefore, the deposition rate of the silicon, oxygen, and nitrogen-containing film 12′ above the zones Z2 and Z4 is decreased. Thereby, a silicon, oxygen, and nitrogen-containing film 12′ formed on the substrate 10 has a uniform thickness.
In some embodiments, the plasma includes negatively ionized gases. The variable voltage sources 224 and 228 may provide a negative voltage to the second and the fourth electrodes 210b and 210d, and the variable voltage sources 222 and 226 may provide a positive voltage to the first and the third electrodes 210a and 210c according to requirements.
In some embodiments, the two adjacent electrodes (e.g 222 and 224, 224 and 226, or 226 and 228) are simultaneously provided with different voltages according to requirements. In some other embodiments, the two adjacent electrodes (e.g 222 and 224, 224 and 226, or 226 and 228) are simultaneously provided with the same voltages according to requirements.
As shown in
Spacings S1, S2 and S3 are between the electrodes 210a, 210b, 210c and 210d, respectively. Each of the spacings S1, S2 and S3 may range from about 1 mm to about 5 mm. In some embodiments, the spacings S1, S2 and S3 are the same. In some other embodiments, some or all of the spacings S1, S2 and S3 are different.
After the silicon, oxygen, and nitrogen-containing film 12′ is formed, the silicon, oxygen, and nitrogen-containing film 12′ is converted into a silicon oxide film 12a′, as shown in
In some other embodiments, the first electrode 210a, the second electrode 210b, the third electrode 210c and the fourth electrode 210d may be discontinuous ring structures, as shown in
It should be noted that the number of electrodes 210 (as shown in
Embodiments of mechanisms for depositing a substantially uniform film on a substrate are provided. By applying different bias voltages to different portions of the substrate during a depositing process using a plasma, the depositing process is controlled. Thereby, a film with a uniform thickness is formed, which avoids the stress issue in the subsequent processes (e.g. the annealing process and the CMP process). Therefore, the yield is improved.
In accordance with some embodiments, a film deposition tool is provided. The film deposition tool includes a plasma source and a substrate processing region connected to the plasma source. The film deposition tool also includes a pedestal for supporting a substrate in the substrate processing region, wherein the substrate is prepared to be deposited with a film. The film deposition tool further includes electrodes embedded in the pedestal and separated from each other. The film deposition tool also includes a direct current bias system having variable voltage sources. The variable voltage sources are electrically connected to the electrodes, respectively, for providing direct current voltages to the electrodes independently.
In accordance with some embodiments, a film deposition tool is provided. The film deposition tool includes a plasma source and a substrate processing region connected to the plasma source. The film deposition tool also includes a pedestal for supporting a substrate in the substrate processing region, wherein the substrate is prepared to be deposited with a film. The film deposition tool further includes electrodes embedded in the pedestal and separated from each other. Each of the electrodes has parts separated from each other and arranged in a ring shape. The film deposition tool also includes a direct current bias system having variable voltage sources. The variable voltage sources are electrically connected to the parts of the electrodes, respectively, for providing direct current voltages to the parts independently.
In accordance with some embodiments, a method for forming a film is provided. The method includes providing a substrate onto a pedestal in a substrate processing region, wherein electrodes are embedded in the pedestal and are separated from each other. The method also includes providing a plasma and a precursor into the substrate processing region to form a film on the substrate. During the formation of the film, different bias voltages are applied to different portions of the substrate above the different electrodes.
Although the embodiments and their advantages have been described in detail, it should be understood that various changes, substitutions, and alterations can be made herein without departing from the spirit and scope of the embodiments as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods, and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps. In addition, each claim constitutes a separate embodiment, and the combination of various claims and embodiments are within the scope of the disclosure.