Patent Application
20140210036
The invention relates to a sensor device having a semiconductor substrate with an opening, a membrane extending over said opening and a heater located on the membrane. The invention also relates to a method for manufacturing such a sensor device.
Various sensor devices require a heater. One group of such devices is formed by flow sensors, where changes in the thermal distribution around the heater are used to measure a fluid flow. Such a device is e.g. disclosed in US 2007/0241093. Another group of such devices comprises gas sensors, where the heater is used to heat a sensing material, such as a metal oxide, to an operating temperature. A device using such a hot plate is e.g. disclosed in WO 95/919563.
This type of devices can be integrated onto a semiconductor substrate, in which case, the heater is advantageously arranged on a membrane over an opening in the semiconductor substrate, thereby reducing the thermal loss as compared to devices where the heater is arranged over the bulk of the substrate material. Arranging the heater on a membrane has a series of advantages, such as reducing power consumption, increasing sensitivity and reducing the time required for switching on the device.
According to a first aspect of the present invention, a sensor device comprises a semiconductor substrate (such as a silicon substrate) having a top and a bottom surface and an opening extending between the top and bottom surfaces. A batch of material layers, e.g. comprising structured dielectric and metallic or semiconducting layers, is arranged on the top surface of the substrate, e.g. in order to form conducting leads and other electrical and electronic components of the device. Some of the material layers extend over the opening of the semiconductor substrate, thereby forming a membrane. Further, a heater is arranged on the membrane.
In addition, the device comprises a recess extending from below into the batch of material layers at the location of the membrane, thereby reducing the thickness of the membrane and therefore thermal losses through the membrane.
A device of this type can be manufactured according to a second aspect of the present invention by providing a semiconductor substrate having a top and a bottom surface. The mentioned batch of material layers is applied to the top surface, and a heater is formed in the batch of material layers by suitable structuring techniques. Further, an opening is etched through the substrate, thereby forming a membrane formed by the material layers at the location of the heater. In addition, a recess is etched into the bottom side of the batch of material layers, namely by applying an etching agent through the opening in the substrate. In this manner, the thickness of the membrane is reduced.
This design is particularly advantageous when being combined with modern CMOS processes, where typically a very large batch of material layers is applied to the semiconductor substrate. This batch can have a thickness of 10 μm or more, even at locations where the metal layers are removed. By forming said recess in the membrane, the thickness of the membrane can be optimized.
Etching the recess from below has the further advantage that it does not affect the topography of the top surface of the batch of material layers, while forming the recess from above would lead to a non-flat surface of the membrane, which would render the formation of electrode structures and of other type of surface structures more difficult, in particular when using photolithography.
Typically, the batch of material layers comprises a plurality of structured dielectric layers and a plurality of structured metal layers, such as e.g. known from conventional CMOS devices. It can e.g. be manufactured by subsequent application of unstructured layers of suitable materials and structuring the same using photolithographic techniques.
Further, the batch of material layers advantageously comprises at least one non-dielectric etch-stop layer, which is structured to extend over the location of the opening to be formed in the substrate. This etch-stop layer is used as an etch-stop when forming the recess into the batch of material layers. Even though the etch-stop layer is not strictly necessary (timed etching could be used instead in order to etch the recess to a certain depth), it is advantageous since it allows to stop the etching-process at a well-defined location.
After etching the recess, at least part of the etch-stop layer may preferably be removed in order to further reduce the thermal conductivity of the membrane.
The sensor is advantageously a gas sensor or a flow sensor.
Other advantageous embodiments are listed in the dependent claims as well as in the description below.
Embodiments of the present invention are described by reference to the annexed drawings, wherein:
Note: The drawings are not to scale.
Terms indicating a vertical direction or arrangement, such as “top”, “bottom”, “above” or “below” relate to a frame of reference where the batch of material layers forming the membrane are arranged on top, i.e. above, the substrate. In other words, the substrate is arranged, by definition, below the material layers and the membrane is located on top of the opening extending through the substrate.
The term “lateral” is used to describe directions parallel to the top and bottom surfaces of the semiconductor substrate.
A “dielectric” material is a non-conductive, non-metallic material, in particular an oxide or nitride, such as SiO2 or SiN.
A “non-dielectric” material is a metal or a metalloid.
An “SOI-structure” (“Silicon on Insulator”) is a structure comprising a handle substrate of silicon, a silicon layer, and an insulator layer arranged between the handle substrate and the silicon layer.
The device:
Patch 2 is in electrical contact with at least a pair of interdigital metal electrodes 3, which are connected to processing circuitry 4. Processing circuitry 4 is integrated on semiconductor substrate 1 and can e.g. comprise active components, such as transistors, at least one amplifier, at least one analog/digital converter, and/or interface circuitry, etc.
The sensor device further comprises a heater 5 positioned at the location of patch 2 in order to heat patch 2 to its operating temperature, which, for SnO, is e.g. typically at least 300° C.
Typically, the metal layers, which are generally designated by reference numbers 10a-10f, are of aluminum or copper, and they are structured to form leads and other electrical components. In
Part of the layers of batch 9 extend over an opening 12 in semiconductor substrate 1 and form a membrane 13. Membrane 13 can have circular or rectangular cross section or any other suitable cross-section.
Advantageously, and in order to reduce the thermal conductance of membrane 13, none of the aluminum or copper metal layers 10a-10f extends into membrane 13.
Batch 9 further comprises a layer 14 of SiN under tensile stress, which extends at least over membrane 13 and is anchored laterally outside membrane 13. The tensile stress in layer 14 is at least sufficiently large to exceed the compressive stress in the rest membrane 13, which leads to a total tensile stress in the membrane. As described in U.S. Pat. No. 7,154,372, such a tensile layer can be used to prevent the membrane from buckling.
Heater 5 is formed by structuring a metal layer into at least one metal conductor, which is located on membrane 13. Advantageously, heater 5 is formed by a tungsten conductor. As seen in
A SiO2 layer 15 is arranged on top of the layer of heater 5 and electrically insulates the same from a further metal layer forming the electrodes 3.
A protective dielectric layer can be applied to the top of the device (not shown).
As can be seen in
Typically, batch 9 has a thickness of at least 5 μm, in particular between 6 and 15 μm. Recess 17 has a vertical depth of at least 1 μm, in particular of at least 3 μm.
The cross section, i.e. the lateral extension, of recess 17 is advantageously equal to the cross section of the upper end of opening 12, such that it spans the whole membrane, and the membrane therefore has a reduced thickness everywhere. Alternatively, the cross section area of recess 17 may be at least 80% of the cross section area of the upper end of opening 12.
Membrane 13 preferably has sufficiently large lateral extensions to provide a thermally insulated location for receiving patch 2. Advantageously, membrane 13 may cover an area of at least 0.1 mm2, in particular at least 0.2 mm2.
For reasons that will become apparent from the description of the manufacturing process below, the sensor device further comprises at least one etch-stop layer 20, or, rather, residual remains thereof, arranged in a ring around recess 17. Etch-stop layer 20 is of a non-dielectric material, in particular of aluminum or copper. The ring of etch-stop layer 20 has a lateral width W between 1-20 μm in order to be able to compensate for positioning errors in the etching process described below. The shape of the ring formed by edge-stop layer 20 depends on the shape of recess 17.
As can be seen, etch-stop layer 20 is advantageously positioned at a height between two of the metal layers 10a-10f, i.e. at an intermediate height of batch 9, namely at such a height that the distance between etch-stop layer 20 and the top of batch 9 corresponds to the desired thickness of the membrane.
Manufacturing process:
In a first step, silicon substrate 1 is covered, at its top surface, with the dielectric layers 11 as well as with the metal layers 10a-10f in a series of steps as known in the art of semiconductor device manufacture. For example, a first SiO2-layer is applied to top surface 8, then the first metal layer 10a is applied onto the first SiO2-layer and structured using photolithography. Then, a second SiO2-layer is applied, and the second metal layer 10b is applied thereto and structured, etc.
Between two of these steps, etch-stop layer 20 is applied and structured to extend over the area of future opening 12 and slightly beyond. For the reasons mentioned above, at least one first metal layer (in the embodiment of
After applying the metal layers 10a-10f, etch-stop layer 20 and the dielectric layers 11, the layer for heater 5 is applied and structured, followed by the application of tensile layer 15 and the electrodes 3. This results in a device as shown in
In a next step, opening 12 is etched out from the bottom side 7 of semiconductor substrate 1, e.g. using a plasma-process (such as deep reactive ion etching) or a wet process (such as anisotropic etching using KOH) after application of a photolithographic mask to bottom side 7. This step uses the bottom surface of the dielectric layers 11 as an etch-stop.
In a next step, recess 17 is etched. In this step, etch-stop layer 20 acts as an etch-stop. If recess 17 is to have the same lateral extension as opening 12, no masking is required in this step.
The resulting device is shown in
In a next step, the accessible part of etch-stop layer 20 can optionally be removed by etching. A residual ring of the etch-stop layer 20 of width W surround recess 17, as described above, remains in the device.
Now, patch 2 of the sensing material can be applied to the top of membrane 13.
Alternative embodiment:
The purpose of silicon plate 30 is to provide a uniform temperature distribution at the location of patch 2.
Plate 30 can have a thickness equal to substrate 1, in which case the device can be manufactured as described above with the sole difference that opening 12 has annular shape, thereby forming plate 30 from substrate 1.
Alternatively, and as shown in
The batch of layers 9 is integrated on top of silicon layer 1c.
For manufacturing opening 12 and recess 17, the device is again etched from its bottom side. In a first step, a first part 12a of opening 12 is formed, using insulating layer 1b as an etch stop. A mask is then applied on insulating layer 1b at the location of the future plate 30, and insulating layer 1b is removed outside this mask. Then, an annular second part 12b of opening 12 is formed by etching off silicon layer 1c where it is not masked, thereby forming plate 30 from silicon layer 1c. Second part 12b forms the annular gap extending all around plate 30 between plate 30 and substrate 1. Finally, recess 17 is formed by etching from the side second part 12b of opening 12 as described above.
Flow sensor:
As mentioned, the sensor device can also be a thermal flow sensor, e.g. of the type described in U.S. 2007/0241093, which has a heater arranged on the membrane. A fluid flowing over the membrane distorts the thermal field generated by the heater, which in turn can be detected by one or more suitable temperature sensors arranged on the membrane.
In the embodiment described in reference to
The sensor device may also be any other type of device where a heater is arranged on a thin membrane.
While there are shown and described presently preferred embodiments of the invention, it is to be distinctly understood that the invention is not limited thereto but may be otherwise variously embodied and practised within the scope of the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 13405014.5 | Jan 2013 | EP | regional |
