Patent Application
20070296424
An understanding of the present teachings can be gained from the following detailed description, taken in conjunction with the accompanying drawings of which:
When mounting a probe card onto an ATE system, electrical contact must be made between the probe card and the electronics of the tester. If the DUT interface of the ATE system uses ZIF connectors, an appropriate mating surface must be created on the probe card.
The right angle connectors 120 may be any industry standard right angle connector, such as Teredyne's VHDM daughter board connector system or 3M's standard 2 mm hard metric right angle connector system. Many types of dielectric materials may be used to fabricate the printed circuit board of paddle board 130, including Nelco 4000-13 SI, Rogers 4000 series and other high speed materials. The length and width of the paddle board 130 may be chosen by the designer to optimize mechanical dimensional space constraints and pin count requirements.
Currently, printed circuit boards may be routed with line widths up to 20 mils. This minimizes the high frequency series resistance of the transmission line. This is an improvement over flex circuits, where the maximum trace width with a 50 ohm characteristic impedance is 10 mils. However, many fabrication houses can only process 5 mil wide lines on flex circuits.
The paddle board will have enough rows of contacts to support very high pin count applications. The layer count limitation of a common printed circuit board today is 60 layers, which is a 10× improvement in the number of layers to route signals over flex circuits, which are currently limited to 6 layers.
The paddle board may have active or passive circuitry contained thereon. For example, the paddle board may have circuitry that enables fanout of the address lines of memory devices, such as MCP, NAND, NOR or DRAM. Further, the paddle board may include circuitry for fanout of power supply and sense lines. Alternatively, the paddle board may include circuitry for fanout of I/O lines of memory devices, such as MCP, NAND, NOR or DRAM.
While the invention has been particularly shown and described with reference to specific embodiments thereof, it will be understood by those skilled in the art that changes in the form and details of the disclosed embodiments may be made without departing from the spirit or scope of the invention. For example, some of the descriptions of embodiments herein imply a certain orientation of various assemblies of which the system is constructed or a certain order of fabricating or mounting the assemblies. It will be understood, however, that the principles of the present invention may be employed in systems having a variety of spatial orientations or orders of fabrication or mounting and that therefore the invention should not be limited to the specific orientations or orders of fabrication or mounting shown.
