Explosive growth in electronics technology has resulted in electronic devices used all around us in seemingly every facet of life. For example, communications equipment, toys, computers, automobiles, personal digital assistants (PDAs), household appliances, medical equipment, etc., all include increasingly powerful electronic circuits. As electronic devices become more powerful, however, their design and manufacture has become more complex and sensitive, particularly as their speed increases.
Although the design and manufacture of electronic circuits may be carried out in a number of ways, two steps in the design process are practically universal: first, the logical or functional design of the circuits, and second, the physical design of the circuits. In the first step, a circuit design is created in which circuit elements are selected and interconnected to implement the desired functionality of the circuit. The result of this functional design step is a logical circuit design file describing the interconnections in the circuit, such as “L1_pin A is connected to L2_pin B”.
The second of these two design steps is to generate a physical circuit layout from the logical circuit design for the desired product, such as an integrated circuit (IC), an IC package, a printed circuit board, etc. The circuit layout can be used to form a mask which can be provided to a foundry for fabrication. For example, the circuit layout describes the conductive lines or traces including their width, shape and position, and the conductive vias which connect the traces on different circuit layers.
Many aspects of the physical layout of conductive traces must be carefully controlled in order for the circuit to operate properly. For example, properties such as trace widths, minimum trace spacing, minimum and maximum trace length, etc., impact the electrical characteristics of the circuit such as signal delay and distortion. One potential source of errors during the operation of an electrical circuit is crosstalk, or interference caused by two signals becoming partially superimposed on each other due to electromagnetic (inductive) or electrostatic (capacitive) coupling between the conductive traces carrying the signals. A common example of crosstalk is where the magnetic field from changing current flow in one conductive trace induces current in another conductive trace running parallel to the first. The coupling from one conductive trace to another may be measured as the ratio of the power in a disturbing trace (the culprit) to the induced power in the disturbed trace (the victim). The coupling factor may be expressed in any suitable fashion, such as in decibels (dB) or as a percentage, or as a ratio, etc. For example, when expressed as a ratio, a coupling factor of 0 indicates that no coupling exists, and a factor of 1 indicates that the culprit trace is entirely coupled to the victim trace, so that 100% of a signal on the culprit trace will appear on the victim trace.
Circuit designers can attempt to minimize coupling between conductive traces by simulating the circuit layout and making adjustments to the layout if coupling problems appear. However, manually calculating the coupling factor for conductive traces in a complex electrical circuit is extremely tedious and difficult, particularly when the electrical circuit includes differential pairs. A differential pair is a pair of conductive traces, typically (but not always) routed parallel to each other through the electrical circuit. The exemplary differential pair is balanced, with each trace in the differential pair theoretically carrying equal but opposite currents called odd-mode signals. Because the differential pair contains two traces with opposite polarity on the traces, calculation of coupling factors involving differential pairs is difficult.
An exemplary embodiment may comprise a method for calculating worst case coupling for a differential pair group, including identifying a victim differential pair and at least one culprit differential pair in the differential pair group, calculating a coupling factor between each of the culprit differential pairs and the victim differential pair, and summing the absolute value of each of the coupling factors to generate a worst case coupling factor.
Illustrative embodiments are shown in the accompanying drawings as described below.
The drawing and description, in general, disclose a method and apparatus for calculating worst case coupling within a differential pair group. This enables a designer to easily calculate the susceptibility of the differential pairs in the circuit to capacitive crosstalk, or interference caused by signals becoming partially superimposed on each other due to electrostatic. (capacitive) coupling between the conductors carrying the signals. The exemplary method and apparatus for calculating worst case coupling within a differential pair group may be used to calculate worst case coupling for either differential trace pairs, conductors running along a layer of a circuit (e.g., horizontally), or differential via pairs, conductors running between circuit layers (e.g., vertically). Alternative embodiments may calculate worst case coupling for differential pairs within other types of circuit layouts.
In one exemplary embodiment, the worst case coupling factor is calculated for a differential pair group, a group of differential pairs each having two conductive traces or vias. In one exemplary embodiment in which the victim differential pair is a pair of traces, the differential pair group is laid out on a single layer of an electrical circuit, as illustrated in
In one exemplary embodiment, the method and apparatus for calculating worst case coupling within a differential pair group is implemented as a software tool that may be executed by a circuit designer. Characteristics of a circuit layout may be provided as an input to the worst case coupling tool, which generates the worst case coupling factor for the differential pair group as output. For example, capacitance values for elements in the differential pair group may be provided as an input to the worst case coupling tool for use in calculating worst case coupling. Alternatively, a description of the physical layout of the differential pair group in a cross-section may be provided as an input to the worst case coupling tool for use in calculating worst case coupling.
One differential pair in the differential pair group is selected as the victim differential pair, with the remaining differential pairs in the differential pair group being selected as culprit differential pairs. The worst case coupling factor is an indication of the extent to which signals on the culprit differential pairs may couple to the victim differential pair. The differential pair group may contain any number of culprit differential pairs, from one to many. However, the contribution of culprit pairs to the worst case coupling factor typically drops off as the distance from the culprit differential pairs to the victim differential pair increases. In the exemplary embodiment, the differential pair group contains a single victim differential pair, and the worst case coupling to other differential pairs may be calculated by re-running the worst case coupling tool with the other differential pairs selected as victim.
The method and apparatus for calculating worst case coupling may be implemented in a standalone software tool, or may be built into electronic design automation (EDA) software such as Allegro or Advanced Package Designer (APD), available from Cadence Design Systems, Inc. of San Jose, Calif., or may be implemented as a script or macro within EDA software.
Referring now to
The exemplary differential pair group includes four differential trace pairs 10, 12, 14 and 16, all located on a single layer 20 of the circuit. In this exemplary circuit layout, ground planes 22 and 24 lie above and below the differential pair group's layer 20. One differential pair 10 is selected as the victim differential pair, and the remaining differential pairs 12, 14 and 16 are selected as the culprit differential pairs. Each differential trace pair 10, 12, 14 and 16 contains two conductive traces 30 and 32, 34 and 36, 40 and 42, and 44 and 46, respectively.
The two conductive traces in each differential trace pair are assigned a polarity, one positive and one negative, because each trace of the differential trace pair theoretically carries equal but opposite currents called odd-mode signals. In the exemplary circuit layout illustrated in
The worst case coupling factor is calculated in the exemplary embodiment based on capacitance values for the elements of the differential pair group. Capacitance values for the elements of the differential pair group may be calculated in the worst case coupling tool or may be externally calculated and provided to the worst case coupling tool using well known electromagnetic solver techniques, based on parameters such as the dielectric material, the shape of the conductors and the spatial distribution of the conductors. The capacitance values for the worst case coupling calculation are found in the capacitance matrix for the victim differential pair 10 and culprit differential pairs (e.g., 12). The capacitance matrix for the system containing the victim differential pair 10 and one culprit differential pair, such as the left culprit differential pair 12, is as follows:
where Cij=Cji. The subscripts in the capacitance matrix refer to individual conductors in the differential pairs 10 and 12. The conductive traces in the differential pair group illustrated in
The coupling factor k from a culprit differential pair (e.g., 12) to the victim differential pair 10 is calculated as follows:
The subscripts to the left of the equality sign each identify a differential pair in the differential pair group, with the victim differential pair being number 1 and the culprit differential pair being number 2 in this case. The subscripts to the right of the equality sign each identify a conductor in the differential pair group. Note that the first two terms of the numerator are the capacitance values between traces having a common polarity in the victim differential pair and the culprit differential pair. The capacitance value C13 is the capacitance between the positive traces 32 and 34 of the victim differential pair 10 and the culprit differential pair 12, respectively. The capacitance value C24 is the capacitance between the negative traces 30 and 36 of the victim differential pair 10 and the culprit differential pair 12, respectively. The second two terms of the numerator are the capacitance values between traces having an opposite polarity in the victim differential pair and the culprit differential pair. The capacitance value C14 is the capacitance between the positive trace 32 of the victim differential pair 10 and the negative trace 36 of the culprit differential pair 12. The capacitance value C23 is the capacitance between the negative trace 30 of the victim differential pair 10 and the positive trace 34 of the culprit differential pair 12.
Because the capacitance value drops off as a function of distance, the coupling value k may be either positive or negative depending in part on whether the first two terms of the numerator in the k equation above are collectively greater than the last two terms of the numerator. For example, the coupling factor between the victim differential pair 10 and the left culprit differential pair 12 may be positive because the capacitance value C24 is likely greatest, with the negative traces 30 and 36 of the victim differential pair 10 and the culprit differential pair 12 being closest together, and the capacitance value C24 appearing in the positive portion of the numerator. In contrast, the coupling factor between the victim differential pair 10 and the culprit differential pair 14 to the right may be negative because the capacitance value C14 is likely greatest, with the positive trace 32 of the victim differential pair 10 and the negative trace 40 of the culprit differential pair 14 being closest together, and the capacitance value C14 appearing in the negative portion of the numerator. Of course, these are only speculative projections based on the layout illustrated in
As with the capacitance matrix, the coupling factor k is calculated between the victim differential pair 10 and a single culprit differential pair 12, 14 or 16. The coupling factor between the victim differential pair 10 and each culprit differential pair 12, 14 and 16 in the differential pair group is calculated in turn. The resulting coupling factors are then combined to form a worst case coupling factor for the victim differential pair within the differential pair group. However, because the signs of the coupling factors may differ, with some being positive and some being negative, the coupling factors are not simply added, or they may cancel each other out to some degree. As discussed above, the polarities of the traces in the differential pair group are somewhat arbitrarily assigned by the circuit designer, and may not be an accurate indication of the actual state of the signals at all times during operation of the circuit. The method and apparatus for determining worst case coupling within a differential pair group therefore ensures that the various coupling factors do not cancel each other out when combining them to form the worst case coupling factor.
In one exemplary embodiment, this is done by summing the absolute values of the various coupling factors in the differential pair group as follows:
As described above with respect to the individual coupling factor equation, the victim differential pair is identified as pair 1 and the culprit differential pairs are identified as 2 and up. The term N in the equation for ktotal is the number of differential pairs in the differential pair group (or 4 in the exemplary differential pair group of
In an alternative embodiment, the method and apparatus for determining worst case coupling within a differential pair group ensures that the various coupling factors do not cancel each other out by determining which polarity assignments in the differential pair group would maximize the worst case coupling factor ktotal when the various coupling factors are combined. This may be performed, for example, by a trial and error process of calculating and recalculating coupling factors while changing polarity assignments until all coupling factors have the same sign or until the worst case coupling factor is maximized. This may also be performed by comparing the magnitude of the common-polarity capacitance values and opposite-polarity capacitance values for a default polarity assignment, then selecting an actual polarity assignment that ensures that all coupling values have the same sign.
The method and apparatus for determining worst case coupling within a differential pair group ensures that the circuit designer is informed about the worst possible coupling within a differential pair group, enabling the designer to prevent unacceptable crosstalk levels in the circuit. It also greatly simplifies the calculation of worst case coupling because the designer need not determine what polarity assignments would maximize worst case coupling. If the designer happens to select the wrong polarity assignments, or if polarities change during operation of the circuit, the method and apparatus for determining worst case coupling within a differential pair group will still be able to calculate the worst possible coupling level in the differential pair group. This enables the designer to provide the coupling tolerance needed in the circuit to avoid unacceptable crosstalk levels, even if the polarity of the signals in the differential pair group changes during operation.
As discussed above, the method and apparatus for determining worst case coupling within a differential pair group may be applied to differential via pairs as well as differential trace pairs. Referring now to
As with the differential trace pair above, the differential pair group may be bounded by specifying the differential pairs in the group to be considered, or by specifying a distance or window around the victim differential pair within which all differential pairs will be considered.
Because of the vertical orientation of the differential via pairs 60, 62 and 64, the exemplary differential via pair group does not lie on a single layer as with the exemplary differential trace pair group discussed above. (Note that the terms “vertical” and “horizontal” are used herein to refer to directions that are perpendicular and parallel, respectively, to circuit layers, and remain constant regardless of how the circuit is rotated.) Differential via pairs in the differential pair group may terminate on various layers of the circuit. For example, exemplary culprit differential pairs 62 and 64 terminate on layers 50 and 52 illustrated in
The calculation of the worst case coupling factor for the differential via pair group is performed as described above with respect to the differential trace pair group. The individual coupling factors between each culprit differential pair 62 and 64 and the victim differential pair 60 are calculated according to the following equation:
As above with respect to the differential trace pair group, the subscripts to the left of the equality sign each identify a differential pair in the differential pair group, and the subscripts to the right of the equality sign each identify a conductor in the differential pair group. Note that a polarity has been assigned to each trace in the differential pair group, but as discussed above, this is somewhat arbitrary and will not affect the value of the worst case coupling factor. Again, the victim differential pair 60 is designated as pair number 1 for the k21 coupling factor equation above, a first culprit differential pair 62 is designated as pair number 2, and a second culprit differential pair 64 is designated as pair number 3. The positive conductor 70 of the victim differential pair 60 is designated as conductor number 1 for the k coupling factor equation above, and the negative conductor 72 is designated as conductor number 2. For calculating k21, the coupling factor between the first culprit differential pair 62 and the victim differential pair 60, the positive conductor 74 of the first culprit differential pair 62 is designated as conductor number 3, and the negative conductor 76 is designated as conductor number 4. For calculating k31, the coupling factor between the second culprit differential pair 64 and the victim differential pair 60, the positive conductor 80 of the second culprit differential pair 64 is designated as conductor number 3, and the negative conductor 82 is designated as conductor number 4.
The individual coupling factors are then combined to form the worst case coupling factor, for example using the following equation:
The worst case coupling factor ktotal would be the sum of the absolute value of the first individual coupling factor k21, the coupling factor between the first culprit differential pair 62 and the victim differential pair 60, plus the absolute value of the second individual coupling factor k31, the coupling factor between the second culprit differential pair 64 and the victim differential pair 60.
An exemplary operation for calculating the worst case coupling factor within a differential pair group is summarized in
An alternative exemplary operation for calculating the worst case coupling factor within a differential pair group is summarized in
As discussed above, an exemplary embodiment of a tool for calculating worst case coupling may be implemented in any desired fashion, such as in a standalone software tool or in conjunction with EDA software. The inputs may also be adapted as desired. For example, the layout of a cross-section of a differential pair group may be provided as an input, along with material properties, etc. Alternatively, capacitance values for a differential pair group may be provided as an input. In another alternative, a circuit design database may be provided as an input, from which the layout of a cross-section of a differential pair group may be determined, along with an indication of the differential pair group to be considered.
Similarly, the outputs may be adapted as desired. For example, the resulting worst case coupling factor may be displayed, stored in a file, or provided as input to another software application taking part in the circuit design process.
Exemplary embodiments of the method and apparatus for calculating worst case coupling within a differential pair group have been described herein as they apply to differential traces and vias in a layered circuit layout. However, the method and apparatus for calculating worst case coupling is not limited to these applications, and may be applied to any type of circuit layout in which coupling factors between differential pairs may be calculated.
An exemplary embodiment of an apparatus for calculating worst case coupling within a differential pair group may comprise computer readable program code stored on at least one computer readable medium. The exemplary computer readable program code includes code for calculating individual coupling values between a victim differential pair and each culprit differential pair in a differential pair group. The exemplary computer readable program code also includes code for calculating a worst case coupling value for the differential pair group based on the individual coupling values, with the worst case coupling value being maximized for any possible configuration of polarity assignments for conductors in the differential pair group.
Various computer readable or executable code or electronically executable instructions have been referred to herein. These may be implemented in any suitable manner, such as software, firmware, hard-wired electronic circuits, or as the programming in a gate array, etc. Software may be programmed in any programming language, such as machine language, assembly language, or high-level languages such as C or C++. The computer programs may be interpreted or compiled.
Computer readable or executable code or electronically executable instructions may be tangibly embodied on any computer-readable storage medium or in any electronic circuitry for use by or in connection with any instruction-executing device, such as a general purpose processor, software emulator, application-specific circuit, a circuit made of logic gates, etc. that can access or embody, and execute, the code or instructions.
Methods described and claimed herein may be performed by the execution of computer readable or executable code or electronically executable instructions, tangibly embodied on any computer-readable storage medium or in any electronic circuitry as described above.
A storage medium for tangibly embodying computer readable or executable code or electronically executable instructions includes any means that can store, transmit, communicate, or in any way propagate the code or instructions for use by or in connection with the instruction-executing device. For example, the storage medium may include (but is not limited to) any electronic, magnetic, optical, or other storage device, or any transmission medium such as an electrical conductor, an electromagnetic, optical, infrared transmission, etc. The storage medium may even comprise an electronic circuit, with the code or instructions represented by the design of the electronic circuit. Specific examples include magnetic or optical disks, both fixed and removable, semiconductor memory devices such as memory cards and read-only memories (ROMs), including programmable and erasable ROMs, non-volatile memories (NVMs), optical fibers, etc. Storage media for tangibly embodying code or instructions also include printed media such as computer printouts on paper which may be optically scanned to retrieve the code or instructions, which may in turn be parsed, compiled, assembled, stored and executed by an instruction-executing device. The code or instructions may also be tangibly embodied as an electrical signal in a transmission medium such as the Internet or other types of networks, both wired and wireless.
An exemplary computer system which may be used to calculate worst case coupling within a differential pair group is illustrated in the block diagram of
While illustrative embodiments have been described in detail herein, it is to be understood that the concepts disclosed herein may be otherwise variously embodied and employed, and that the appended claims are intended to be construed to include such variations, except as limited by the prior art.