Patent Application
20230385371
The present invention relates to correlation computation, and more particularly, to a method and apparatus for performing correlation computation with reduced complexity through using a composite code sequence that is generated from performing a bit-wise combination with transformation upon multiple code sequences.
The global navigation satellite system (GNSS) is often described as an “invisible utility” and is so effective at delivering two essential services—time and position—accurately, reliably and cheaply that many aspects of the modern world have become dependent upon them. Each satellite of the GNSS is equipped with a highly precise atomic clock. When four or more satellites are in view, a GNSS receiver can measure the distance to each satellite by estimating the signal transmission time delay from the satellite to the receiver. From these measurements, a GNSS-embedded device can derive its own position and synchronize to the accurate GNSS system time.
A GNSS satellite signal is modulated by pseudo random noise (PRN) code. The PRN code is a code sequence with randomly distributed 0's and 1's. Each satellite transmits a unique PRN code. The GNSS receiver identifies any of the satellites by its unique PRN code. The unique PRN code is continuously repeated. The GNSS receiver uses a local replica version of the satellite signal to correlate the received satellite signal. The purpose of the correlation process is to synchronize the timing between the local replica and the received satellite signal. Because the timing is unknown and dynamic, the received satellite PRN code sequence must be correlated with a plurality of its time-shifted versions. If the satellite PRN code sequence is unknown, the receiver must try all the possible sequences.
Many correlation hypotheses are required by a GNSS receiver to search the satellite (i.e., match the satellite PRN code), where each hypothesis requires a correlation operation between a local code sequence {Dh,n, n=0, 1, . . . , N−1} and a received data sequence {rn, n=0, 1, . . . , N−1} to generate a correlation result Th for h=0, 1, . . . , H-1. For example, many hypotheses (H=20460) are required to search a GPS L5 signal in a cold start condition. Moreover, there are many satellites to be acquired in a modern GNSS receiver. Thus, there is a need for an innovative correlator architecture that is capable of acquiring multiple satellites at the same time with reduced computation complexity.
One of the objectives of the claimed invention is to provide a method and apparatus for performing correlation computation with reduced complexity through using a composite code sequence that is generated from performing a bit-wise combination with transformation upon multiple code sequences.
According to a first aspect of the present invention, an exemplary correlation computation method is disclosed. The exemplary correlation computation method includes: obtaining a plurality of code sequences; performing, by a transformation circuit, a bit-wise combination with transformation upon the plurality of code sequences to generate a composite code sequence; and generating a correlation value between a data sequence and the composite code sequence.
According to a second aspect of the present invention, an exemplary correlation computation apparatus is disclosed. The exemplary correlation computation apparatus includes a transformation circuit and a correlation circuit. The transformation circuit is arranged to obtain a plurality of code sequences, and perform a bit-wise combination with transformation upon the plurality of code sequences to generate a composite code sequence. The correlation circuit is arranged to generate a correlation value between a data sequence and the composite code sequence.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
Certain terms are used throughout the following description and claims, which refer to particular components. As one skilled in the art will appreciate, electronic equipment manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not in function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
To search PRN codes of several satellite signals at the same time, a GNSS receiver design may use a local composite code sequence {Dh,n=C(1)h,n+ . . . +(p)h,n} to correlate with the received data sequence {rn}, where the local composite code sequence {Dh,n} is a direct sum of P candidate PRN code sequences. The value of PRN code bit is binary in GNSS. That is, C(p)h,n is equal to 1 or −1. Since each code bit of the local composite code sequence {Dh,n} is not a binary value anymore, the correlation operation {Dh,n}·{rn} is more complex than {Ch,n}·{rn}. In addition, the multiplication and addition/subtraction operation during the correlation process must be reduced to save the power. To address these issues, the present invention proposes an innovative correlator architecture that is capable of acquiring multiple satellites at the same time with reduced computation complexity. Further details are described as below with reference to the accompanying drawings.
The transformation circuit 102 is arranged to obtain a plurality of code sequences C(1)h,n, . . . , C(p)h,n for each hypothesis correlation Corh (h={0, 1, . . . , H−1}), where the code sequences C(1)h,n, . . . , C(p)h,n are unique PRN codes of P satellites to be acquired, and each of the code sequences C(1)h,n, . . . , C(p)h,n includes N code bits Cn (n={0, 1, . . . , N−1}). For each hypothesis correlation Corh (h={0, 1, . . . , H−1}), the transformation circuit 102 is further arranged to perform a bit-wise combination with transformation upon the code sequences C(1)h,n, . . . , C(p)h,n to generate a composite code sequence Dh,n. For each hypothesis correlation Corh (h={0, 1, . . . , H−1}), the correlation circuit 104 is arranged to generate a correlation value Th between a data sequence rn{rn, n=0, 1, . . . , N−} and the composite code sequence Dh,n. For example, the data sequence rn is a data block of N (N>1) received data samples {rn, n=0, . . . , N−1} output from an analog-to-digital converter (ADC). The ADC can capture one sample of the received signal per PRN code bit. Or several samples per PRN code bit are captured by the ADC and are processed further to get a data sample per PRN code bit. On the other hand, the samples per PRN code bit can be used to correlate with the corresponding samples of a local PRN code bit. Other signal processing might be applied before correlation, such as carrier frequency or Doppler frequency removal. In order to describe our invention more clearly, the following embodiments use one sample per PRN code bit and without other signal processing.
Each of the code sequences C(1)h,n, . . . , C(P)h,n is paired with the data sequence rn for correlation computation, and thus includes N codes bits (also called chips due to bearing no useful data information) at different bit positions n {n=0, 1, . . . , N−1}, respectively. In this embodiment, the transformation circuit 102 may obtain a preliminary composite code sequence (which may be regarded as a sum code sequence) D′h,nby a direct sum of the code sequences C(1)h,n, . . . , C(P)h,n (i.e., D′h,n=C(1)h,n+ . . . +C(P)h,n, where each composite code bit at a bit position in the preliminary composite code sequence D′h,n is obtained from a sum of a plurality of code bits at the same bit position in the code sequences C(1)h,n, . . . , C(P)h,n; and then apply a predetermined transformation to the preliminary composite code sequence D′h,n (particularly, each composite code bit of the preliminary composite code sequence D′h,n for generating the final composite code sequence D′h,n that is actually used to correlate with the data sequence rn. Based on the predetermined transformation employed by the transformation circuit 102, different values (e.g., non-zero values) possessed by composite code bits at different bit positions in the preliminary composite code sequence D′h,n may be transformed to the same value (e.g., zero value). The correlation circuit 104 can benefit from such characteristics resulting from code bit transformation to achieve computation complexity reduction. For example, when a specific code bit in the composite code sequence Dh,n has a zero value, the correlation circuit 104 may skip correlation between the specific code bit and a specific data sample included in the data sequence rn that is paired with the specific code bit.
In some embodiments of the present invention, the bit-wise combination with transformation employed by the transformation circuit 102 may use ternary code transformation or binary code transformation. For example, the predetermined transformation applied to the preliminary composite code sequence D′h,n (particularly, each code bit of the preliminary composite code sequence D′h,n ) may be ternary code transformation or binary code transformation. In other words, the final composite code sequence D′h,n output from the transformation circuit 102 may be regarded as a ternary code sequence or a binary code sequence that is derived from a sum code sequence. Supposing that PRN code sequences of four satellites are represented by C(3), C(2), C(1) and C(0). Some examples of sum code sequences, ternary code sequences and binary code sequences are illustrated in the following table.
In the above table, a code sequence Di is obtained from i PRN code sequences. For example, the sum code sequence D4 is a direct sum of 4 PRN code sequences C(3), C(2), C(1) and C(0)The sum code sequence D3 is a direct sum of 3 PRN code sequences C(2), C(1) and C(0)The sum code sequence D2 is a direct sum of 2 PRN code sequences C(1) and C(0). A sum code sequence acts as the preliminary composite code sequence D′h,n that is aforementioned. The final composite code sequence Dh,n aforementioned may be a ternary code sequence or a binary code sequence that is obtained from applying transformation to the sum code sequence. Preferably, binary code sequences (D3 and D5 for example) are available only for odd numbers of PRN code sequences.
In a case where the bit-wise combination with transformation applied by the transformation circuit 102 uses ternary code transformation, the correlation computation apparatus 100 shown in
T
h=Σn=0N−1Dh,n·rn (1)
In this embodiment, when a specific code bit in the composite code sequence Dh,n has a zero value, the correlation circuit 104 may skip correlation between the specific code bit and a specific data sample included in the data sequence rn that is paired with the specific code bit. Hence, the above formula (1) can be reformulated as below.
Since data samples in the data sequence rn that are paired with the corresponding zero code bits Dh,n=0 have no contribution to the correlation value Th, the correlation circuit 104 is allowed to obtain the correlation value Th by accumulating data samples paired with the corresponding non-zero code bits (Dh,n≠0) only. Since the number of data samples actually selected for computation of the correlation value Th is small than the number of all data samples included in the data sequence rn (which is a data block of N data samples), the computation of the correlation value Th has reduced complexity.
In another case where the bit-wise combination with transformation applied by the transformation circuit 102 uses binary code transformation, the correlation computation apparatus 100 shown in
S=Σn=0N−1rn (3)
With regard to computation of the correlation value Th (h={0, . . . , H−1 }) between the data sequence rn and the composite code sequence Dh,n generated from a transformation circuit (e.g., transformation circuit 102 shown in
For better comprehension of technical features of the proposed complexity reduction technique, the following assumes that a code bit with a value ‘1’ in the composite code sequence Dh,n (h={0, 1, . . . , H−1}) is mapped to 0, and a code bit with a value ‘−1’ in the composite code sequence Dh,n (h={0, 1, . . . , H−1}) is mapped to +1. Regarding the hypothesis correlation Corh, the correlation value Th between the data sequence rn {rn, n=0, 1, . . . , N−1} and the composite code sequence Dh,n {Db,n, n=0, 1, . . . , N−1} may be computed using the following formula.
T
h=Σn=0N−1(1−2·Dh,n)·rn=Σn=0N−1rn−2·Σn=0N−1Dh,n·rn=S−2·Sh (4)
In the above formula (4), the partial sum Sh can be expressed by the following formula.
Since data samples in the data sequence rnthat are paired with the corresponding zero code bits Dh,n=0 have no contribution to the partial sum Sb, the accumulation-based circuit 402 is allowed to obtain the partial sum Sh by accumulating data samples paired with the corresponding non-zero code bits (Dh,n=1) only. Since the number of selected data samples selected from the data sequence rn (which is a data block of N data samples) for computation of the partial sum Sh is small than the number of all data samples included in the data sequence rn (which is a data block of N data samples), the computation of the partial sum Sh has reduced complexity.
In accordance with the above formula (4) , the processing circuit 404 obtains a multiplication result (i.e., 2·Sh) from multiplying the partial sum Sh by a predetermined factor (i.e., 2) , and then generates the correlation value Th between the data sequence rn and the code sequence Dh,n by subtracting the multiplication result (i.e., 2·Sh) from the sum S of all data samples (i.e., S=Σn=0N−rn). As shown in
As shown in
Based on the above formula (6), the modified processing circuit 404 requires only a single bit-shifting circuit for generating a division result (i.e., S/2) that is shared by computation of all correlation values T0-TH−1.
Regarding the exemplary design shown in
Suppose that 3 (D=3) data samples in the data sequence rn is grouped as one data word. For each data word, the accumulation-based circuit 502 computes 7 binary sums Wj,e, each being a partial sum of the data word that is computed in a way similar to that specified in the formula (5), where e={1, 2, . . . , 7} and there are J data words per data sequence rn (which is a data block of N data samples). Suppose that 3 data samples grouped into the same data word are labeled by {Rn, Rn−1, Rn−2}, the binary sum Wj,1 (Wj,1=Rn−2) is obtained from one data sample Rn−2that is selected from the data samples {Rn, Rn−1, Rn−2} according to code bits included in a code word “001” with a decimal value e=1, the binary sum Wj,2 (Wj,2=Rn−1) is obtained from a selected data sample Rn−1 that is selected from the data samples {Rn, Rn−2} according to code bits included in a code word “010” with a decimal value e=2, the binary sum Wj,3 (Wj,3=Rn−1+Rn−2) is obtained from two data samples Rn−1 and Rn−2that are selected from the data samples {Rn, Rn−1, Rn−2} according to code bits included in a code word “011” with a decimal value e=3, the binary sum Wj,4 (Wj,4=Rn) is obtained from one data sample Rn that is selected from the data samples {Rn, Rn−2} according to code bits included in a code word “100” with a decimal value e=4, the binary sum Wj,5 (Wj,5=Rn+Rn−2) is obtained from two data samples Rn and Rn−2that are selected from the data samples {Rn, Rn−1, Rn−2} according to code bits included in a code word “101” with a decimal value e=5, the binary sum Wj,6 (Wj,6=Rn+Rn−1) is obtained from two data samples Rn and Rn−i that are selected from the data samples {Rn, Rn−1, Rn−2} according to code bits included in a code word “110” with a decimal value e=6, and the binary sum Wj,7 (Wj,7=Rn+Rn−1+Rn−2) is obtained from all data samples Rn, Rn−1, and Rn−2that are selected from the data samples {Rn, Rn−1, Rn−2} according to code bits included in a code word “111” with a decimal value e=7. It should be noted that, since partial sum accumulation is skipped for the code word “000”, no binary sum is pre-computed for the code word “000”.
In one exemplary implementation, the sum S of all data samples included in the data sequence rn can be computed using the above formula (3) . Alternatively, since the binary sum Wj,7 (Wj,7=Rn+Rn−1+Rn−2) is pre-computed for each of the J data words, the sum S of all data samples included in the data sequence rn can be obtained from accumulating binary sums Wj,7 pre-computed for J data words. Specifically, the above formula (3) may be reformulated as below.
S=Σ
n=0
N−1
r
n=Σj=0j−1Wj,7 (7)
Since there are J data words in the data sequence rn {rn, n=0, . . . , N−1} and one of the pre-computed binary sums Wj,e (j={0, . . . , J−1}) is selected as a partial sum of each data word according to a corresponding code word Eh,j in a code sequence Dh,n, the partial sum Sh (h={0, . . . , H−1}) may be computed using the following formula.
In other words, the binary sum Wj,1 pre-computed for the current data word is selected and output for accumulation if the code word Eh,j corresponding to the current data word is “001”; the binary sum Wj, 2 pre-computed for the current data word is selected and output for accumulation if the code word Eh,j corresponding to the current data word is “010”; the binary sum Wj,3 pre-computed for the current data word is selected and output for accumulation if the code word Eh,j corresponding to the current data word is “011”; the binary sum Wj,4 pre-computed for the current data word is selected and output for accumulation if the code word Eh,j corresponding to the current data word is “100”; the binary sum Wj,5 pre-computed for the current data word is selected and output for accumulation if the code word Eh,j corresponding to the current data word is “101”; the binary sum Wj,6 pre-computed for the current data word is selected and output for accumulation if the code word Eh,j corresponding to the current data word is “110”; and the binary sum W pre-computed for the current data word is selected and output for accumulation if the code word Eh,j corresponding to the current data word is “111”.
After the partial sum Sh (h={0, . . . , H−1}) is available, the correlation value Th (h={0, . . . , H−1}) can be computed using the above formula (4) or (6), depending upon actual design considerations.
For each data block, computation of binary sums and selection of one of the binary sums in the accumulation-based circuit 502 may be summarized by the following table.
One binary sum is computed once and may be shared by computation of multiple partial sums for different hypothesis correlations. For example, assuming that the code word in the composite code sequence D1,n and the code word in the composite code sequence DH−1,n have the same code bits “110”, the pre-computed binary sum Wj,6 is selected and involved in computation of the partial sum S1, and is also selected and involved in computation of the partial sum SH−1. In this way, the computation complexity of the partial sums S0-SH−1 can be further reduced by reusing the pre-computed binary sums.
The performance comparison between different correlation schemes is illustrated in the following table.
With regard to searching PRN codes of several satellite signals at the same time, when compared to a sum code correlation scheme, the proposed ternary code correlation scheme or binary code correlation can effectively reduce the computation complexity at the expense of a slight signal-to-noise ratio (SNR) loss.
The correlation computation apparatus 100 may be a part of a multi-satellite correlator in a GNSS receiver.
It should be noted that the GNSS receiver architectures shown in
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
This application claims the benefit of U.S. Provisional Application No. 63/345,053, filed on May 24, 2022. The content of the application is incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| 63345053 | May 2022 | US |
