The present invention generally relates to oscillators which provide a highly stable output frequency across a wide range of temperature variation.
Electronic clock generation classically relies on a reference oscillator based on an external crystal that is optionally multiplied and/or divided to generate the required clock. The key specifications of a clock, other than its target frequency, are frequency accuracy and stability. Frequency accuracy is the ability to maintain the target frequency across supply and temperature and is usually represented as drift from the target frequency in percent or parts per million (ppm). Long term stability, is impacted by the close-in phase noise of the oscillator. An oscillator using a high-Q element typically has a low phase noise profile, and thus good frequency stability, and is less sensitive to variations in oscillator amplifier gain, which is dependent on supply and temperature.
For example, crystal oscillators (XO) are high-Q oscillators that provide excellent frequency stability and frequency accuracy across supply and temperature stemming from the very high quality factor (Q) of the crystal. However, not all resonators, including crystals, have satisfactory performance across temperature, thus the need for extra circuitry and techniques to decrease and/or compensate for shifts in frequency due to temperature. A temperature compensated crystal oscillator (TCXO) typically incorporates extra devices that have temperature dependence to negate the temperature dependence of the crystal. The overall outcome is an oscillation frequency with low temperature dependence.
However, the ever increasing complexity of electronic systems due to requirements of supporting multiple standards, increased functionality, higher data rates and increased memory in a smaller size and at a lower cost is pushing designers to increase the integration level through the development of Systems on Chip (SoC) in deep submicron Complimentary MOS (CMOS) technologies to benefit from the increased gate density. Reference clocks incorporating crystal oscillators have not managed to scale or integrate due to the bulky nature of crystals, thus limiting the size and cost reduction possible for electronic systems.
Recent efforts in using high-Q MEMS resonators and Film Bulk Acoustic Resonators (FBARs) have illustrated possibilities of integrating a high-Q element and Application Specific Integrated Circuits (ASIC) in the same package. However, packaging induced stress and its impact on performance still remains as a challenging obstacle, since the high-Q element may require special packages and/or calibration that are not practical for SoCs. The stress may change the temperature behavior of the resonator, possibly resulting in large frequency shifts and accelerated aging. Therefore, special assembly and packaging techniques are typically required to mitigate such effects, which increase the cost of producing such clocks. Similar problems may be encountered by any resonator that is dependent on the mechanical properties of the resonator material, which require careful design and manufacturing procedures and processes.
Design requirements for applications such as USB and SATA, which do not require superior frequency accuracy and stability, can be satisfied using oscillators with relatively low-Q elements available in a CMOS process which can have adequate phase noise profiles generating good jitter performance. Current trials include the use of ring oscillators, relaxation oscillators and LC oscillators. However, the reported frequency accuracy of these implementations suffers from large drift across supply and temperature, making them ineffective for applications requiring precise accuracy and stability. A mitigation to reduce the drift across temperature requires trimming across temperature which is neither cost effective nor practical for SoCs.
Therefore, an integrated solution that relies on existing optimized process steps in CMOS technology and that satisfies frequency stability and jitter requirements would be of great value. LC tank oscillators operating at the tank temperature-null phase to achieve highly stable output frequency have been described in U.S. Pat. No. 8,072,281, incorporated herein by reference. Techniques and circuits described herein include improvements and extensions that take advantage of the temperature-null phase.
The present disclosure describes a substantially temperature-independent LC-based oscillator. The oscillator includes an LC oscillator tank and frequency stabilizer circuitry coupled to the LC oscillator tank to cause the LC oscillator tank to operate at a temperature null phase generating a tank oscillation at a phase substantially equal to a temperature null phase. The temperature null phase is a phase of the LC oscillator tank at which variations in frequency of an output oscillation of the oscillator with temperature changes are reduced or minimized.
In U.S. Pat. No. 8,072,281 a first order model of the frequency variation versus temperature was analyzed and the theoretical expectation for the temperature-null characteristic was introduced. From a practical point of view, there are more factors that affect the temperature-null characteristic. These factors influence the temperature-null characteristic which in turn influences the overall frequency deviation versus temperature. This increased deviation increases the complexity of trimming and calibration during the manufacture of such LC-based oscillators.
The invention herein describes a method to control the temperature temperature-null characteristic by controlling the harmonic content of the current input to the LC oscillator tank which is in turn done by controlling the amplitude of the output signal across temperature. By applying the described method, a substantially temperature-independent output signal is achieved. In another aspect of this disclosure, several methods and apparatus to control the amplitude of the output signal are described.
Referring now to
The implementation of an ideal pure inductor or capacitor is usually not possible due to the physical limitations of having a finite quality factor Q. Integrated inductors in CMOS technology to date have low Q factors when compared to MEMS resonators and crystals. Sources of losses in an inductor include the inductor metal ohmic losses rL and substrate resistive losses rSUB. Both of these losses are usually temperature dependent, and therefore, the overall impedance and Q of the inductor is temperature dependent.
The integrated capacitive part of the tank also suffers from a finite temperature dependent Q as well as temperature dependence of the capacitance value. As a result, the physical implementation of an integrated LC-tank will dictate a strong temperature dependence of the impedance and Q factor of the tank, which results in a temperature dependent tank resonance frequency.
An oscillator built using an LC oscillator tank 10 typically includes an amplifier responsible for overcoming the tank losses. For the oscillator to have sustained oscillations, the Barkhausen criterion requires an open loop gain greater than 1 and phase equal to zero. Assuming that the amplifier contributes a zero phase, then for oscillation to occur, the LC oscillator tank impedance ZTank must have a zero phase. The phase condition is used to derive the oscillation frequency ωosc as follows:
An oscillation condition of φTank=0 results in:
From the above equations 1-3, it can be seen that the oscillation frequency is temperature dependent if rL is temperature dependent. A linear variation of rL with temperature results in an almost linear variation of the oscillation frequency. In addition, any temperature variation in C would strongly contribute to the temperature dependence.
This is graphically shown in
r
L
=r
o(1+α(T−T0)) Equation 4
where α is a temperature coefficient of rL.
It is to be noted that the oscillation frequency is determined using the intersection of φTank=0 with the phase plots. The corresponding oscillation frequency across temperature is plotted in
Examining the phase plots again in
When the intersections occur at the same phase, a temperature insensitive tank operating point is created, and the tank is said to be operating at a temperature “null” (TNULL) with a phase φNull. The ideal temperature null phase occurs when the phase plots across temperature intersect at precisely the same phase. Oscillation with a phase across the tank ideally equal to φNull results in an oscillation frequency with zero deviation across temperature.
More realistic tanks exhibit a temperature null with small frequency deviations across temperature. This is illustrated graphically in
A Global Temperature Null (GNull) can be defined as a phase operating point φGNull that results in a minimum frequency deviation f across a temperature range T with a very small or zero change in oscillation frequency over temperature
at the center of the temperature range T0. A measure of the quality of the temperature null is the oscillation frequency deviation across temperature. A Figure of Merit (FOM) of the tank temperature null may be defined as:
where fT0 is the oscillation frequency at T0. The smaller the value of the FOM, the better the null quality is with the perfect null occurring at FOM=0.
A Local Temperature Null (LNull) can be defined as a phase operating point φLNull with
Alternatively, LNull can be defined at temperature T as the intersection of the phase plots of temperatures (T+δ) and (T−δ) where δ is infinitesimally small.
The GNull oscillation frequency ωGNull around temperature T0 may be derived by finding the intersection of two phase curves at temperatures T0+ΔT and T0−ΔT. For an LC oscillator tank with a linear temperature dependence of rL the phase and frequency at the GNull are as follows:
and therefore:
φGNull=−tan−1(2r0CωGNull) Equation 7
Now referring back to
Due to such factors, the practical profile of frequency versus temperature at TNULL deviates from the theoretical expectations of the first order model. The final frequency profile varies according to the weight of each factor and the combination of the different factors.
The profile of the frequency variation versus temperature at the temperature null phase is denoted by the “Temperature Null Characteristic” or the “TNULL Characteristic”.
In order to control the TNULL characteristic, the profile of the oscillation amplitude versus temperature is utilized so as to compensate for the frequency variations through the current harmonic content according to Equation 13 in U.S. Pat. No. 8,072,281. For convenience, Equation 13 is stated again here:
where ωos is the oscillation frequency, and In is the nth harmonic of the current in the tank.
In one aspect of this disclosure, the oscillation amplitude is deliberately changed across temperature with a specific profile. Thus, the harmonic content changes across temperature in a rather controlled manner which in turn induces variations in the oscillation frequency according to Equation 9. This amplitude profile with temperature is manipulated such that the induced frequency variations combined with the original frequency variations produce the required TNULL characteristic. Hence, the technique provides substantial control over the TNULL characteristic.
In reference to
In another aspect of this disclosure, the reference voltage is programmed through a reference voltage generation circuit. An example of such a circuit is shown as 100 in
V0≈V00 Equation 10A
V
1(T)=V01(1+tV11(T−T0)) Equation 10B
V
2(T)=V02(1+tV12(T−T0)+tV22(T−T0)2) Equation 10C
V
3(T)=V03(1+tV13(T−T0)+tV23(T−T0)2+tV33(T−T0)3) Equation 10D
V
X(T)=V0X(1++tV1X(T−T0)+tV2X(T−T0)2 . . . +tVXX(T−T0)X) Equation 10E
V
n(T)=V0n(1+tV1n(T−T0)+tV2n(T−T0)2 . . . +tVnn(T−T0)n) Equation 10F
Where To is the room temperature expressed in Kelvin and V0x is the value of the bias voltage Vx(T) at room temperature To. Furthermore, tvyx is the yth order temperature coefficient of the voltage Vx(T) where y is an integer that satisfies the inequality 1≦y≦n. Note that V0(T) is a weak function of temperature and thus its temperature dependence is neglected in the equations.
The voltages V0(T) to Vn(T) are fed into the polynomial generator block 120. The polynomial generator block 120 combines the different bias voltages with the proper weighting and signal conditioning for each of them so as to generate the final reference voltage 53 Vref(T) with the required temperature dependence. The polynomial generator block 120 generates Vref(T) as a programmable nth order polynomial function of temperature according to the following equation:
V
ref(T)=Vref0(1+tV1(T−T0)+tV2(T−T0)2 . . . +tVn(T−T0)Xn) Equation 11
Where tvy is the yth order temperature coefficient for Vref(T) and y is an integer that satisfies the inequality 1≦y≦n and Vrefo is the value of Vref(T) at room temperature To.
Moreover, Vrefo and the coefficients tv1 through tvn are programmed using digital words that are fed to the polynomial generator block 120 as shown in
The combination of the coefficients tv1 through tvn determines the final TNULL characteristic. Every combination of coefficients generates a different TNULL characteristic according to the weight and strength of each coefficient.
In another aspect of this disclosure, the different orders of temperature dependence can be generated by different circuits known in literature. As an example, a positive first order temperature dependent current can be generated by a thermal voltage (VT) referenced bias circuit as the circuit shown in
I
PTAT(T)=I0(1+α(T−T0)) Equation 12
where Io is the nominal current value at To and α is the first order temperature coefficient of the current and it is approximately 3300 ppm/° K. for typical Silicon based processes.
In another aspect of this disclosure, the circuit 300 in
V
1(T)=I0R(1+α(T−T0)) Equation 13
Hence, the circuit 300 of
In another aspect of this disclosure a second order temperature dependent voltage is produced by circuit 400 in
R
t(T)=R0(1+αR(T−T0)) Equation 14
where Ro is the value of the resistance at temperature To and αR is the first order temperature coefficient of the resistance. The substantially linear temperature dependent resistance Rt(T) can be realized by several methods. For example, in a typical silicon-based process, Rt(T) can be realized by process modules such as and not limited to diffusion resistance, N-Well (N-doped substrate) resistance and active resistances realized by transistor devices.
Finally, the resulting voltage V2(T) is given as:
V
2(T)=IPTAT(T)Rt(T) Equation 15A
V
2(T)=I0R0(1+(α+αR)(T−T0)+ααR(T−T0)2) Equation 15B
Therefore, for this specific example V2(T) is generated with tv12=α+αR and tv22=ααR.
In order to obtain negative first and second order temperature coefficients, Complementary To Absolute Temperature (CTAT) circuits may be used. A CTAT circuit 500 is shown in
I
CTAT(T)=I0(1−αC(T−T0)) Equation 16
Where Io is the nominal current value at To and αC is the first order temperature coefficient of the current and it is approximately 3300 ppm/° K. for typical Silicon based processes.
In another aspect of this disclosure,
V
1(T)=I0R(1−αC(T−T0)) Equation 17
V
2(T)=I0R0(1+(αR−αC)(T−T0)−αCαR(T−T0)2) Equation 18
In another aspect of this disclosure, coefficients with orders higher than the 2nd order can be obtained by utilizing similar methods which depends upon having resistances that are highly temperature dependent.
The circuit comprises an operational amplifier in a unity feedback configuration. It regenerates Vx(T) on a resistor R that is weakly dependent on temperature and hence generates Ix(T) which is a current of the same order of temperature dependence as Vx(T) such that
Ix(T) is then mirrored and forced to flow in the resistor Rt(T) which is substantially linear with temperature and finally generates Vx+1(T):
As will be recognized by those skilled in the art, the innovative concepts described in the present application can be modified and varied over a wide range of applications. Accordingly, the scope of the invention should not be limited to any of the specific exemplary teachings discussed, but is instead defined by the following claims.
Number | Date | Country | |
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61521677 | Aug 2011 | US |