The present application is related to co pending U.S. patent application Ser. No. 10/367,070 entitled, “Real-Time Dynamic Design of Liquid Crystal Display (LCD) Panel Power Management Through Brightness Control”, filed Feb. 14, 2003, co pending U.S. patent application Ser. No. 10/663,316, entitled “Automatic Image Luminance Control with Backlight Adjustment”,filed Sep. 15, 2003, co pending U.S. patent application Ser. No. 09/896,341 entitled, “Method and Apparatus for Enabling Power Management of a Flat Panel Display”, filed Jun. 28, 2001 and co pending U.S. patent application Ser. No. 10/745,239 entitled “Method and Apparatus for Characterizing and/or Predicting Display Backlight Response Latency”, filed Dec. 22, 2003, all assigned to the assignee of the present invention.
An embodiment of the present invention relates to the field of display backlight control and, more particularly, to coordinating changes in backlight intensity with image luminance changes.
Computing devices that can be easily moved from place to place often include an alternative power source, such as a battery, to facilitate mobility. Examples of such devices include laptop or notebook computers, personal digital assistants (PDAs), wireless phones, etc.
Where a battery or another limited power source is used, it is typically desirable to provide for efficient power usage to enable a longer operating period. Various measures may be taken to extend battery life, such as, for example, shutting down components that are not in use.
In many computing devices the display is responsible for a relatively large percentage of overall power consumption. In laptop computers, for example, the display may account for 30% of the power consumed. In order to reduce display power consumption, some computing systems may reduce the panel backlighting when the system is being powered by a battery instead of an AC power source. Reducing the panel backlighting according to one or more conventional approaches may be perceived as a reduction in display quality, particularly in brighter ambient environments.
The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings in which like references indicate similar elements, and in which:
A method and apparatus for coordinating backlight intensity changes with image luminance changes are described. In the following description, particular software modules, hardware modules, components, systems, etc. are described for purposes of illustration. It will be appreciated, however, that other embodiments are applicable to other types of software modules, hardware modules components, and/or systems, for example.
References to “one embodiment,” “an embodiment,” “example embodiment,” “various embodiments,” etc., indicate that the embodiment(s) of the invention so described may include a particular feature, structure, or characteristic, but not every embodiment necessarily includes the particular feature, structure, or characteristic. Further, repeated use of the phrase “in one embodiment” does not necessarily refer to the same embodiment, although it may.
Placement-related terms in the description that follows such as, for example, above, below, behind, etc. may be used to indicate relative placement in the context of the figures as shown. It will be appreciated that different orientations of the various components of the invention may result in a different relative placement of components to each other.
For one embodiment, an electronic system, such as the computing system of
For example, for one embodiment, in response to determining that there has been a display-related event during a vertical frame period indicating that an associated change to at least one of a backlight intensity and an image luminance setting is to be undertaken, an interrupt is enabled. Then, during subsequent interrupt processing, corresponding changes to the backlight intensity and the image luminance are applied in a coordinated manner.
Further details of these and other embodiments are provided in the description that follows.
Embodiments of the invention may be implemented in one or a combination of hardware, firmware, and software. Embodiments of the invention may also be implemented in whole or in part as instructions stored on a machine-readable medium, which may be read and executed by at least one processor to perform the operations described herein. A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, a machine-readable medium may include read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical, acoustical or other form of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and others.
The panel 120 may include, for example, a liquid crystal display (LCD) panel that is arranged to display an image that is illuminated by the backlight(s) 110. Other types of backlit display technologies may also be used for various embodiments.
The light spreader 130 may be arranged substantially behind the backlight(s) 110, and may also extend above/below the backlight(s) 110 to direct their light to the rear of the panel 120. The light spreader may reflect and/or diffuse light from the backlight(s) 110 to illuminate the panel 120 substantially uniformly along its surface. Other embodiments, using, for example white LEDs, may not use a light spreader, or may be incorporated within a light box, or use an encapsulated lens for directing radiated light energy.
The computing system 200 includes a processor 202 coupled to a bus 205. The processor 202 includes at least one execution unit 207 to execute instructions that may be stored in one or more storage devices in the system 200 or that are otherwise accessible by the system 200.
For one embodiment, the processor 202 may be a processor from the Pentium® family of processors such as, for example, a processor from the Pentium-M family of processors available from Intel Corporation of Santa Clara, Calif. Alternatively, a different type of processor and/or a processor from a different source and/or using a different architecture may be used instead or in addition to the above-described processor. Other types of processors that may be used for various embodiments include, for example, a digital signal processor, an embedded processor or a graphics processor.
A graphics and memory control hub (or GMCH) 210 is also coupled to the bus 205. The graphics and memory control hub 210 may include a memory controller (not shown) that is coupled to a memory subsystem 215. The memory subsystem 215 is provided to store data and instructions to be executed by the processor 202 or any other device included within the electronic system 200. For one embodiment, the memory subsystem 215 may include dynamic random access memory (DRAM). The memory subsystem 215 may, however, be implemented using other types of memory in addition to or in place of DRAM. For some embodiments, the memory subsystem 215 also includes BIOS (Basic Input/Output System) ROM 217 including a Video BIOS Table (VBT) 219. Additional and/or different devices not shown in
Also coupled to the graphics and memory control hub 210 over a bus 243 is an input/output (I/O) control hub 245 or other type of I/O controller, which provides an interface to input/output devices. The input/output controller 245 may be coupled to, for example, a Peripheral Component Interconnect (PCI™) or PCI Express™ bus 247 adhering to a PCI Specification such as Revision 2.1 (PCI) or 1.0a (PCI Express) promulgated by the PCI Special Interest Group of Portland, Oreg. For other embodiments one or more different types of buses such as, for example, an Accelerated Graphics Port (AGP) bus according to the AGP Specification, Revision 3.0 or another version, may additionally or alternatively be coupled to the input/output controller 245 or the bus 247 may be a different type of bus.
Coupled to the input/output bus 247 for one embodiment are an audio device 250 and a mass storage device 253, such as, for example, a disk drive, a compact disc (CD) drive, and/or a network device to enable the electronic system 200 to access a mass storage device over a network. An associated storage medium or media 255 is coupled to the mass storage device 253 to provide for storage of software and/or other information to be accessed by the system 200.
In addition to an operating system (not shown) and other system and/or application software, for example, the storage medium 255 may store a graphics stack 237 to provide graphics capabilities as described in more detail below. A display driver 241 may be included in the graphics stack 237. For one embodiment, the display driver 241 includes or works in cooperation with at least an interpolation module 257 and a coordination module 259 described in more detail below. Other modules may also be included for other embodiments.
The system 200 may also include a wireless local area network (LAN) module 260 and/or an antenna 261 to provide for wireless communications and an input device 262 such as a keyboard, a cursor control device, a stylus, etc to receive user input for the system 200. A battery or other alternative power source adapter 263 may also be provided to enable the system 200 to be powered other than by a conventional alternating current (AC) power source. Alternatively, a battery connected to the adapter 263 may provide the primary power source for the system 200 for some embodiments.
With continuing reference to
In various implementations, two or more of elements discussed above may be integrated within a single device or in a different manner for other embodiments. For example, as shown in
The frame buffer 229, timing generator 219, buffer and blender 221, and encoder 223 may cooperate to drive the panel 236 of the panel display 235. The frame buffer 229 may include a memory (not shown) and may be arranged to store one or more frames of graphics data to be displayed by the panel display 235.
The timing generator 219 may be arranged to generate a refresh signal to control the refresh rate (e.g. frequency of refresh) of the panel 236. The timing generator 219 may produce the refresh signal in response to a control signal from the display driver 241. In some implementations, the refresh signal produced by the timing generator 219 may cause the panel 236 to be refreshed at a reference refresh rate (e.g. 60 Hz) during typical (e.g. non-power saving) operation. During power saving operation, the timing generator 219 may lower refresh rates for panel display 110 (e.g. to 50 Hz, 40 Hz, 30 Hz, etc.). Associated with the refresh rate is a vertical blanking interval (VBI).
The buffer and blender 221 may read graphics data (e.g. pixels) from the frame buffer 229 in graphics memory at the refresh rate specified by the refresh signal from the timing generator 219. The buffer and blender 221 may blend this graphics data (e.g. display planes, sprites, cursor and overlay) and may also gamma correct the graphic data. The buffer and blender 221 also may output the blended display data at the refresh rate. In one implementation, the buffer and blender 221 may include a first-in first-out (FIFO) buffer to store the graphics data before transmission to the encoder 223.
The encoder 223 may encode the graphics data output by the buffer and blender 221 for display on the panel 236. Where the panel 236 is an analog display, the encoder 223 may use a low voltage differential signaling (LVDS) scheme to drive the panel 236. For other implementations, if the panel 236 is a digital display, the encoder 223 may use another encoding scheme that is suitable for this type of display. Because the encoder 223 may receive data at the rate output by the buffer and blender 221, the encoder may refresh the panel 236 at the refresh rate specified by the refresh signal from the timing generator 219.
The PWM 225 and inverter 231 may cooperate to drive the backlight(s) 239 in the panel 235. The PWM may be arranged to output a PWM signal that has a modulation frequency and a duty cycle. For some implementations, the duty cycle setting of the PWM 225 may be varied by the display driver 241, or in another manner, to dim the light output by the backlight(s) 239. The PWM 225 may be arranged to output the PWM signal to the inverter 231 at a reference modulation frequency and duty cycle during typical (e.g. non-power saving) operation.
For one implementation, the PWM 225 may receive a timing signal from the timing generator 219 and may derive its base frequency from this timing signal, upon which the output duty cycle is modulated according to a PWM interface setting value. Such an implementation is illustrated by the dashed line between the timing generator 219 and the PWM 225. For other implementations, however, the PWM 225 may include its own, separate timing generator for use in deriving its reference clock. In either case, the modulation frequency of PWM 225 may be adjusted (e.g. lowered during a power saving mode) by the display driver 241 or another module.
The inverter 231 may be arranged to receive the PWM signal at the modulation frequency from the PWM 225 and to drive the backlight(s) 239 based on the modulation frequency of the PWM signal. The inverter 231 may produce an output whose “backlight frequency” is a multiple of the modulation frequency of the received PWM signal from the PWM 225. For one implementation, the backlight frequency of the output of the inverter 231 may be substantially the same frequency as the PWM signal. For other implementations, the inverter 231 may be arranged to effect a higher multiple of the modulation frequency, producing an output signal with a backlight frequency that may vary over a larger range.
For one embodiment the gamma LUT 227 may be provided to adjust the sub-pixel colors prior to being sent to the display device. In an alternate embodiment a separate luminance adjustment stage (e.g. using HSI or YUV color-space conversion and adjustment) may be included prior to or after a stage in which adjustments to the gamma LUT are performed. As such, color luminance or contrast may be adjusted via modification of the color look-up table (gamma LUT) 227 or through a discrete luminance adjustment stage. Other approaches to adjusting image luminance are within the scope of various embodiments.
A brighter or dimmer luminance of color (effecting different levels of image contrast) being displayed by a pixel may be achieved by scaling the value representing each sub-pixel color within the pixel. The particular values used to represent different colors depend upon the color-coding scheme, or color space, used by the particular display device. By modifying color luminance of the sub-pixels (by scaling the values representing sub-pixel colors), the perceived brightness of the display image may be modified on a pixel-by-pixel basis.
It will be appreciated that systems according to various embodiments may not include all the elements described in reference to
For one embodiment, as mentioned above, the brightness of the backlight(s) 239 may be dynamically adjusted to provide for more efficient power usage, to adjust brightness according to ambient conditions and/or to compensate for image intensity changes. Color intensity values for the pixels may also be dynamically adjusted to change display contrast based on ambient conditions and/or backlight intensity. By adjusting the backlight and contrast together, it may be possible for some embodiments, to improve power efficiency while still providing a substantially similar perceived display brightness.
Issues may arise, however, if the adjustments to the backlight and image luminance are not coordinated properly as discussed above. For example, a portion of an image may be displayed with one brightness and contrast level while the brightness or contrast level of another portion of the image may be different.
More particularly, while changes to the gamma LUT 227 and resultant changes to the image luminance are effectively instantaneous (e.g. the new gamma-range color/luminance/contrasts may take effect immediately, on the next vertical scanline, or on the next vertical frame after the change is made), adjustment of backlight brightness is not typically immediate. Apart from the communication overhead through the PWM 225 and inverter 231, for example, the PWM 225 takes at least an additional pulse in order to reach a new duty-cycle associated with a target backlight brightness, and the inverter 231 may take several pulses to stabilize at a new setting. Further, where fluorescent illumination is used, for example, there may be a latency of hundreds to thousands of milliseconds for some exemplary backlights to reach a target perceptual brightness level (e.g. due to the time it takes gas-electric discharge to cause the fluorescent lining of the lamp to illuminate to the target level).
To substantially avoid associated visually disturbing artifacts, for one embodiment changes to the backlight brightness and gamma table (resulting in a change in image luminance) are coordinated to occur close in time to each other.
Referring to
With continuing reference to
The gamma look-up table (or screen color palette) may be changed by, for example, an application, user or an operating system. A request for such a change may be received by a display driver such as the display driver 241 of
The backlight setting may be changed by a user via a hotkey, a user interface control or other input mechanism, or by a BIOS, operating system or other routine that changes backlight based on a change in power source, ambient light or system activity, for example. The target backlight brightness and/or image luminance may be determined based on the ambient light level detected by the ambient light sensor 279, for example. In a bright environment, for example, maximum backlight intensity and/or increased color brightness may be used to provide an image that is more easily viewable. In a dimly lit room, however, decreased backlight intensity and/or color brightness may be used to provide an image that is perceived to be of substantially the same quality. Other factors may also or alternatively be considered to determine when changes to the backlight brightness and/or image luminance are to be initiated.
In response to a requested change to a backlight setting, for one embodiment, a display driver such as the display driver 241 may receive an interrupt, store the desired backlight value and set a backlight dirty flag.
A change in average image intensity may be detected as display hardware, such as the graphics and memory control hub 210, calculates a histogram for a particular frame or image indicating the number of pixels associated with each of several luminance values. An example of such a histogram and the manner in which it may be determined for one embodiment is described in more detail in the above-referenced co pending patent application Ser. No. 09/896,341 entitled, “Method and Apparatus for Enabling Power Management of a Flat Panel Display”, filed Jun. 28, 2001. Other approaches for determining average image intensity are within the scope of various embodiments.
For one embodiment, such a histogram is calculated for each frame, and an associated average image intensity is determined based on the histogram. The average image intensity may then be compared to an average image intensity for a previous frame to determine whether there has been a change. For some embodiments, the average image intensity change versus the intensity for which the current settings were determined must be greater than or equal to a given trigger point in order to cause a resulting change in backlight and/or image luminance values. For some embodiments, this trigger point may be programmable by the display driver 241 or other software, for example.
In response to a change in average image intensity that is greater than or equal to the trigger point, for example, display hardware, such as the graphics and memory control hub 210 may raise a histogram interrupt. Display hardware or software, such as the display driver 241 may then set a histogram dirty flag.
Still referring to
At decision block 610, it is determined whether a dirty flag is set. For the embodiment described above, this action determines whether any of the histogram, backlight or gamma dirty flags have been set. If so, then at block 615, a deferred procedure call is scheduled to provide additional processing.
For one embodiment, in order to maintain a substantially consistent user-perceived display brightness level, changes in backlight may be applied with corresponding changes in image luminance. Some exemplary approaches for doing so are described in one or more of the co pending related patent applications referenced above. In particular, U.S. patent application Ser. No. 09/896,341 entitled, “Method and Apparatus for Enabling Power Management of a Flat Panel Display”, filed Jun. 28, 2001 describes how to determine new luminance values based on changes to the backlight settings and vice versa. The approach described therein may be used to perform the action at block 710 for some embodiments. Other approaches for determining the display-related changes to be applied may be used for various embodiments.
At block 715, the determined changes to the backlight, if applicable are applied. To adjust the backlight brightness for one embodiment, the backlight control agent 275 may write a value representing a scaling factor to a backlight control register (BCR) 277. The value stored in the backlight control register may then be combined with one or more other parameters to determine a duty cycle for the PWM 225 to control backlight intensity.
Further details of the manner in which the backlight and/or image luminance may be adjusted for some embodiments may be provided in one or more of the above-referenced co-pending patent applications.
Changes to the backlight are applied first because they are associated with a given latency as described above. At block 720, a post-processing flag may then be set indicating that further actions are to be taken in, for example, a post-processing deferred procedure call.
A delay count may also be initiated at block 720. The delay count is based on the latency associated with changing the backlight from the prior intensity level to the target intensity level identified at block 710 (where it is determined that such change is to be made). The delay associated with changing the backlight intensity from a first level to a second target level may be determined according to one or more of the approaches described in co pending U.S. patent application Ser. No. 10/745,239 entitled “Method and Apparatus for Characterizing and/or Predicting Display Backlight Response Latency”, filed Dec. 22, 2003.
For one embodiment, an interpolation module 257 in the display driver 241 loads the parameters 271 stored as a result of characterizing backlight response, for example, and effectively models a response curve and approximate latency involved in transitioning between current and target backlight settings as shown in
For some embodiments, the delay count may be initiated from the time of the interrupt at the vertical blank, vertical sync or at another time including at a specific scanline, based on a timer, etc. The delay count may be specified in terms of a number of refreshes or frames (either integer or fractional number), a number of scanlines, in terms of fields, or any other manner.
Referring back to
Referring back to
The exemplary approaches shown in
Thus, various embodiments of a method and apparatus for synchronizing backlight intensity changes with image luminance changes are described. In the foregoing specification, the invention has been described with reference to specific exemplary embodiments thereof. It will, however, be appreciated that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. For example, while various embodiments describe using a gamma look-up table to control image luminance, other approaches for controlling image luminance are within the scope of various embodiments. For such embodiments, a different type of dirty flag may replace the gamma dirty flag and be set in a different manner responsive to hardware and/or software that affects image luminance. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
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