Method for fabricating liquid crystal display device

Abstract

A method for fabricating a liquid crystal display includes: forming a gate electrode on a substrate; sequentially providing an insulation layer, a semiconductor layer and an etch stopper layer on the gate electrode; patterning the etch stopper layer and the semiconductor layer to form an etch stopper layer pattern and a semiconductor layer pattern; removing both side portions of the etch stopper layer pattern to expose the lower semiconductor layer pattern portion; forming a conductive layer on an entire surface of the substrate; patterning the conductive layer to form source and drain electrodes and defining a channel region; forming a passivation layer having a contact part on the entire surface of the substrate; and forming a pixel electrode connected with the drain electrode via the contact part on the passivation layer. An etch stopper can be used without additionally performing a masking process.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.

In the drawings:

FIG. 1 is a plan view showing a unit pixel of a general liquid crystal display (LCD);

FIG. 2 is a sectional view taken along line II-II in FIG. 1 showing a section of the general LCD;

FIGS. 3A to 3E are process sectional views showing a fabrication process of the general LCD; and

FIGS. 4A to 4L are process sectional views showing a fabrication process of an LCD according to the present invention.

Claims

1. A method for fabricating an LCD comprising: forming a gate electrode on a substrate;sequentially providing an insulation layer, a semiconductor layer and an etch stopper layer on the gate electrode;patterning the etch stopper layer and the semiconductor layer to form an etch stopper layer pattern and a semiconductor layer pattern;removing both side portions of the etch stopper layer pattern to expose the lower semiconductor layer pattern;forming a conductive layer on an entire surface of the substrate;patterning the conductive layer to form source and drain electrodes and defining a channel region;forming a passivation layer having a contact part on the entire surface of the substrate; andforming a pixel electrode connected with the drain electrode via the contact part on the passivation layer.

2. The method of claim 1, wherein patterning the etching stopper layer and the semiconductor layer include using a slit exposure mask.

3. The method of claim 2, wherein patterning the etching stopper layer and the semiconductor layer to form the etch stopper layer and the semiconductor layer comprises: coating a photosensitive film on the etch stopper layer and the semiconductor layer;forming a photosensitive film pattern using the slit exposure mask for exposing and developing process on the photosensitive film; andetching the etch stopper layer and the semiconductor layer using the photosensitive film pattern as a mask.

4. The method of claim 3, wherein the both side portions of the photosensitive film pattern are thicker than that a central portion through the exposing and developing process using the slit exposure mask.

5. The method of claim 3, wherein exposing a portion of the semiconductor layer by removing the both side portions of the etch stopper layer includes using an ashing process to remove a portion of the photosensitive film pattern.

6. The method of claim 1, wherein patterning the etch stopper layer and the semiconductor layer is performed through a masking process using a single mask.

7. The method of claim 1, further comprising: forming an ohmic contact layer on the entire surface of the substrate including the semiconductor layer pattern and the etch stopper layer pattern.

8. A method for fabricating a liquid crystal display comprising: providing first and second substrates;forming a gate electrode on the first substrate;sequentially providing an insulation layer, a semiconductor layer and an etch stopper layer on the gate electrode;patterning the etch stopper layer and the semiconductor layer to form an etch stopper layer pattern and a semiconductor layer pattern;removing both side portions of the etch stopper layer pattern to expose the lower semiconductor layer pattern part;forming a conductive layer on an entire surface of the first substrate;patterning the conductive layer to form the source and drain electrodes and defining a channel region;forming a passivation layer having a drain electrode contact part on the entire surface of the substrate;forming a pixel electrode connected with the drain electrode via the contact part on the passivation layer;providing a black matrix and a color filter layer on the second substrate; andforming a liquid crystal layer between the first and second substrates.

9. The method of claim 8, wherein patterning the etching stopper layer and the semiconductor layer includes using a slit exposure mask.

10. The method of claim 9, wherein patterning the etching stopper layer and the semiconductor layer to form the etch stopper layer and the semiconductor layer comprises: coating a photosensitive film on the etch stopper layer and the semiconductor layer;forming a photosensitive film pattern using the slit exposure mask for an exposing and developing process on the photosensitive film by using the slit exposure mask; andetching the etch stopper layer and the semiconductor layer using the photosensitive film pattern as a mask.

11. The method of claim 10, wherein the both side portions of the photosensitive film pattern are thicker than a central portion through the exposing and developing process using the slit exposure mask.

12. The method of claim 10, wherein exposing a portion of the semiconductor layer by removing the both side portions of the etch stopper layer includes using an ashing process to remove a portion of the photosensitive film pattern.

13. The method of claim 8, wherein patterning the etch stopper layer and the semiconductor layer is performed through a masking process using a single mask.

14. The method of claim 8, further comprising: forming an ohmic contact layer on the entire surface of the substrate including the semiconductor layer pattern and the etch stopper layer pattern.