Method for Forming Isolation Layer in Semiconductor Devices

Abstract

A method for forming an isolation layer for a semiconductor device is provided. The preferred method is capable of securing a gap fill margin during formation of an isolation layer. A device isolation layer formed according to a preferred method includes a trench formed in a device separation area of a semiconductor substrate; a thermal oxidation layer formed in a part of the trench; an oxidation silicon layer formed on the thermal oxidation layer; and an oxidation isolation layer formed on the oxidation silicon layer and filling the trench.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle of the invention.

FIGS. 1 a to 1d are cross-sectional views showing a related art method for forming an isolation layer for a semiconductor device;

FIG. 2 is a cross-sectional view of an isolation layer structure in accordance with an embodiment of the present invention; and

FIGS. 3 a to 3g are cross-sectional views showing a method for forming an isolation layer structure in accordance with an embodiment of the present invention.

Claims

1. An isolation layer for a semiconductor device comprising: a trench formed to a predetermined depth in a device isolation area of a semiconductor substrate;a thermal oxidation layer formed in the trench;an oxidation silicon layer formed on the thermal oxidation layer; andan oxidation isolation layer formed on the oxidation silicon layer, wherein the oxidation isolation layer fills the trench.

2. The isolation layer according to claim 1, wherein the oxidation silicon layer comprises SRO (Silicon Rich Oxide) formed by adding oxidation silicon material (SiH4) to a High Density Plasma oxidation layer.

3. The isolation layer according to claim 1, wherein the oxidation isolation layer fills the trench without gaps by being formed on the oxidation silicon layer after a first planarization process.

4. A method for forming an isolation layer for a semiconductor device comprising: sequentially forming an oxide layer and a nitride layer on a semiconductor substrate;forming a photosensitive film pattern for forming a trench on the nitride layer;forming a trench having a predetermined depth using the photosensitive film pattern as an etching mask;forming a thermal oxidation layer on the semiconductor substrate, including the trench;performing a first planarization process to remove the thermal oxidation layer formed on the nitride layer and to remove the nitride layer;forming an oxidation silicon layer on the semiconductor substrate including the oxide layer and a part of the trench;forming an oxidation isolation layer on the semiconductor substrate and filling the trench performing a second planarization process to remove a portion of the oxidation isolation layer to expose the oxidation silicon layer; andperforming a wet etching process to remove a second portion of the oxidation isolation layer, a portion of the oxidation silicon layer and the oxide layer from a top surface of the semiconductor substrate.

5. The method according to claim 4, wherein the oxidation silicon layer comprises SRO (Silicon Rich Oxide) formed by adding oxidation silicon material (SiH4) to a High Density Plasma oxidation layer.

6. The method according to claim 4, wherein the oxidation isolation layer fills the trench without gaps.