Claims
- 1. A method comprising the steps of:disposing a first mask over a substrate; implanting a first impurity type in the substrate to form a first impurity type well such that a border of the well is defined by the first mask; disposing a first spacer adjacent to the first mask; and implanting a second impurity type in the substrate to form a second impurity type diffusion within the well such that a border of the diffusion is defined by the spacer removing the first mask and the first spacer; disposing a second mask over the first impurity type well aligned with the border of the well; implanting the second impurity type in the substrate to form a second impurity type well such that a border of the second impurity type well is defined by the second mask; disposing a second spacer adjacent to the second mask; and implanting the first impurity type in the substrate to form a first impurity type diffusion within the second impurity type well such that a border of the first impurity type diffusion is defined by the second spacer.
RELATED APPLICATIONS
This application is a divisional of application Ser. No. 09/009,456, filed Jan. 20, 1998.
US Referenced Citations (11)
Non-Patent Literature Citations (2)
Entry |
IBM Technical Disclosure Bulletin, “Structures and Layout of a New Self-Aligned Pillar CMOS Logic Gate and SRAM Cell,” vol. 32, No. 9A, Feb. 1990. pp. 338-340. |
IBM Technical Disclosure Bulletin, “New Self-Aligned Pillar CMOS Technology—Structures and Fabrication Methods,” vol. 32, No. 8A, Jan. 1990. pp. 144-145. |