Claims
- 1. Method for the manufacture of a test socket with an embossed support layer (12) comprising several embossments (16) with projecting relief, the embossments being provided with at least one conducting test area (14) near the top of the embossment, that may be brought into electrical contact with a terminal of the component, the method comprising the following steps:a) the formation of cavities (42) in a substrate (42) forming relief with a shape corresponding to or complementary to an embossment of a support layer, b) shaping the support layer on the substrate, so as to form embossments (16) in the layer corresponding to the cavities, and separation of the support layer (12) from the substrate, c) the formation of test areas (14) by forming a metal layer.
- 2. Method according to claim 1, in which steps a), b) and c) are implemented in the indicated order, step c) including the deposition of a metallic layer on the support layer (12), then etching of this layer by means of a mask fixing the size and location of the test areas (14).
- 3. Method according to claim 1, in which step c) is done before step b), the test areas (14) being formed by deposition of metal on the substrate, then by etching the metal by means of a mask fixing the size and location of the said test areas.
- 4. Method according to claim 1, in which step b) comprises deposition of a layer of a polymerisable material on the substrate, followed by polymerisation of the said material to form the support layer (12).
- 5. Method according to claim 1, comprising the formation of small upstands (48) at the bottom of the cavities (42) in the substrate (40), before step b), these upstands (48) defining the depressions (15) at the top of the embossments (16) in the support layer (12) when it is being moulded.
- 6. Method according to claim 1, in which the formation of small upstands (48) at the bottom of cavities (42) includes the deposition of a meltable material at the bottom of the cavities and then a heat treatment at a sufficiently high temperature to enable shaping of the material by remelting.
- 7. Method according to claim 1, also comprising placement of the support layer (12) on a rigid support (30).
Priority Claims (1)
Number |
Date |
Country |
Kind |
00 13616 |
Oct 2000 |
FR |
|
CROSS-REFERENCE TO RELATED APPLICATION
This application claims priority based on International Patent Application No. PCT/FR01/03287, entitled “Component Test Socket And Process For Making Such A Socket” by Francois Baleras and Catherine Brunet-Manquat, which claims priority of French Application No. 00/13616, filed on Oct. 24, 2000, and which was not published in English.”
PCT Information
Filing Document |
Filing Date |
Country |
Kind |
PCT/FR01/03287 |
|
WO |
00 |
Publishing Document |
Publishing Date |
Country |
Kind |
WO02/35244 |
5/2/2002 |
WO |
A |
US Referenced Citations (10)
Non-Patent Literature Citations (2)
Entry |
Akram, Salman, “Silicon Contact Technology for Flip Chip”, 1999, IEEE Electronic Components and Technology Conference, pp 510-514. |
Crowley, Robert, “Socket Developments for CSP and FBGA Package”, printed from http://chipscalereview.com/chipscalen2/9805/crowley1.htm on Apr. 13, 2000. |