Claims
- 1. A method for the manufacture of a III-V heterostructure device comprising the steps of:
- a. depositing on an InP substrate a sequence comprising the following semiconductor layers:
- semiconductor collector contact layer,
- semiconductor collector layer
- semiconductor base layer,
- semiconductor graded emitter-base layer
- semiconductor emitter layer,
- semiconductor emitter contact layer,
- b. masking said semiconductor emitter contact layer, leaving a portion of the emitter contact layer exposed,
- c. etching away the exposed portion of said semiconductor emitter contact layer, leaving a semiconductor emitter contact, and leaving a portion of said semiconductor emitter layer exposed,
- d. etching away the exposed portion of said semiconductor emitter layer using said semiconductor emitter contact as an etch mask leaving a semiconductor emitter under said semiconductor emitter contact, and leaving a portion of said semiconductor graded emitter-base layer exposed,
- e. depositing a multilayer base contact material on the exposed portion of said semiconductor graded emitter base layer, said multilayer base contact material comprising a first contact material layer of Pd with a thickness in the range 25 .ANG. to 75 .ANG., a second contact material layer of Pt with a thickness in the range 300 .ANG. to 600 .ANG., and a third contact material layer of Au with a thickness of at least 300 .ANG., and
- f. heating said multilayer base contact material to diffuse said multilayer base contact material through said semiconductor graded emitter base layer and into contact with said semiconductor base layer.
- 2. The method of claim 1 in which the multilayer contact material is heated to a temperature in the range 175-350.degree. C. for a period of at least 10 minutes.
- 3. The method of claim 2 in which the semiconductor substrate is InP.
- 4. The method of claim 3 in which the semiconductor of the emitter and base is InGaAs.
- 5. The method of claim 4 in which the semiconductor emitter InGaAs is n-doped.
- 6. The method of claim 5 in which the semiconductor base InGaAs is carbon-doped.
- 7. The method of claim 5 in which the semiconductor collector is n-type InP.
Parent Case Info
This is a divisional application of Ser. No. 09/071,006, filed May 1, 1998, now U.S. Pat. No. 5,907,165.
US Referenced Citations (5)
Divisions (1)
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Number |
Date |
Country |
Parent |
071006 |
May 1998 |
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