Claims
- 1. A method of fabricating a semiconductor device, comprising:
- forming at least one semiconductor layer on one surface of a substrate;
- forming a groove in a surface opposite said one surface of said substrate in such a shape as to concentrate stress at a bottom portion of said groove; and
- breaking said substrate into a plurality of pieces at said groove while breaking said at least one semiconductor layer, wherein said at least one semiconductor layer contains N and at least one of the elements selected from the group consisting of Ga, Al and In, and
- a readily-cleaved plane of said substrate being not coincident with a readily-cleaved plane of said at least one semiconductor layer.
- 2. The method of fabricating a semiconductor device as described in claim 1, wherein said substrate is of sapphire.
- 3. A method of fabricating a semiconductor device, comprising:
- forming at least one semiconductor layer on one surface of a substrate;
- forming a groove in a surface opposite said one surface of said substrate in such a shape as to concentrate stress at a bottom portion of said groove; and
- breaking said substrate into a plurality of pieces at said groove while breaking said at least one semiconductor layer,
- said at least one semiconductor layer being formed on a {0001} plane of said substrate, and said groove being formed along a {11-20} plane of said at least one semiconductor layer.
- 4. The method of fabricating a semiconductor device as claimed in claim 3, wherein
- a thickness of said substrate T and a depth D of the groove having a relation being 0<T-D.ltoreq.150 .mu.m.
- 5. The method of fabricating a semiconductor device as described in claim 3, wherein said groove has a section in a shape of one of a V and a U.
- 6. The method of fabricating a semiconductor device as described in claim 3, wherein said breaking is performed by at least one of mechanical stress, thermal stress and ultrasonic wave.
- 7. The method of fabricating a semiconductor device as described in claim 3, wherein said breaking is performed at a temperature at which elasticity of said substrate is reduced relative to room temperature.
- 8. The method of fabricating a semiconductor device as claimed in claim 3, wherein
- a thickness of said substrate T and a depth D of the groove having the relation 0<T-D.ltoreq.T/2.
- 9. The method for fabricating a semiconductor device as claimed in claim 3, wherein said at least one semiconductor layer is a semiconductor compound containing N and at least one of the elements selected from the group consisting of Ga, Al and In.
- 10. The method for fabricating a semiconductor device as claimed in claim 3, further comprising:
- a resonator of said semiconductor device formed by a pair of facets, at least one of said facets being formed by said step of breaking said at least one semiconductor layer.
- 11. A method of fabricating a semiconductor device, comprising:
- forming at least one semiconductor layer on one surface of a substrate;
- forming a groove in a surface opposite said one surface of said substrate in such a shape as to concentrate stress at a bottom portion of said groove; and
- breaking said substrate into a plurality of pieces at said groove while breaking said at least one semiconductor layer,
- said at least one semiconductor layer being formed on a {1-100} plane of said substrate, and said groove being formed along a {11-20} plane of said at least one semiconductor layer.
Priority Claims (1)
Number |
Date |
Country |
Kind |
P07-330779 |
Dec 1995 |
JPX |
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CROSS-REFERENCE TO RELATED APPLICATION
The present application is a divisional application of U.S. Ser. No. 08/769,708 filed Dec. 18, 1996, now U.S. Pat. No. 5,821,568, issued Oct. 13, 1998.
US Referenced Citations (12)
Foreign Referenced Citations (2)
Number |
Date |
Country |
407249831 |
Sep 1995 |
JPX |
408264881 |
Oct 1996 |
JPX |
Divisions (1)
|
Number |
Date |
Country |
Parent |
769708 |
Dec 1996 |
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